[AArch64][NFC] Fix a comment error

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D127708

diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 8d5bf16a9a65462b1e508303d275ad61c8985999..42542611b4abebbd1544601ca3eaff1f6310f658 100644 (file)
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -217,7 +217,7 @@ def FeatureSlowPaired128 : SubtargetFeature<"slow-paired-128",
 
 def FeatureAscendStoreAddress : SubtargetFeature<"ascend-store-address",
     "IsStoreAddressAscend", "false",
-    "Schedule scalar stores by ascending address">;
+    "Schedule vector stores by ascending address">;
 
 def FeatureSlowSTRQro : SubtargetFeature<"slow-strqro-store", "IsSTRQroSlow",
     "true", "STR of Q register with register offset is slow">;

diff --git a/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp b/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
index 9c69a3704548a7681f39e189e40a446a7fe6ca7c..6c8845ee859868091c8eb55982fff7b4e4631216 100644 (file)
--- a/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
@@ -26,7 +26,7 @@ static bool needReorderStoreMI(const MachineInstr *MI) {
        return false;
     LLVM_FALLTHROUGH;
   case AArch64::STPQi:
-    return AArch64InstrInfo::getLdStOffsetOp(*MI).getType() == MachineOperand::MO_Immediate;
+    return AArch64InstrInfo::getLdStOffsetOp(*MI).isImm();
   }
 
   return false;