Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D127708
def FeatureAscendStoreAddress : SubtargetFeature<"ascend-store-address",
"IsStoreAddressAscend", "false",
- "Schedule scalar stores by ascending address">;
+ "Schedule vector stores by ascending address">;
def FeatureSlowSTRQro : SubtargetFeature<"slow-strqro-store", "IsSTRQroSlow",
"true", "STR of Q register with register offset is slow">;
return false;
LLVM_FALLTHROUGH;
case AArch64::STPQi:
- return AArch64InstrInfo::getLdStOffsetOp(*MI).getType() == MachineOperand::MO_Immediate;
+ return AArch64InstrInfo::getLdStOffsetOp(*MI).isImm();
}
return false;