static int vpu_set_mm_clk(void);\r
static int vpu_set_clk_by_register(void);\r
static int vpu_clk_free(vpu_drv_context_t* vpu_context);\r
-static int vpu_power_on();\r
-static int vpu_power_shutdown();\r
+static int vpu_power_on(void);\r
+static int vpu_power_shutdown(void);\r
\r
#define ReadVpuRegister(addr) *(volatile unsigned int *)(s_vpu_reg_virt_addr + s_bit_firmware_info[core].reg_base_offset + addr)\r
#define WriteVpuRegister(addr, val) *(volatile unsigned int *)(s_vpu_reg_virt_addr + s_bit_firmware_info[core].reg_base_offset + addr) = (unsigned int)val\r
return level;\r
}\r
\r
-static int vpu_power_on()\r
+static int vpu_power_on(void)\r
{\r
__raw_writel(AUTO_SHUTDOWN_EN | __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
__raw_writel((~FORCE_SHUTDOWN) & __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
return 0;\r
}\r
\r
-static int vpu_power_shutdown()\r
+static int vpu_power_shutdown(void)\r
{\r
__raw_writel(FORCE_SHUTDOWN | __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
__raw_writel((~AUTO_SHUTDOWN_EN) & __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
return 0;\r
}\r
\r
-static int vpu_set_parent_for_coda7l_clk()\r
+static int vpu_set_parent_for_coda7l_clk(void)\r
{\r
struct clk *clk_parent;\r
char *name_parent;\r
.write_room = stty_write_room,
};
-static struct tty_port *stty_port_init()
+static struct tty_port *stty_port_init(void)
{
struct tty_port *port = NULL;
((b) >= (first) && (b) <= (first) + (len) - 1)
#define to_range(b, first, base) \
( (b) - (first) + (base) )
-static inline unsigned long SPRD_DEV_P2V(paddr)
+static inline unsigned long SPRD_DEV_P2V(unsigned long paddr)
{
struct iomap_sprd *mapp;
int length = sizeof(struct iotable_sprd)/sizeof(struct iomap_sprd);
return ~0;
}
-static inline unsigned long SPRD_DEV_V2P(vaddr)
+static inline unsigned long SPRD_DEV_V2P(unsigned long vaddr)
{
struct iomap_sprd *mapp;
int length = sizeof(struct iotable_sprd)/sizeof(struct iomap_sprd);