config ARCH_MULTI_V6_V7
bool
- select MIGHT_HAVE_CACHE_L2X0
+ select MIGHT_HAVE_CACHE_L2X0 if !ARM64_A32
config ARCH_MULTI_CPU_AUTO
def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "vbmeta,boot,system,vendor";
+ by_name_prefix="/dev/block";
+ };
+ fstab {
+ compatible = "android,fstab";
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/system";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait,avb";
+ };
+
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait,avb";
+ };
+ odm {
+ compatible = "android,odm";
+ dev = "/dev/block/odm";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ product {
+ compatible = "android,product";
+ dev = "/dev/block/product";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ };
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "vbmeta,boot,system,vendor";
+ by_name_prefix="/dev/block";
+ };
+ fstab {
+ compatible = "android,fstab";
+
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait,avb";
+ };
+ product {
+ compatible = "android,product";
+ dev = "/dev/block/product";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ odm {
+ compatible = "android,odm";
+ dev = "/dev/block/odm";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ };
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "vbmeta,boot,system,vendor";
+ by_name_prefix="/dev/block";
+ };
+ fstab {
+ compatible = "android,fstab";
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/system";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ odm {
+ compatible = "android,odm";
+ dev = "/dev/block/odm";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ product {
+ compatible = "android,product";
+ dev = "/dev/block/product";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ };
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "vbmeta,boot,system,vendor";
+ by_name_prefix="/dev/block";
+ };
+ fstab {
+ compatible = "android,fstab";
+
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ product {
+ compatible = "android,product";
+ dev = "/dev/block/product";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ odm {
+ compatible = "android,odm";
+ dev = "/dev/block/odm";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ };
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/gxl_p212_1g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesongxl.dtsi"
+#include "partition_mbox_normal.dtsi"
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "gxl_p212_1g";
+ compatible = "amlogic, Gxl";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ };
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_reserved>;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0100000 0x3ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x05300000 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x3f800000 0x800000>;
+ };
+ //don't put other dts in front of logo_reserved
+
+ //di_reserved:linux,di {
+ // compatible = "amlogic, di-mem";
+ /** 10x3133440=30M(0x1e) support 8bit **/
+ // size = <0x0 0x1e00000>;
+ //no-map;
+ //};
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /** 10x3133440=30M(0x1e) support 8bit **/
+ size = <0x2000000>;
+ alignment = <0x400000>;
+ };
+ ion_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x4C00000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // linux,phandle = <4>;
+ // reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ // size = <0x0 0x01400000>;
+ // alignment = <0x0 0x400000>;
+ //};
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x01000000>;
+ alignment = <0x400000>;
+ };
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "shared-dma-pool";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0xd000000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x12000000 0x13400000>;
+ };
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+ };
+
+ dummy-battery {
+ compatible = "amlogic, dummy-battery";
+ status = "okay";
+ };
+
+ dummy-charger {
+ compatible = "amlogic, dummy-charger";
+ status = "okay";
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_32k_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+ duty-cycle = <15020>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_c: emmc@d0074000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0074000 0x2000>;
+ interrupts = <0 218 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+ f_min = <400000>;
+ f_max = <100000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b:sd@d0072000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0072000 0x2000>;
+ interrupts = <0 217 1>;
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "ao_to_sd_jtag_pins",
+ "sd_to_ao_jtag_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED";
+ /* "MMC_CAP_UHS_SDR12",
+ * "MMC_CAP_UHS_SDR25",
+ * "MMC_CAP_UHS_SDR50",
+ * "MMC_CAP_UHS_SDR104";
+ */
+ f_min = <400000>;
+ f_max = <100000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 0:unknown,
+ * 1:mmc card(include eMMC),
+ * 2:sd card(include tSD),
+ * 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card,
+ * 5:NON sdio device(means sd/mmc card),
+ * other:reserved
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@d0070000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0070000 0x2000>;
+ interrupts = <0 216 4>;
+ pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
+ pinctrl-0 = <&sdio_clk_cmd_pins>;
+ pinctrl-1 = <&sdio_all_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ non-removable;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+ mtd_nand{
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0xd0074800 0x200>;
+ interrupts = < 0 34 1 >;
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ device_id = <0>;
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch60_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0","ce1";
+ busy_pad = "rb0","rb1";
+ timming_mode = "mode5";
+ bch_mode = "bch60_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0xC00000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0xDC40000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+ };
+
+ ethmac: ethernet@0xc9410000 {
+ compatible = "amlogic, gxbb-eth-dwmac";
+ reg = <0xc9410000 0x10000
+ 0xc8834540 0x8
+ 0xc8834558 0xc>;
+ interrupts = <0 8 1>;
+ pinctrl-names = "external_eth_pins";
+ pinctrl-0 = <&external_eth_pins>;
+ rst_pin-gpios = <&gpio GPIOZ_14 0>;
+ GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
+ GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
+ mc_val_internal_phy = <0x1800>;
+ mc_val_external_phy = <0x1621>;
+ cali_val = <0x20000>;
+ interrupt-names = "macirq";
+ clocks = <&clkc CLKID_ETH>;
+ clock-names = "ethclk81";
+ internal_phy=<1>;
+ };
+
+ aml_sensor0: aml-sensor@0 {
+ compatible = "amlogic, aml-thermal";
+ device_name = "thermal";
+ #thermal-sensor-cells = <1>;
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <437>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ thermal-zones {
+ soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+
+ thermal-sensors = <&aml_sensor0 3>;
+
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <70000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <260000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpucore_cool0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpucore_cool0 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ };
+
+ dwc3: dwc3@c9000000 {
+ compatible = "synopsys, dwc3";
+ reg = <0xc9000000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ };
+
+ usb2_phy: usb2phy@d0078000 {
+ compatible = "amlogic, amlogic-new-usb2";
+ portnum = <3>;
+ reg = <0xd0078000 0x80
+ 0xc1104408 0x4>;
+ };
+
+ usb3_phy: usb3phy@d0078080 {
+ compatible = "amlogic, amlogic-new-usb3";
+ portnum = <0>;
+ reg = <0xd0078080 0x20>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0xc9100000 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ port-dma = <0>; /** 0: default ... 6: disable*/
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "gxl";
+ controller-type = <1>; /** 0: normal, 1: host, 2: device*/
+ phy-reg = <0xd0078000>;
+ phy-reg-size = <0xa0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR
+ &clkc CLKID_USB1>;
+ clock-names = "usb_general",
+ "usb1",
+ "usb1_to_ddr";
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-gxl";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+
+ /* performance: reg_address, reg_value */
+ /* s905x */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x343
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf752
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
+ pinctrl-0=<&hdmitx_hpd>;
+ pinctrl-1=<&hdmitx_ddc>;
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ */
+ ic_type = <3>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+ };
+ };
+
+ aocec: aocec{
+ compatible = "amlogic, amlogic-aocec";
+ device_name = "aocec";
+ status = "okay";
+ vendor_id = <0x000000>;
+ cec_osd_string = "MBox"; /* Max Chars: 14 */
+ cec_version = <5>; /* 5: 1.4, 6: 2.0 */
+ port_num = <1>;
+ arc_port_mask = <0x0>;
+ interrupts = <0 199 1>;
+ interrupt-names = "hdmi_aocec";
+ pinctrl-names = "default";
+ pinctrl-0=<&hdmitx_aocec>;
+ reg = <0xc810023c 0x4
+ 0xc8100000 0x200>;
+ reg-names = "ao_exit","ao";
+ };
+
+ sysled {
+ compatible = "amlogic, sysled";
+ dev_name = "sysled";
+ status = "disabled";
+ led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+ led_active_low = <1>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xC1100000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xc8820000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xc883c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xc8100000 0x100000>;
+ };
+ io_vcbus_base{
+ reg = <0xd0100000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xc8838000 0x400>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "ok";
+ reg = <0xc8838000 0x400>;
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ gpio_keypad{
+ compatible = "amlogic, gpio_keypad";
+ status = "okay";
+ scan_period = <20>;
+ key_num = <1>;
+ key_name = "power";
+ key_code = <116>;
+ key-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ detect_mode = <0>;/*0:polling mode, 1:irq mode*/
+ };
+ meson-fb {
+ compatible = "amlogic, meson-gxl";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x01800000 0x00100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 3240 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ logo_addr = "0x3f800000";
+ };
+ ge2d {
+ compatible = "amlogic, ge2d-gxl";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 150 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ };
+
+
+ /* AUDIO MESON DEVICES */
+ i2s_dai: I2S {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-i2s-dai";
+ clocks =
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AMCLK>,
+ <&clkc CLKID_AIFIFO2>,
+ <&clkc CLKID_MIXER>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_ADC>,
+ <&clkc CLKID_AIU_TOP>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_I2S_SPDIF>;
+ clock-names =
+ "mpll",
+ "mclk",
+ "top_glue",
+ "aud_buf",
+ "i2s_out",
+ "amclk_measure",
+ "aififo2",
+ "aud_mixer",
+ "mixer_reg",
+ "adc",
+ "top_level",
+ "aoclk",
+ "aud_in";
+ i2s_pos_sync = <0>;
+ /*DMIC;*/ /* I2s Mic or Dmic, default for I2S mic */
+ };
+ dmic:snd_dmic {
+ #sound-dai-cells = <0>;
+ compatible = "aml, aml_snd_dmic";
+ reg = <0xd0042000 0x2000>;
+ status = "disabled";
+ resets = <
+ &clkc CLKID_PDM_GATE
+ >;
+ reset-names = "pdm";
+ pinctrl-names = "audio_dmic";
+ pinctrl-0 = <&aml_dmic_pins>;
+ clocks = <&clkc CLKID_PDM_COMP>,
+ <&clkc CLKID_AMCLK_COMP>;
+ clock-names = "pdm", "mclk";
+ };
+ spdif_dai: SPDIF {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-dai";
+ clocks =
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_I958_COMP>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_I958_COMP_SPDIF>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>;
+ clock-names =
+ "mpll1",
+ "i958",
+ "mclk",
+ "spdif",
+ "clk_81",
+ "iec958",
+ "iec958_amclk";
+ };
+ pcm_dai: PCM {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-pcm-dai";
+ pinctrl-names = "audio_pcm";
+ pinctrl-0 = <&audio_pcm_pins>;
+ clocks =
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_PCM_MCLK_COMP>,
+ <&clkc CLKID_PCM_SCLK_GATE>;
+ clock-names =
+ "mpll0",
+ "pcm_mclk",
+ "pcm_sclk";
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+ };
+ i2s_plat: i2s_platform {
+ compatible = "amlogic, aml-i2s";
+ interrupts = <0 29 1>;
+ };
+ pcm_plat: pcm_platform {
+ compatible = "amlogic, aml-pcm";
+ };
+ spdif_codec: spdif_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-codec";
+ pinctrl-names = "audio_spdif";
+ pinctrl-0 = <&audio_spdif_pins>;
+ };
+ pcm_codec: pcm_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pcm2BT-codec";
+ };
+ /* endof AUDIO MESON DEVICES */
+
+ /* AUDIO board specific */
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "disable";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0xc8832000 0x14>;
+ status = "okay";
+ };
+ aml_sound_meson {
+ compatible = "aml, meson-snd-card";
+ status = "okay";
+ aml-sound-card,format = "i2s";
+ aml_sound_card,name = "AML-MESONAUDIO";
+ aml,audio-routing =
+ "Ext Spk","LOUTL",
+ "Ext Spk","LOUTR";
+
+ mute_gpio-gpios = <&gpio GPIOH_5 0>;
+ mute_inv;
+ hp_disable;
+ hp_paraments = <800 300 0 5 1>;
+ pinctrl-names = "audio_i2s";
+ pinctrl-0 = <&audio_i2s_pins>;
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+ codec_list = <&codec0 &codec1 &codec2>;
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
+ cpudai0: cpudai0 {
+ sound-dai = <&i2s_dai>;
+ };
+ cpudai1: cpudai1 {
+ sound-dai = <&spdif_dai>;
+ };
+ cpudai2: cpudai2 {
+ sound-dai = <&pcm_dai>;
+ };
+ codec0: codec0 {
+ sound-dai = <&amlogic_codec>;
+ };
+ codec1: codec1 {
+ sound-dai = <&spdif_codec>;
+ };
+ codec2: codec2 {
+ sound-dai = <&pcm_codec>;
+ };
+ };
+ /* END OF AUDIO board specific */
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "ok";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_reg_base{
+ reg = <0xc8810000 0x4000>;
+ };
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ flag_cma = <1>;/*0:use reserved;1:use cma*/
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1 0 6 1>;
+ interrupt-names = "de_irq", "timerc";
+ /*
+ * nr_size(byte) = 1920*544*2(yuv422 8bit) |
+ * 1920*544*2*12/8(yuv422 10bit)
+ * | 1920*544*2*10/8(yuv422 10bit full pack mode)
+ */
+ /* mtn_size(byte) = 1920*544/2 */
+ /* count_size(byte) = 1920*544/2 */
+ buffer-size = <3133440>;
+ hw-version = <2>;
+ };
+
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo {
+ compatible = "amlogic, amlvideo";
+ dev_name = "amlvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ dev_name = "vdin0";
+ status = "ok";
+ reserve-iomap = "true";
+ flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <16>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <1>;
+ };
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "ok";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ /*1:enabel osd lut 100 table;0:disable*/
+ cfg_en_osd_100 = <1>;
+ /*0: 709/601 1: bt2020*/
+ tx_op_color_primary = <0>;
+ };
+
+ unifykey{
+ compatible = "amlogic, unifykey";
+ status = "ok";
+
+ unifykey-num = <16>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11= <&keysn_11>;
+ unifykey-index-12= <&keysn_12>;
+ unifykey-index-13= <&keysn_13>;
+ unifykey-index-14= <&keysn_14>;
+ unifykey-index-15= <&keysn_15>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "PlayReadykeybox25";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "region_code";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ };//End unifykey
+
+};
+&efuse {
+ status = "ok";
+};
+
+&pwm_ef {
+ status = "okay";
+};
+
+&audio_data{
+ status = "okay";
+};
+&spicc{
+ status = "disabled";
+ pinctrl-names = "spicc_pulldown","spicc_pullup";
+ pinctrl-0 = <&spicc_pulldown_x8x9x11>;
+ pinctrl-1 = <&spicc_pullup_x8x9x11>;
+ num_chipselect = <1>;
+ cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>;
+ dma_en = <0>;
+ dma_tx_threshold = <3>;
+ dma_rx_threshold = <3>;
+ dma_num_per_read_burst = <3>;
+ dma_num_per_write_burst = <3>;
+ delay_control = <0x15>;
+ ssctl = <0>;
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/gxl_p212_2g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "mesongxl.dtsi"
+#include "partition_mbox_normal.dtsi"
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "gxl_p212_2g";
+ compatible = "amlogic,gxl";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ };
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_reserved>;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0100000 0x7ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x0>;
+ pmsg-size = <0x8000>;
+ };
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x05300000 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ //alloc-ranges = <0x3f800000 0x800000>;
+ };
+ //don't put other dts in front of logo_reserved
+
+ //di_reserved:linux,di {
+ // compatible = "amlogic, di-mem";
+ /** 10x3133440=30M(0x1e) support 8bit **/
+ // size = <0x0 0x1e00000>;
+ //no-map;
+ //};
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /** 10x3133440=30M(0x1e) support 8bit **/
+ size = <0x2000000>;
+ alignment = <0x400000>;
+ };
+ ion_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x7C00000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin0 CMA pool */
+ //vdin0_cma_reserved:linux,vdin0_cma {
+ // compatible = "shared-dma-pool";
+ // linux,phandle = <4>;
+ // reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ // size = <0x0 0x01400000>;
+ // alignment = <0x0 0x400000>;
+ //};
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x01000000>;
+ alignment = <0x400000>;
+ };
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "shared-dma-pool";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x12000000 0x13400000>;
+ };
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+ };
+
+ dummy-battery {
+ compatible = "amlogic, dummy-battery";
+ status = "okay";
+ };
+
+ dummy-charger {
+ compatible = "amlogic, dummy-charger";
+ status = "okay";
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ dhd_static_buf; //dhd_static_buf support
+ power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_32k_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+ duty-cycle = <15020>;
+ times = <8>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_c: emmc@d0074000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0074000 0x2000>;
+ interrupts = <0 218 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+ f_min = <400000>;
+ f_max = <100000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b:sd@d0072000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0072000 0x2000>;
+ interrupts = <0 217 1>;
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "ao_to_sd_jtag_pins",
+ "sd_to_ao_jtag_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED";
+ /* "MMC_CAP_UHS_SDR12",
+ * "MMC_CAP_UHS_SDR25",
+ * "MMC_CAP_UHS_SDR50",
+ * "MMC_CAP_UHS_SDR104";
+ */
+ f_min = <400000>;
+ f_max = <100000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 0:unknown,
+ * 1:mmc card(include eMMC),
+ * 2:sd card(include tSD),
+ * 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card,
+ * 5:NON sdio device(means sd/mmc card),
+ * other:reserved
+ */
+ };
+ };
+
+ sd_emmc_a:sdio@d0070000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-gxl";
+ reg = <0xd0070000 0x2000>;
+ interrupts = <0 216 4>;
+ pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
+ pinctrl-0 = <&sdio_clk_cmd_pins>;
+ pinctrl-1 = <&sdio_all_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "clkin0", "clkin1";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ non-removable;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+ mtd_nand{
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0xd0074800 0x200>;
+ interrupts = < 0 34 1 >;
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ device_id = <0>;
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch60_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0","ce1";
+ busy_pad = "rb0","rb1";
+ timming_mode = "mode5";
+ bch_mode = "bch60_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0xC00000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0xDC40000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+ };
+
+ ethmac: ethernet@0xc9410000 {
+ compatible = "amlogic, gxbb-eth-dwmac";
+ reg = <0xc9410000 0x10000
+ 0xc8834540 0x8
+ 0xc8834558 0xc>;
+ interrupts = <0 8 1>;
+ pinctrl-names = "external_eth_pins";
+ pinctrl-0 = <&external_eth_pins>;
+ rst_pin-gpios = <&gpio GPIOZ_14 0>;
+ GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
+ GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
+ mc_val_internal_phy = <0x1800>;
+ mc_val_external_phy = <0x1621>;
+ cali_val = <0x20000>;
+ interrupt-names = "macirq";
+ clocks = <&clkc CLKID_ETH>;
+ clock-names = "ethclk81";
+ internal_phy=<1>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xC1100000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xc8820000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xc883c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xc8100000 0x100000>;
+ };
+ io_vcbus_base{
+ reg = <0xd0100000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xc8838000 0x400>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "ok";
+ reg = <0xc8838000 0x400>;
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ gpio_keypad{
+ compatible = "amlogic, gpio_keypad";
+ status = "okay";
+ scan_period = <20>;
+ key_num = <1>;
+ key_name = "power";
+ key_code = <116>;
+ key-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+ detect_mode = <0>;/*0:polling mode, 1:irq mode*/
+ };
+
+ aml_sensor0: aml-sensor@0 {
+ compatible = "amlogic, aml-thermal";
+ device_name = "thermal";
+ #thermal-sensor-cells = <1>;
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpufreq_cool0";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <437>;
+ cluster_id = <0>;
+ node_name = "gpufreq_cool0";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "gpucore_cool0";
+ device_type = "gpucore";
+ };
+ };
+ cpufreq_cool0:cpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpufreq_cool0:gpufreq_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore_cool0:gpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ thermal-zones {
+ soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+
+ thermal-sensors = <&aml_sensor0 3>;
+
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <70000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <260000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpucore_cool0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpufreq_cool0 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpucore_cool0 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ };
+
+ dwc3: dwc3@c9000000 {
+ compatible = "synopsys, dwc3";
+ reg = <0xc9000000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ };
+
+ usb2_phy: usb2phy@d0078000 {
+ compatible = "amlogic, amlogic-new-usb2";
+ portnum = <3>;
+ reg = <0xd0078000 0x80
+ 0xc1104408 0x4>;
+ };
+
+ usb3_phy: usb3phy@d0078080 {
+ compatible = "amlogic, amlogic-new-usb3";
+ portnum = <0>;
+ reg = <0xd0078080 0x20>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0xc9100000 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ port-dma = <0>; /** 0: default ... 6: disable*/
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "gxl";
+ controller-type = <1>; /** 0: normal, 1: host, 2: device*/
+ phy-reg = <0xd0078000>;
+ phy-reg-size = <0xa0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR
+ &clkc CLKID_USB1>;
+ clock-names = "usb_general",
+ "usb1",
+ "usb1_to_ddr";
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-gxl";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+
+ /* performance: reg_address, reg_value */
+ /* s905x */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x343
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf752
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
+ pinctrl-0=<&hdmitx_hpd>;
+ pinctrl-1=<&hdmitx_ddc>;
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ */
+ ic_type = <3>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+ };
+ };
+
+ aocec: aocec{
+ compatible = "amlogic, amlogic-aocec";
+ device_name = "aocec";
+ status = "okay";
+ vendor_id = <0x000000>;
+ cec_osd_string = "MBox"; /* Max Chars: 14 */
+ cec_version = <5>; /* 5: 1.4, 6: 2.0 */
+ port_num = <1>;
+ arc_port_mask = <0x0>;
+ interrupts = <0 199 1>;
+ interrupt-names = "hdmi_aocec";
+ pinctrl-names = "default";
+ pinctrl-0=<&hdmitx_aocec>;
+ reg = <0xc810023c 0x4
+ 0xc8100000 0x200>;
+ reg-names = "ao_exit","ao";
+ };
+
+ sysled {
+ compatible = "amlogic, sysled";
+ dev_name = "sysled";
+ status = "disabled";
+ led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+ led_active_low = <1>;
+ };
+
+ meson-fb {
+ compatible = "amlogic, meson-gxl";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x01800000 0x00100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 3240 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ logo_addr = "0x7f800000";
+ };
+ ge2d {
+ compatible = "amlogic, ge2d-gxl";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 150 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ };
+
+
+ /* AUDIO MESON DEVICES */
+ i2s_dai: I2S {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-i2s-dai";
+ clocks =
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AMCLK>,
+ <&clkc CLKID_AIFIFO2>,
+ <&clkc CLKID_MIXER>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_ADC>,
+ <&clkc CLKID_AIU_TOP>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_I2S_SPDIF>;
+ clock-names =
+ "mpll",
+ "mclk",
+ "top_glue",
+ "aud_buf",
+ "i2s_out",
+ "amclk_measure",
+ "aififo2",
+ "aud_mixer",
+ "mixer_reg",
+ "adc",
+ "top_level",
+ "aoclk",
+ "aud_in";
+ i2s_pos_sync = <0>;
+ /*DMIC;*/ /* I2s Mic or Dmic, default for I2S mic */
+ };
+ dmic:snd_dmic {
+ #sound-dai-cells = <0>;
+ compatible = "aml, aml_snd_dmic";
+ reg = <0xd0042000 0x2000>;
+ status = "disabled";
+ resets = <
+ &clkc CLKID_PDM_GATE
+ >;
+ reset-names = "pdm";
+ pinctrl-names = "audio_dmic";
+ pinctrl-0 = <&aml_dmic_pins>;
+ clocks = <&clkc CLKID_PDM_COMP>,
+ <&clkc CLKID_AMCLK_COMP>;
+ clock-names = "pdm", "mclk";
+ };
+ spdif_dai: SPDIF {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-dai";
+ clocks =
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_I958_COMP>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_I958_COMP_SPDIF>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>;
+ clock-names =
+ "mpll1",
+ "i958",
+ "mclk",
+ "spdif",
+ "clk_81",
+ "iec958",
+ "iec958_amclk";
+ };
+ pcm_dai: PCM {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-pcm-dai";
+ pinctrl-names = "audio_pcm";
+ pinctrl-0 = <&audio_pcm_pins>;
+ clocks =
+ <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_PCM_MCLK_COMP>,
+ <&clkc CLKID_PCM_SCLK_GATE>;
+ clock-names =
+ "mpll0",
+ "pcm_mclk",
+ "pcm_sclk";
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+ };
+ i2s_plat: i2s_platform {
+ compatible = "amlogic, aml-i2s";
+ interrupts = <0 29 1>;
+ };
+ pcm_plat: pcm_platform {
+ compatible = "amlogic, aml-pcm";
+ };
+ spdif_codec: spdif_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-codec";
+ pinctrl-names = "audio_spdif";
+ pinctrl-0 = <&audio_spdif_pins>;
+ };
+ pcm_codec: pcm_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pcm2BT-codec";
+ };
+ /* endof AUDIO MESON DEVICES */
+
+ /* AUDIO board specific */
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "disable";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0xc8832000 0x14>;
+ status = "okay";
+ };
+ aml_sound_meson {
+ compatible = "aml, meson-snd-card";
+ status = "okay";
+ aml-sound-card,format = "i2s";
+ aml_sound_card,name = "AML-MESONAUDIO";
+ aml,audio-routing =
+ "Ext Spk","LOUTL",
+ "Ext Spk","LOUTR";
+
+ mute_gpio-gpios = <&gpio GPIOH_5 0>;
+ mute_inv;
+ hp_disable;
+ hp_paraments = <800 300 0 5 1>;
+ pinctrl-names = "audio_i2s";
+ pinctrl-0 = <&audio_i2s_pins>;
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+ codec_list = <&codec0 &codec1 &codec2>;
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
+ cpudai0: cpudai0 {
+ sound-dai = <&i2s_dai>;
+ };
+ cpudai1: cpudai1 {
+ sound-dai = <&spdif_dai>;
+ };
+ cpudai2: cpudai2 {
+ sound-dai = <&pcm_dai>;
+ };
+ codec0: codec0 {
+ sound-dai = <&amlogic_codec>;
+ };
+ codec1: codec1 {
+ sound-dai = <&spdif_codec>;
+ };
+ codec2: codec2 {
+ sound-dai = <&pcm_codec>;
+ };
+ };
+ /* END OF AUDIO board specific */
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "ok";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ amvenc_avc{
+ compatible = "amlogic, amvenc_avc";
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ hevc_enc{
+ compatible = "cnm, HevcEnc";
+ dev_name = "HevcEnc";
+ status = "okay";
+ interrupts = <0 187 1>;
+ interrupt-names = "wave420l_irq";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_reg_base{
+ reg = <0xc8810000 0x4000>;
+ };
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ flag_cma = <1>;/*0:use reserved;1:use cma*/
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1 0 6 1>;
+ interrupt-names = "de_irq", "timerc";
+ /*
+ * nr_size(byte) = 1920*544*2(yuv422 8bit) |
+ * 1920*544*2*12/8(yuv422 10bit)
+ * | 1920*544*2*10/8(yuv422 10bit full pack mode)
+ */
+ /* mtn_size(byte) = 1920*544/2 */
+ /* count_size(byte) = 1920*544/2 */
+ buffer-size = <3133440>;
+ hw-version = <2>;
+ };
+
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo {
+ compatible = "amlogic, amlvideo";
+ dev_name = "amlvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ dev_name = "vdin0";
+ status = "ok";
+ reserve-iomap = "true";
+ flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <16>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <1>;
+ };
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "ok";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ /*1:enabel osd lut 100 table;0:disable*/
+ cfg_en_osd_100 = <1>;
+ /*0: 709/601 1: bt2020*/
+ tx_op_color_primary = <0>;
+ };
+
+ unifykey{
+ compatible = "amlogic, unifykey";
+ status = "ok";
+
+ unifykey-num = <16>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11= <&keysn_11>;
+ unifykey-index-12= <&keysn_12>;
+ unifykey-index-13= <&keysn_13>;
+ unifykey-index-14= <&keysn_14>;
+ unifykey-index-15= <&keysn_15>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "PlayReadykeybox25";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "region_code";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ };//End unifykey
+};
+&efuse {
+ status = "ok";
+};
+
+&pwm_ef {
+ status = "okay";
+};
+
+&audio_data{
+ status = "okay";
+};
--- /dev/null
+/*
+ * Amlogic GXBB Platform gpu
+ *
+ * Copyright (c) 2015-2015 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+
+/ {
+ gpu:mali@d00c0000{
+ #cooling-cells = <2>; /* min followed by max */
+ compatible = "arm,mali-450";
+ interrupt-parent = <&gic>;
+ reg = <0xd00c0000 0x40000>, /*mali APB bus base address*/
+ <0xc1104440 0x01000>, /*reset register*/
+ <0xc8100000 0x01000>, /*aobus for gpu pmu domain*/
+ <0xc883c000 0x01000>, /*hiubus for gpu clk cntl*/
+ <0xc1104440 0x01000>;
+ interrupts = <0 160 4>, <0 161 4>, <0 162 4>, <0 163 4>,
+ <0 164 4>, <0 165 4>, <0 166 4>, <0 167 4>,
+ <0 168 4>, <0 169 4>;
+ interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP", "IRQPMU",
+ "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1",
+ "IRQPP2", "IRQPPMMU2";
+ pmu_domain_config = <0x1 0x2 0x4 0x4 0x0 0x0
+ 0x0 0x0 0x0 0x1 0x2 0x0>;
+ pmu_switch_delay = <0xffff> ;
+ num_of_pp = <3> ;
+ def_clk = <4> ;
+ sc_mpp = <3>;/* number of pp used most of time.*/
+ tbl = <&clk125_cfg
+ &clk285_cfg
+ &clk400_cfg
+ &clk500_cfg
+ &clk666_cfg
+ &clk800_cfg>;
+
+ clocks = <&clkc CLKID_GPU_MUX &clkc CLKID_GP0_PLL>;
+ clock-names = "gpu_mux","gp0_pll";
+
+ /*control_interval x keep_count == 900 - 1000ms */
+ control_interval = <200>;
+
+ clk125_cfg:clk125_cfg {
+ clk_freq = <125000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <30 250>;
+ };
+
+ clk250_cfg:clk250_cfg {
+ clk_freq = <250000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <115 250>;
+ /*125 = 250*(125/250), 50= 60-10*/
+ };
+
+ clk285_cfg:clk285_cfg {
+ clk_freq = <285714285>;
+ clk_parent = "fclk_div7";
+ clkp_freq = <285714285>;
+ voltage = <1150>;
+ keep_count = <5>;
+ threshold = <100 250>;
+ /*109 = 250*(125/285)*/
+ };
+
+ clk400_cfg:clk400_cfg {
+ clk_freq = <400000000>;
+ clk_parent = "fclk_div5";
+ clkp_freq = <400000000>;
+ voltage = <1150>;
+ keep_count = <3>;
+ threshold = <168 250>;
+ /*178 = 250*(285/400)*/
+ };
+
+ clk500_cfg:clk500_cfg {
+ clk_freq = <500000000>;
+ clk_parent = "fclk_div4";
+ clkp_freq = <500000000>;
+ voltage = <1150>;
+ keep_count = <2>;
+ threshold = <190 250>;
+ /*200=250*(400/500)*/
+ };
+
+ clk666_cfg:clk666_cfg {
+ clk_freq = <666666666>;
+ clk_parent = "fclk_div3";
+ clkp_freq = <666666666>;
+ voltage = <1150>;
+ keep_count = <1>;
+ threshold = <177 250>;
+ /*187.5=250*(500/666.6)*/
+ };
+
+ clk750_cfg:clk750_cfg {
+ clk_freq = <744000000>;
+ clk_parent = "gp0_pll";
+ clkp_freq = <744000000>;
+ voltage = <1150>;
+ keep_count = <1>;
+ threshold = <213 255>;
+ /*223=250*(666.0/744.0), 223+7=230*/
+ };
+
+ clk800_cfg:clk800_cfg {
+ clk_freq = <792000000>;
+ clk_parent = "gp0_pll";
+ clkp_freq = <792000000>;
+ voltage = <1150>;
+ keep_count = <1>;
+ threshold = <230 255>;
+ };
+
+ };
+};/* end of / */
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/mesongxl.dtsi
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/amlogic,gxl-reset.h>
+#include <dt-bindings/clock/amlogic,gxl-clkc.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+#include <dt-bindings/gpio/gxl.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include "mesongxbb-gpu-mali450.dtsi"
+/ {
+ cpus:cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x0>;
+ //timer=<&timer_a>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ /*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
+ /*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x1>;
+ //timer=<&timer_b>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ /*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
+ /*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+ };
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x2>;
+ //timer=<&timer_c>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ /*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
+ /*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x3>;
+ //timer=<&timer_d>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ /*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
+ /*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
+ };
+ };
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff08>,
+ <GIC_PPI 14 0xff08>,
+ <GIC_PPI 11 0xff08>,
+ <GIC_PPI 10 0xff08>;
+ };
+ timer_bc {
+ compatible = "arm, meson-bc-timer";
+ reg= <0xc1109990 0x4 0xc1109994 0x4>;
+ timer_name = "Meson TimerF";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 60 1>;
+ bit_enable=<16>;
+ bit_mode=<12>;
+ bit_resolution=<0>;
+ };
+
+ arm_pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 137 4>;
+ reg = <0xc8834400 0x1000>;
+
+ /* addr = base + offset << 2 */
+ sys_cpu_status0_offset = <0xa0>;
+
+ sys_cpu_status0_pmuirq_mask = <0xf>;
+
+ /* default 10ms */
+ relax_timer_ns = <10000000>;
+
+ /* default 10000us */
+ max_wait_cnt = <10000>;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0xc4301000 0x1000>,
+ <0xc4302000 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm{
+ compatible = "amlogic, pm";
+ device_name = "aml_pm";
+ reg = <0xc81000a8 0x4>,
+ <0xc810023c 0x4>;
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ reserve_mem_size = <0x00300000>;
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ securitykey {
+ compatible = "aml, securitykey";
+ storage_query = <0x82000060>;
+ storage_read = <0x82000061>;
+ storage_write = <0x82000062>;
+ storage_tell = <0x82000063>;
+ storage_verify = <0x82000064>;
+ storage_status = <0x82000065>;
+ storage_list = <0x82000067>;
+ storage_remove = <0x82000068>;
+ storage_in_func = <0x82000023>;
+ storage_out_func = <0x82000024>;
+ storage_block_func = <0x82000025>;
+ storage_size_func = <0x82000027>;
+ storage_set_enctype = <0x8200006A>;
+ storage_get_enctype = <0x8200006B>;
+ storage_version = <0x8200006C>;
+ };
+
+ cpu_iomap{
+ compatible = "amlogic, iomap";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xc1100000 0x100000>;
+ };
+ io_apb_base{
+ reg = <0xd0050000 0x50000>;
+ };
+ io_aobus_base{
+ reg = <0xc8100000 0x100000>;
+ };
+ io_vapb_base{
+ reg = <0xd0100000 0x100000>;
+ };
+ io_hiu_base{
+ reg = <0xc883c000 0x2000>;
+ };
+ };
+
+ cpu_info{
+ compatible = "amlogic, cpuinfo";
+ cpuinfo_cmd = <0x82000044>;
+ status = "okay";
+ };
+
+ watchdog {
+ compatible = "amlogic, meson-wdt";
+ status = "okay";
+ default_timeout=<10>;
+ reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+ reset_watchdog_time=<2>;
+ shutdown_timeout=<10>;
+ firmware_timeout=<6>;
+ suspend_timeout=<6>;
+ reg = <0xc11098d0 0x10>;
+ clock-names = "xtal";
+ clocks = <&xtal>;
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ status = "okay";
+ };
+
+ jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ select = "apao"; /* disable/apao/apee */
+ jtagao-gpios = <&gpio GPIOH_6 0
+ &gpio GPIOH_7 0
+ &gpio GPIOH_8 0
+ &gpio GPIOH_9 0>;
+ jtagee-gpios = <&gpio CARD_0 0
+ &gpio CARD_1 0
+ &gpio CARD_2 0
+ &gpio CARD_3 0>;
+ };
+
+ mailbox: mhu@c883c400 {
+ compatible = "amlogic, meson_mhu";
+ reg = <0xc883c400 0x4c>, /* MHU registers */
+ <0xc8013000 0x800>; /* Payload area */
+ interrupts = <0 209 1>, /* low priority interrupt */
+ <0 210 1>; /* high priority interrupt */
+ #mbox-cells = <1>;
+ mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+ mboxes = <&mailbox 0 &mailbox 1>;
+ };
+
+ scpi_clocks {
+ compatible = "arm, scpi-clks";
+
+ scpi_dvfs: scpi_clocks@0 {
+ compatible = "arm, scpi-clk-indexed";
+ #clock-cells = <1>;
+ clock-indices = <0>;
+ clock-output-names = "vcpu";
+ };
+
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ vpu {
+ compatible = "amlogic, vpu-gxl";
+ dev_name = "vpu";
+ status = "okay";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_GP0_PLL>,
+ <&clkc CLKID_VPU_P0_COMP>,
+ <&clkc CLKID_VPU_P1_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "gp_pll",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ spicc:@c1108d80{
+ compatible = "amlogic, spicc";
+ status = "disabled";
+ reg = <0xc1108d80 0x28>;
+ clocks = <&clkc CLKID_SPICC>;
+ clock-names = "spicc_clk";
+ interrupts = <0 81 1>;
+ device_id = <0>;
+ };
+
+ uart_AO: serial@c81004c0 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xc81004c0 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <1>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ /*pinctrl-0 = <&ao_uart_pins>;*/
+ support-sysrq = <0>; /* 0 not support , 1 support */
+ };
+
+ uart_A: serial@c11084c0 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xc11084c0 0x18>;
+ interrupts = <0 26 1>;
+ status = "okay";
+ clocks = <&clkc CLKID_UART0>;
+ clock-names = "clk_uart";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@c11084dc {
+ compatible = "amlogic, meson-uart";
+ reg = <0xc11084dc 0x18>;
+ interrupts = <0 75 1>;
+ status = "disabled";
+ clocks = <&clkc CLKID_UART1>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@c1108700 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xc1108700 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&clkc CLKID_UART2>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+ uart_AO_B: serial@c81004e0 {
+ compatible = "amlogic, meson-uart";
+ reg = <0xc81004e0 0x18>;
+ interrupts = <0 197 1>;
+ status = "disable";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+
+ pinctrl_aobus: pinctrl@14 {
+ compatible = "amlogic,meson-gxl-aobus-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio_ao: bank@14 {
+ reg = <0xc8100014 0x8>,
+ <0xc810002c 0x4>,
+ <0xc8100024 0x8>;
+ reg-names = "mux", "pull", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ pinctrl_periphs: pinctrl@4b0 {
+ compatible = "amlogic,meson-gxl-periphs-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio: bank@4b0 {
+ reg = <0xc88344b0 0x28>,
+ <0xc88344e8 0x14>,
+ <0xc8834520 0x14>,
+ <0xc8834430 0x40>;
+ reg-names = "mux", "pull",
+ "pull-enable", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cbus: cbus@c1100000 {
+ compatible = "simple-bus";
+ reg = <0xc1100000 0x100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc1100000 0x100000>;
+
+ gpio_intc: interrupt-controller@9880 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,meson-gxl-gpio-intc";
+ reg = <0x9880 0x10>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <64 65 66 67 68 69 70 71>;
+ status = "okay";
+ };
+
+ meson_clk_msr{
+ compatible = "amlogic, gxl_measure";
+ reg = <0x875c 0x4
+ 0x8764 0x4>;
+ };
+
+ /*i2c-A*/
+ i2c0: i2c@8500 {
+ compatible = "amlogic,meson-gx-i2c";
+ status = "disabled";
+ reg = <0x8500 0x20>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ /*i2c-B*/
+ i2c1: i2c@87c0 {
+ compatible = "amlogic,meson-gx-i2c";
+ status = "disabled";
+ reg = <0x87c0 0x20>;
+ interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ /*i2c-C*/
+ i2c2: i2c@87e0 {
+ compatible = "amlogic,meson-gx-i2c";
+ status = "disabled";
+ reg = <0x87e0 0x20>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+
+ /*i2c-D*/
+ i2c3: i2c@8d20 {
+ compatible = "amlogic,meson-gx-i2c";
+ status = "disabled";
+ reg = <0x8d20 0x20>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+ };
+
+ aobus: aobus@c8100000 {
+ compatible = "simple-bus";
+ reg = <0xc8100000 0x100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc8100000 0x100000>;
+
+ cpu_version{
+ reg=<0x0220 0x4>;
+ };
+
+ i2c_AO: i2c@0500 {
+ compatible = "amlogic,meson-gx-i2c";
+ status = "disabled";
+ reg = <0x0500 0x20>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ };
+ };
+
+ periphs: periphs@c8834000 {
+ compatible = "simple-bus";
+ reg = <0xc8834000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc8834000 0x2000>;
+ };
+
+ hiubus: hiubus@c883c000 {
+ compatible = "simple-bus";
+ reg = <0xc883c000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xc883c000 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,gxl-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x3db>;
+ };
+ };
+
+ apb: apb@d0000000 {
+ compatible = "simple-bus";
+ reg = <0xd0000000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xd0000000 0x200000>;
+ };
+ }; /* end of soc */
+
+ cpu_ver_name {
+ compatible = "amlogic, cpu-major-id-gxl";
+ };
+}; /* end of root */
+
+&pinctrl_aobus {
+ remote_pins:remote_pin {
+ mux {
+ groups = "remote_input";
+ function = "remote";
+ };
+ };
+
+ sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOAO_0",
+ "GPIOAO_1";
+ function = "gpio_aobus";
+ };
+ };
+
+ sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+ mux {
+ groups = "uart_tx_ao_a_0",
+ "uart_rx_ao_a_0";
+ function = "uart_ao";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ ao_uart_pins:ao_uart {
+ mux {
+ groups = "uart_tx_ao_a_0",
+ "uart_rx_ao_a_0";
+ function = "uart_ao";
+ };
+ };
+
+ ao_b_uart_pins:ao_b_uart {
+ mux {
+ groups = "uart_tx_ao_b_0",
+ "uart_rx_ao_b_0";
+ function = "uart_ao_b";
+ };
+ };
+ ao_i2c_master:ao_i2c{
+ mux {
+ groups = "i2c_sda_ao",
+ "i2c_sck_ao";
+ function = "i2c_ao";
+ };
+ };
+
+ hdmitx_aocec: hdmitx_aocec {
+ mux {
+ groups = "ao_cec";
+ function = "ao_cec";
+ };
+ };
+
+ hdmitx_eecec: hdmitx_eecec {
+ mux {
+ groups = "ee_cec";
+ function = "ee_cec";
+ };
+ };
+}; /* end of pinctrl_aobus*/
+
+&pinctrl_periphs {
+ external_eth_pins:external_eth_pins {
+ mux {
+ groups = "eth_mdio",
+ "eth_mdc",
+ "eth_clk_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd0",
+ "eth_rxd1",
+ "eth_rxd2",
+ "eth_rxd3",
+ "eth_rgmii_tx_clk",
+ "eth_tx_en",
+ "eth_txd0",
+ "eth_txd1",
+ "eth_txd2",
+ "eth_txd3";
+ function = "eth";
+ };
+ };
+
+ jtag_apao_pins:jtag_apao_pin {
+ mux {
+ groups = "jtag_tdi_0",
+ "jtag_tdo_0",
+ "jtag_clk_0",
+ "jtag_tms_0";
+ function = "jtag";
+ };
+ };
+
+ jtag_apee_pins:jtag_apee_pin {
+ mux {
+ groups ="jtag_tdi_1",
+ "jtag_tdo_1",
+ "jtag_clk_1",
+ "jtag_tms_1";
+ function = "jtag";
+ };
+ };
+
+ a_uart_pins:a_uart {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a",
+ "uart_cts_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ b_uart_pins:b_uart {
+ mux {
+ groups = "uart_tx_b",
+ "uart_rx_b",
+ "uart_cts_b",
+ "uart_rts_b";
+ function = "uart_b";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c",
+ "uart_cts_c",
+ "uart_rts_c";
+ function = "uart_c";
+ };
+ };
+
+ wifi_32k_pins:wifi_32k_pins {
+ mux {
+ groups ="pwm_e";
+ function = "pwm_e";
+ };
+ };
+
+/*
+ * sd_clk_cmd_pins:sd_clk_cmd_pins{
+ * };
+ * sd_all_pins:sd_all_pins {
+ * };
+ * sd_1bit_uart_pins:sd_1bit_uart_pins{
+ * };
+ * sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
+ * };
+ * sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
+ * };
+ */
+ ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
+ mux {
+ groups = "sdcard_d2",
+ "sdcard_d3";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0",
+ "sdcard_cmd",
+ "sdcard_clk";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_tx_ao_a_card4",
+ "uart_rx_ao_a_card5";
+ function = "uart_ao_a_card";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+ mux {
+ groups = "emmc_cmd",
+ "emmc_clk";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+
+ emmc_conf_pull_up:emmc_conf_pull_up {
+ mux {
+ groups = "emmc_nand_d07",
+ "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_done:emmc_conf_pull_done {
+ mux {
+ groups = "emmc_ds";
+ function = "emmc";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ sd_clk_cmd_pins:sd_clk_cmd_pins{
+ mux {
+ groups = "sdcard_cmd",
+ "sdcard_clk";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sd_all_pins:sd_all_pins{
+ mux {
+ groups = "sdcard_d0",
+ "sdcard_d1",
+ "sdcard_d2",
+ "sdcard_d3",
+ "sdcard_cmd",
+ "sdcard_clk";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sdio_clk_cmd_pins:sdio_clk_cmd_pins {
+ mux {
+ groups = "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sdio_all_pins:sdio_all_pins {
+ mux {
+ groups = "sdio_d0",
+ "sdio_d1",
+ "sdio_d2",
+ "sdio_d3",
+ "sdio_clk",
+ "sdio_cmd";
+ function = "sdio";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sd_iso7816_pins:sd_iso7816_pins {
+ mux {
+ groups = "iso7816_clk_dv",
+ "iso7816_data_dv";
+ function = "iso7816";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ nand_pulldown: nand_pulldown {
+ mux {
+ groups = "emmc_nand_d07",
+ "emmc_ds";
+ function = "emmc";
+ bias-pull-down;
+ };
+ };
+
+ nand_pullup: nand_pullup {
+ mux {
+ groups = "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ bias-pull-up;
+ };
+ };
+
+ all_nand_pins: all_nand_pins {
+ mux {
+ groups = "emmc_nand_d07",
+ "nand_ce0",
+ "nand_ce1",
+ "nand_rb0",
+ "nand_ale",
+ "nand_cle",
+ "nand_wen_clk",
+ "nand_ren_wr",
+ "nand_dqs";
+ function = "nand";
+ input-enable;
+ };
+ };
+
+ nand_cs_pins: nand_cs {
+ mux {
+ groups = "nand_ce0",
+ "nand_ce1";
+ function = "nand";
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmi_hpd";
+ function = "hdmi_hpd";
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmi_sda",
+ "hdmi_scl";
+ function = "hdmi_ddc";
+ };
+ };
+
+ a_i2c_master:a_i2c {
+ mux {
+ groups = "i2c_sda_a",
+ "i2c_scl_a";
+ function = "i2c_a";
+ };
+ };
+
+ b_i2c_master:b_i2c {
+ mux {
+ groups = "i2c_sda_b",
+ "i2c_scl_b";
+ function = "i2c_b";
+ };
+ };
+
+ /* c_i2c_master: dv28 dv29 */
+ /* c_i2c_master_pin1: dv18 dv19 */
+ c_i2c_master:c_i2c {
+ mux {
+ groups = "i2c_sda_c_dv28",
+ "i2c_scl_c_dv29";
+ function = "i2c_c";
+ };
+ };
+ c_i2c_master_pin1:c_i2c_pin1{
+ mux {
+ groups = "i2c_sda_c_dv18",
+ "i2c_scl_c_dv19";
+ function = "i2c_c";
+ };
+ };
+
+ d_i2c_master:d_i2c {
+ mux {
+ groups = "i2c_sda_d",
+ "i2c_scl_d";
+ function = "i2c_d";
+ };
+ };
+
+ spicc_pulldown_z11z12z13: spicc_pulldown_z11z12z13 {
+ mux {
+ groups = "spi_sclk_0",
+ "spi_miso_0",
+ "spi_mosi_0";
+ function = "spi";
+ };
+ };
+
+ spicc_pullup_z11z12z13: spicc_pullup_z11z12z13 {
+ mux {
+ groups = "spi_sclk_0",
+ "spi_miso_0",
+ "spi_mosi_0";
+ function = "spi";
+ };
+ };
+
+ spicc_pulldown_x8x9x11: spicc_pulldown_x8x9x11 {
+ mux {
+ groups = "spi_sclk_1",
+ "spi_miso_1",
+ "spi_mosi_1";
+ function = "spi";
+ bias-pull-down;
+ };
+ };
+
+ spicc_pullup_x8x9x11: spicc_pullup_x8x9x11 {
+ mux {
+ groups = "spi_sclk_1",
+ "spi_miso_1",
+ "spi_mosi_1";
+ function = "spi";
+ bias-pull-up;
+ };
+ };
+
+ audio_i2s_pins:audio_i2s {
+ mux {
+ groups = "i2s_am_clk",
+ "i2s_ao_clk_out",
+ "i2s_lr_clk_out",
+ "i2sout_ch01";
+ function = "i2s";
+ };
+ };
+
+ audio_spdif_pins:audio_spdif {
+ mux {
+ groups = "spdif_out";
+ function = "spdif_out";
+ };
+ };
+
+ audio_spdif_in_pins:audio_spdif_in {
+ mux {
+ groups = "spdif_in_z14";
+ function = "spdif_in";
+ };
+ };
+
+ audio_spdif_in_1_pins:audio_spdif_in_1 {
+ mux {
+ groups = "spdif_in_h4";
+ function = "spdif_in";
+ };
+ };
+
+ audio_pcm_pins:audio_pcm {
+ mux {
+ groups = "pcm_out_a",
+ "pcm_in_a",
+ "pcm_fs_a",
+ "pcm_clk_a";
+ function = "pcm_a";
+ };
+ };
+ aml_dmic_pins:audio_dmic {
+ mux {
+ groups = "dmic_in_dv24",
+ "dmic_clk_dv25";
+ function = "dmic";
+ };
+ };
+ dvb_p_ts0_pins: dvb_p_ts0_pins {
+ tsin_a {
+ groups = "tsin_sop_a_dv9",
+ "tsin_d_valid_a_dv10",
+ "tsin_d0_a_dv0",
+ "tsin_d1_7_a_dv1_7",
+ "tsin_clk_a_dv8";
+ function = "tsin_a";
+ };
+ };
+ dvb_s_ts0_pins: dvb_s_ts0_pins {
+ tsin_a {
+ groups = "tsin_sop_a_dv9",
+ "tsin_d_valid_a_dv10",
+ "tsin_clk_a_dv8",
+ "tsin_d0_a_dv0";
+ function = "tsin_a";
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+
+&periphs {
+ rng {
+ compatible = "amlogic,meson-rng";
+ reg = <0x0 0x4>;
+ quality = /bits/ 16 <1000>;
+ };
+};
+
+&cbus{
+ reset: reset-controller@4404 {
+ compatible = "amlogic,reset";
+ reg = <0x04404 0x20>;
+ #reset-cells = <1>;
+ };
+};
+
+/{
+ aml_dma {
+ compatible = "amlogic,aml_gxl_dma";
+ reg = <0xc883e000 0x28>;
+ interrupts = <0 188 1>;
+
+ aml_aes {
+ compatible = "amlogic,aes_dma";
+ dev_name = "aml_aes_dma";
+ status = "okay";
+ };
+
+ aml_tdes {
+ compatible = "amlogic,des_dma,tdes_dma";
+ dev_name = "aml_tdes_dma";
+ status = "okay";
+ };
+ };
+
+ audio_data:audio_data {
+ compatible = "amlogic, audio_data";
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ saradc: saradc {
+ compatible = "amlogic,meson-gxl-saradc";
+ status = "okay";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>, <&clkc CLKID_SARADC>,
+ <&clkc CLKID_SARADC_COMP>;
+ clock-names = "xtal", "clk81_gate", "saradc_clk";
+ interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+ reg = <0xc1108680 0x38>;
+ };
+
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ key = <&efusekey>;
+ clocks = <&clkc CLKID_EFUSE>;
+ clock-names = "efuse_clk";
+ status = "disabled";
+ };
+
+ efusekey:efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };
+
+ remote:rc@c8100580 {
+ compatible = "amlogic, aml_remote";
+ dev_name = "meson-remote";
+ reg = <0xc8100580 0x44>, /*Multi-format IR controller*/
+ <0xc8100480 0x20>; /*Legacy IR controller*/
+ status = "okay";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <0 196 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+ map = <&custom_maps>;
+ max_frame_time = <200>; /*set software decoder max frame time*/
+ };
+
+ custom_maps:custom_maps {
+ mapnum = <3>;
+ map0 = <&map_0>;
+ map1 = <&map_1>;
+ map2 = <&map_2>;
+ map_0: map_0{
+ mapname = "amlogic-remote-1";
+ customcode = <0xfb04>;
+ release_delay = <80>;
+ size = <50>; /*keymap size*/
+ keymap = <REMOTE_KEY(0x47, KEY_0)
+ REMOTE_KEY(0x13, KEY_1)
+ REMOTE_KEY(0x10, KEY_2)
+ REMOTE_KEY(0x11, KEY_3)
+ REMOTE_KEY(0x0F, KEY_4)
+ REMOTE_KEY(0x0C, KEY_5)
+ REMOTE_KEY(0x0D, KEY_6)
+ REMOTE_KEY(0x0B, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x5C, KEY_RIGHTCTRL)
+ REMOTE_KEY(0x51, KEY_F3)
+ REMOTE_KEY(0x50, KEY_F4)
+ REMOTE_KEY(0x40, KEY_F5)
+ REMOTE_KEY(0x4d, KEY_F6)
+ REMOTE_KEY(0x43, KEY_F7)
+ REMOTE_KEY(0x17, KEY_F8)
+ REMOTE_KEY(0x00, KEY_F9)
+ REMOTE_KEY(0x01, KEY_F10)
+ REMOTE_KEY(0x16, KEY_F11)
+ REMOTE_KEY(0x49, KEY_BACKSPACE)
+ REMOTE_KEY(0x06, KEY_PROPS)
+ REMOTE_KEY(0x14, KEY_UNDO)
+ REMOTE_KEY(0x44, KEY_UP)
+ REMOTE_KEY(0x1D, KEY_DOWN)
+ REMOTE_KEY(0x1C, KEY_LEFT)
+ REMOTE_KEY(0x48, KEY_RIGHT)
+ REMOTE_KEY(0x53, KEY_LEFTMETA)
+ REMOTE_KEY(0x45, KEY_PAGEUP)
+ REMOTE_KEY(0x19, KEY_PAGEDOWN)
+ REMOTE_KEY(0x52, KEY_PAUSE)
+ REMOTE_KEY(0x05, KEY_HANGEUL)
+ REMOTE_KEY(0x59, KEY_HANJA)
+ REMOTE_KEY(0x1b, KEY_SCALE)
+ REMOTE_KEY(0x04, KEY_KPCOMMA)
+ REMOTE_KEY(0x1A, KEY_POWER)
+ REMOTE_KEY(0x0A, KEY_TAB)
+ REMOTE_KEY(0x0e, KEY_MUTE)
+ REMOTE_KEY(0x1F, KEY_HOME)
+ REMOTE_KEY(0x1e, KEY_FRONT)
+ REMOTE_KEY(0x07, KEY_COPY)
+ REMOTE_KEY(0x12, KEY_OPEN)
+ REMOTE_KEY(0x54, KEY_PASTE)
+ REMOTE_KEY(0x02, KEY_FIND)
+ REMOTE_KEY(0x4f, KEY_A)
+ REMOTE_KEY(0x42, KEY_B)
+ REMOTE_KEY(0x5d, KEY_C)
+ REMOTE_KEY(0x4c, KEY_D)
+ REMOTE_KEY(0x58, KEY_CUT)
+ REMOTE_KEY(0x55, KEY_CALC)>;
+ };
+ map_1: map_1{
+ mapname = "amlogic-remote-2";
+ customcode = <0xfe01>;
+ release_delay = <80>;
+ size = <53>;
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)>;
+ };
+ map_2: map_2{
+ mapname = "amlogic-remote-3";
+ customcode = <0xbd02>;
+ release_delay = <80>;
+ size = <17>;
+ keymap = <REMOTE_KEY(0xca,103)
+ REMOTE_KEY(0xd2,108)
+ REMOTE_KEY(0x99,105)
+ REMOTE_KEY(0xc1,106)
+ REMOTE_KEY(0xce,97)
+ REMOTE_KEY(0x45,116)
+ REMOTE_KEY(0xc5,133)
+ REMOTE_KEY(0x80,113)
+ REMOTE_KEY(0xd0,15)
+ REMOTE_KEY(0xd6,125)
+ REMOTE_KEY(0x95,102)
+ REMOTE_KEY(0xdd,104)
+ REMOTE_KEY(0x8c,109)
+ REMOTE_KEY(0x89,131)
+ REMOTE_KEY(0x9c,130)
+ REMOTE_KEY(0x9a,120)
+ REMOTE_KEY(0xcd,121)>;
+ };
+ };
+ aml_reboot{
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ rtc{
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xc81000a8>;
+ timer_e_addr = <0xc1109988>;
+ init_date = "2017/01/01";
+ status = "okay";
+ };
+
+ pwm_ab: pwm@c1108550 {
+ compatible = "amlogic,gx-ee-pwm";
+ reg = <0xc1108550 0x1c>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+ clock-names = "clkin0","clkin1","clkin2","clkin3";
+ status = "disabled";
+ };
+ pwm_cd: pwm@c1108640 {
+ compatible = "amlogic,gx-ee-pwm";
+ reg = <0xc1108640 0x1c>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+ clock-names = "clkin0","clkin1","clkin2","clkin3";
+ status = "disabled";
+ };
+ pwm_ef: pwm@c11086c0 {
+ compatible = "amlogic,gx-ee-pwm";
+ reg = <0xc11086c0 0x1c>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+ clock-names = "clkin0","clkin1","clkin2","clkin3";
+ status = "disabled";
+ };
+ pwm_aoab: pwm@c8100550 {
+ compatible = "amlogic,gx-ao-pwm";
+ reg = <0xc8100550 0x1c>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,<&xtal>,<&xtal>,<&xtal>;
+ clock-names = "clkin0","clkin1","clkin2","clkin3";
+ status = "disabled";
+ };
+ ddr_bandwidth {
+ compatible = "amlogic, ddr-bandwidth";
+ status = "okay";
+ reg = <0xc8838000 0x100
+ 0xc8837000 0x100>;
+ interrupts = <0 52 1>;
+ interrupt-names = "ddr_bandwidth";
+ };
+};
+
+&gpu{
+ /*gpu max freq is 750M*/
+ tbl = <&clk125_cfg &clk285_cfg &clk400_cfg
+ &clk500_cfg &clk666_cfg &clk750_cfg &clk750_cfg>;
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/mesontxlx.dtsi
+ *
+ * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <dt-bindings/clock/amlogic,txlx-clkc.h>
+#include <dt-bindings/iio/adc/amlogic-saradc.h>
+//#include <dt-bindings/reset/aml_txlx.h>
+#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/meson_rc.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pwm/meson.h>
+#include "mesongxbb-gpu-mali450.dtsi"
+
+/ {
+ cpus:cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #cooling-cells = <2>;/* min followed by max */
+ CPU0:cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x0>;
+ //timer=<&timer_a>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+ };
+
+ CPU1:cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x1>;
+ //timer=<&timer_b>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+ };
+ CPU2:cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x2>;
+ //timer=<&timer_c>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+ };
+
+ CPU3:cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0x0 0x3>;
+ //timer=<&timer_d>;
+ enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
+ clock-names = "cpu-cluster.0";
+ //cpu-idle-states = <&SYSTEM_SLEEP_0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 0xff01>,
+ <GIC_PPI 14 0xff01>,
+ <GIC_PPI 11 0xff01>,
+ <GIC_PPI 10 0xff01>;
+ };
+
+ timer_bc {
+ compatible = "arm, meson-bc-timer";
+ reg= <0xffd0f190 0x4 0xffd0f194 0x4>;
+ timer_name = "Meson TimerF";
+ clockevent-rating=<300>;
+ clockevent-shift=<20>;
+ clockevent-features=<0x23>;
+ interrupts = <0 60 1>;
+ bit_enable=<16>;
+ bit_mode=<12>;
+ bit_resolution=<0>;
+ };
+
+ arm_pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0 137 4>;
+ reg = <0xff634400 0x1000>;
+
+ /* addr = base + offset << 2 */
+ sys_cpu_status0_offset = <0xa0>;
+
+ sys_cpu_status0_pmuirq_mask = <0xf>;
+
+ /* default 10ms */
+ relax_timer_ns = <10000000>;
+
+ /* default 10000us */
+ max_wait_cnt = <10000>;
+ };
+
+ gic: interrupt-controller@2c001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0xffc01000 0x1000>,
+ <0xffc02000 0x0100>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ meson_suspend:pm {
+ compatible = "amlogic, pm";
+ device_name = "aml_pm";
+ /*gxbaby-suspend;*/
+ status = "okay";
+ reg = <0xff8000a8 0x4>,
+ <0xff80023c 0x4>;
+ };
+
+ secmon {
+ compatible = "amlogic, secmon";
+ memory-region = <&secmon_reserved>;
+ in_base_func = <0x82000020>;
+ out_base_func = <0x82000021>;
+ reserve_mem_size = <0x00300000>;
+ };
+
+ vcodec_dec {
+ compatible = "amlogic, vcodec-dec";
+ dev_name = "aml-vcodec-dec";
+ status = "okay";
+ };
+
+ securitykey {
+ compatible = "aml, securitykey";
+ status = "okay";
+ storage_query = <0x82000060>;
+ storage_read = <0x82000061>;
+ storage_write = <0x82000062>;
+ storage_tell = <0x82000063>;
+ storage_verify = <0x82000064>;
+ storage_status = <0x82000065>;
+ storage_list = <0x82000067>;
+ storage_remove = <0x82000068>;
+ storage_in_func = <0x82000023>;
+ storage_out_func = <0x82000024>;
+ storage_block_func = <0x82000025>;
+ storage_size_func = <0x82000027>;
+ storage_set_enctype = <0x8200006A>;
+ storage_get_enctype = <0x8200006B>;
+ storage_version = <0x8200006C>;
+ };
+
+ mailbox: mhu@c883c400 {
+ compatible = "amlogic, meson_mhu";
+ reg = <0xff63c400 0x4c>, /* MHU registers */
+ <0xfffd3000 0x800>; /* Payload area */
+ interrupts = <0 209 1>, /* low priority interrupt */
+ <0 210 1>; /* high priority interrupt */
+ #mbox-cells = <1>;
+ mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
+ mboxes = <&mailbox 0 &mailbox 1>;
+ };
+
+ scpi_clocks {
+ compatible = "arm, scpi-clks";
+
+ scpi_dvfs: scpi_clocks@0 {
+ compatible = "arm, scpi-clk-indexed";
+ #clock-cells = <1>;
+ clock-indices = <0>;
+ clock-output-names = "vcpu";
+ };
+
+ };
+
+ cpu_iomap {
+ compatible = "amlogic, iomap";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base {
+ reg = <0xffd00000 0x100000>;
+ };
+ io_apb_base {
+ reg = <0xffe00000 0x100000>;
+ };
+ io_aobus_base {
+ reg = <0xff800000 0x100000>;
+ };
+ io_vapb_base {
+ reg = <0xff900000 0x50000>;
+ };
+ io_hiu_base {
+ reg = <0xff63c000 0x2000>;
+ };
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ cpu_info {
+ compatible = "amlogic, cpuinfo";
+ status = "okay";
+ cpuinfo_cmd = <0x82000044>;
+ };
+
+ aml_reboot {
+ compatible = "aml, reboot";
+ sys_reset = <0x84000009>;
+ sys_poweroff = <0x84000008>;
+ };
+
+ wdt_ee: watchdog@0xffd0f0d0 {
+ compatible = "amlogic, meson-wdt";
+ status = "watch";
+ default_timeout=<10>;
+ reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
+ reset_watchdog_time=<2>;
+ shutdown_timeout=<10>;
+ firmware_timeout=<6>;
+ suspend_timeout=<6>;
+ reg = <0xffd0f0d0 0x10>;
+ clock-names = "xtal";
+ clocks = <&xtal>;
+ };
+
+ ram-dump {
+ compatible = "amlogic, ram_dump";
+ status = "okay";
+ };
+
+ amlogic-jtag {
+ compatible = "amlogic, jtag";
+ status = "okay";
+ };
+
+ vpu {
+ compatible = "amlogic, vpu-txlx";
+ dev_name = "vpu";
+ status = "okay";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_INTR>,
+ <&clkc CLKID_GP1_PLL>,
+ <&clkc CLKID_VPU_P0_COMP>,
+ <&clkc CLKID_VPU_P1_COMP>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "vapb_clk",
+ "vpu_intr_gate",
+ "gp_pll",
+ "vpu_clk0",
+ "vpu_clk1",
+ "vpu_clk";
+ clk_level = <7>;
+ /* 0: 100.0M 1: 166.7M 2: 200.0M 3: 250.0M */
+ /* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
+ };
+
+ pinctrl_aobus: pinctrl@ff800014{
+ compatible = "amlogic,meson-txlx-aobus-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio_ao: ao-bank@ff800014{
+ reg = <0xff800014 0x8>,
+ <0xff80002c 0x4>,
+ <0xff800024 0x8>;
+ reg-names = "mux", "pull", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ pinctrl_periphs: pinctrl@ff634480{
+ compatible = "amlogic,meson-txlx-periphs-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio: banks@ff634480{
+ reg = <0xff6344b0 0x34>,
+ <0xff6344e8 0x14>,
+ <0xff634520 0x14>,
+ <0xff634430 0x3c>;
+ reg-names = "mux",
+ "pull",
+ "pull-enable",
+ "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ audio_data: audio_data {
+ compatible = "amlogic, audio_data";
+ query_licence_cmd = <0x82000050>;
+ status = "disabled";
+ };
+
+ efuse: efuse{
+ compatible = "amlogic, efuse";
+ read_cmd = <0x82000030>;
+ write_cmd = <0x82000031>;
+ get_max_cmd = <0x82000033>;
+ key = <&efusekey>;
+ //clocks = <&clkc CLKID_EFUSE>;
+ //clock-names = "efuse_clk";
+ status = "disabled";
+ };
+
+ efusekey: efusekey{
+ keynum = <4>;
+ key0 = <&key_0>;
+ key1 = <&key_1>;
+ key2 = <&key_2>;
+ key3 = <&key_3>;
+ key_0:key_0{
+ keyname = "mac";
+ offset = <0>;
+ size = <6>;
+ };
+ key_1:key_1{
+ keyname = "mac_bt";
+ offset = <6>;
+ size = <6>;
+ };
+ key_2:key_2{
+ keyname = "mac_wifi";
+ offset = <12>;
+ size = <6>;
+ };
+ key_3:key_3{
+ keyname = "usid";
+ offset = <18>;
+ size = <16>;
+ };
+ };
+
+ saradc: saradc {
+ compatible = "amlogic,meson-txlx-saradc";
+ status = "okay";
+ #io-channel-cells = <1>;
+ clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
+ clock-names = "xtal", "saradc_clk";
+ interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+ reg = <0xff809000 0x38>;
+ };
+
+ custom_maps: custom_maps {
+ mapnum = <3>;
+ map0 = <&map_0>;
+ map1 = <&map_1>;
+ map2 = <&map_2>;
+ map_0: map_0{
+ mapname = "amlogic-remote-1";
+ customcode = <0xfb04>;
+ release_delay = <80>;
+ size = <44>; /*keymap size*/
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x13, 195)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)>;
+ };
+
+ map_1: map_1{
+ mapname = "amlogic-remote-2";
+ customcode = <0xfe01>;
+ release_delay = <80>;
+ size = <57>;
+ keymap = <REMOTE_KEY(0x01, KEY_1)
+ REMOTE_KEY(0x02, KEY_2)
+ REMOTE_KEY(0x03, KEY_3)
+ REMOTE_KEY(0x04, KEY_4)
+ REMOTE_KEY(0x05, KEY_5)
+ REMOTE_KEY(0x06, KEY_6)
+ REMOTE_KEY(0x07, KEY_7)
+ REMOTE_KEY(0x08, KEY_8)
+ REMOTE_KEY(0x09, KEY_9)
+ REMOTE_KEY(0x0a, KEY_0)
+ REMOTE_KEY(0x1F, KEY_FN_F1)
+ REMOTE_KEY(0x15, KEY_MENU)
+ REMOTE_KEY(0x16, KEY_TAB)
+ REMOTE_KEY(0x0c, KEY_CHANNELUP)
+ REMOTE_KEY(0x0d, KEY_CHANNELDOWN)
+ REMOTE_KEY(0x0e, KEY_VOLUMEUP)
+ REMOTE_KEY(0x0f, KEY_VOLUMEDOWN)
+ REMOTE_KEY(0x11, KEY_HOME)
+ REMOTE_KEY(0x1c, KEY_RIGHT)
+ REMOTE_KEY(0x1b, KEY_LEFT)
+ REMOTE_KEY(0x19, KEY_UP)
+ REMOTE_KEY(0x1a, KEY_DOWN)
+ REMOTE_KEY(0x1d, KEY_ENTER)
+ REMOTE_KEY(0x17, KEY_MUTE)
+ REMOTE_KEY(0x49, KEY_FINANCE)
+ REMOTE_KEY(0x43, KEY_BACK)
+ REMOTE_KEY(0x12, KEY_FN_F4)
+ REMOTE_KEY(0x14, KEY_FN_F5)
+ REMOTE_KEY(0x18, KEY_FN_F6)
+ REMOTE_KEY(0x59, KEY_INFO)
+ REMOTE_KEY(0x5a, KEY_STOPCD)
+ REMOTE_KEY(0x10, KEY_POWER)
+ REMOTE_KEY(0x42, KEY_PREVIOUSSONG)
+ REMOTE_KEY(0x44, KEY_NEXTSONG)
+ REMOTE_KEY(0x1e, KEY_REWIND)
+ REMOTE_KEY(0x4b, KEY_FASTFORWARD)
+ REMOTE_KEY(0x58, KEY_PLAYPAUSE)
+ REMOTE_KEY(0x46, KEY_PROPS)
+ REMOTE_KEY(0x40, KEY_UNDO)
+ REMOTE_KEY(0x38, KEY_SCROLLLOCK)
+ REMOTE_KEY(0x57, KEY_FN)
+ REMOTE_KEY(0x5b, KEY_FN_ESC)
+ REMOTE_KEY(0x54, KEY_RED)
+ REMOTE_KEY(0x4c, KEY_GREEN)
+ REMOTE_KEY(0x4e, KEY_YELLOW)
+ REMOTE_KEY(0x55, KEY_BLUE)
+ REMOTE_KEY(0x53, KEY_BLUETOOTH)
+ REMOTE_KEY(0x52, KEY_WLAN)
+ REMOTE_KEY(0x39, KEY_CAMERA)
+ REMOTE_KEY(0x41, KEY_SOUND)
+ REMOTE_KEY(0x0b, KEY_QUESTION)
+ REMOTE_KEY(0x00, KEY_CHAT)
+ REMOTE_KEY(0x13, KEY_SEARCH)
+ REMOTE_KEY(0x60, KEY_CONNECT)
+ REMOTE_KEY(0x61, KEY_PROG1)
+ REMOTE_KEY(0x62, KEY_PROG2)
+ REMOTE_KEY(0x63, KEY_PROG3)>;
+ };
+ map_2: map_2{
+ mapname = "amlogic-remote-3";
+ customcode = <0xbd02>;
+ release_delay = <80>;
+ size = <17>;
+ keymap = <REMOTE_KEY(0xca,103)
+ REMOTE_KEY(0xd2,108)
+ REMOTE_KEY(0x99,105)
+ REMOTE_KEY(0xc1,106)
+ REMOTE_KEY(0xce,KEY_ENTER)
+ REMOTE_KEY(0x45,116)
+ REMOTE_KEY(0xc5,133)
+ REMOTE_KEY(0x80,113)
+ REMOTE_KEY(0xd0,15)
+ REMOTE_KEY(0xd6,125)
+ REMOTE_KEY(0x95,102)
+ REMOTE_KEY(0xdd,104)
+ REMOTE_KEY(0x8c,109)
+ REMOTE_KEY(0x89,131)
+ REMOTE_KEY(0x9c,130)
+ REMOTE_KEY(0x9a,120)
+ REMOTE_KEY(0xcd,121)>;
+ };
+ };
+
+ aml_dma {
+ compatible = "amlogic,aml_txlx_dma";
+ reg = <0xff63e000 0x48>;
+ interrupts = <0 180 1>;
+
+ aml_aes {
+ compatible = "amlogic,aes_dma";
+ dev_name = "aml_aes_dma";
+ status = "okay";
+ };
+
+ aml_tdes {
+ compatible = "amlogic,des_dma,tdes_dma";
+ dev_name = "aml_tdes_dma";
+ status = "okay";
+ };
+
+ aml_sha {
+ compatible = "amlogic,sha_dma";
+ dev_name = "aml_sha_dma";
+ status = "okay";
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cbus: cbus@ffd00000 {
+ compatible = "simple-bus";
+ reg = <0xffd00000 0x25000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xffd00000 0x25000>;
+
+ gpio_intc: interrupt-controller@f080 {
+ compatible = "amlogic,meson-gpio-intc",
+ "amlogic,meson-txlx-gpio-intc";
+ reg = <0xf080 0x10>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ amlogic,channel-interrupts =
+ <64 65 66 67 68 69 70 71>;
+ status = "okay";
+ };
+
+ meson_clk_msr {
+ compatible = "amlogic, gxl_measure";
+ reg = <0x18004 0x4
+ 0x1800c 0x4>;
+ };
+
+ i2c0: i2c@1f000 {
+ compatible = "amlogic,meson-txlx-i2c";
+ status = "disabled";
+ reg = <0x1f000 0x20>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ clock-frequency = <100000>;
+ };
+
+ i2c1: i2c@1e000 {
+ compatible = "amlogic,meson-txlx-i2c";
+ status = "disabled";
+ reg = <0x1e000 0x20>;
+ interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ clock-frequency = <100000>;
+ };
+
+ i2c2: i2c@1d000 {
+ compatible = "amlogic,meson-txlx-i2c";
+ status = "disabled";
+ reg = <0x1d000 0x20>;
+ interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ clock-frequency = <100000>;
+ };
+
+ i2c3: i2c@1c000 {
+ compatible = "amlogic,meson-txlx-i2c";
+ status = "disabled";
+ reg = <0x1c000 0x20>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ clock-frequency = <100000>;
+ };
+
+ pwm_ab: pwm@1b000 {
+ compatible = "amlogic,txlx-ee-pwm";
+ reg = <0x1b000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ /* default xtal 24m clkin0-clkin2 and
+ * clkin1-clkin3 should be set the same
+ */
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@1a000 {
+ compatible = "amlogic,txlx-ee-pwm";
+ reg = <0x1a000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@19000 {
+ compatible = "amlogic,txlx-ee-pwm";
+ reg = <0x19000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ spicc0: spi@13000 {
+ compatible = "amlogic,meson-txlx-spicc";
+ reg = <0x13000 0x3c>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC0>;
+ clock-names = "core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spicc1: spi@15000 {
+ compatible = "amlogic,meson-txlx-spicc";
+ reg = <0x15000 0x3c>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_SPICC1>;
+ clock-names = "core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ uart_A: serial@24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x24000 0x18>;
+ interrupts = <0 26 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x23000 0x18>;
+ interrupts = <0 75 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x22000 0x18>;
+ interrupts = <0 93 1>;
+ status = "disabled";
+ clocks = <&xtal
+ &clkc CLKID_UART2>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+ }; /* end of cbus */
+
+ aobus: aobus@ff800000 {
+ compatible = "simple-bus";
+ reg = <0xff800000 0xa000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff800000 0xa000>;
+
+ cpu_version {
+ reg=<0x220 0x4>;
+ };
+
+ i2c_AO: i2c@5000 {
+ compatible = "amlogic,meson-txlx-i2c";
+ status = "disabled";
+ reg = <0x05000 0x20>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkc CLKID_I2C>;
+ clock-names = "clk_i2c";
+ clock-frequency = <100000>;
+ };
+
+ aoclkc: clock-controller@0 {
+ compatible = "amlogic,txlx-aoclkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x1000>;
+ };
+
+ pwm_AO_ab: pwm@7000 {
+ compatible = "amlogic,txlx-ao-pwm";
+ reg = <0x7000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ pwm_AO_cd: pwm@2000 {
+ compatible = "amlogic,txlx-ao-pwm";
+ reg = <0x2000 0x20>;
+ #pwm-cells = <3>;
+ clocks = <&xtal>,
+ <&xtal>,
+ <&xtal>,
+ <&xtal>;
+ clock-names = "clkin0",
+ "clkin1",
+ "clkin2",
+ "clkin3";
+ status = "disabled";
+ };
+
+ meson-irblaster {
+ compatible = "amlogic, am_irblaster";
+ dev_name = "meson-irblaster";
+ status = "disable";
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ };
+
+
+ remote: rc@8040 {
+ compatible = "amlogic, aml_remote";
+ dev_name = "meson-remote";
+ reg = <0x8040 0x44>,
+ <0x8000 0x20>;
+ status = "okay";
+ protocol = <REMOTE_TYPE_NEC>;
+ interrupts = <0 196 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&remote_pins>;
+ map = <&custom_maps>;
+ /*set software decoder max frame time*/
+ max_frame_time = <200>;
+ };
+
+
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x3000 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <1>;
+ fifosize = < 64 >;
+ //pinctrl-names = "default";
+ //pinctrl-0 = <&ao_a_uart_pins>;
+ /* 0 not support; 1 support */
+ support-sysrq = <0>;
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x4000 0x18>;
+ interrupts = <0 197 1>;
+ status = "disabled";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+ };/* end of aobus */
+
+ periphs: periphs@ff634000 {
+ compatible = "simple-bus";
+ reg = <0xff634000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff634000 0x1000>;
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ reg = <0x100 0x4>;
+ quality = /bits/ 16 <1000>;
+ };
+ };/* end of periphs */
+
+ hiubus: hiubus@ff63c000 {
+ compatible = "simple-bus";
+ reg = <0xff63c000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff63c000 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,txlx-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x3fc>;
+ };
+ };/* end of hiubus*/
+ }; /* end of soc*/
+ ddr_bandwidth {
+ compatible = "amlogic, ddr-bandwidth";
+ status = "okay";
+ reg = <0xff638000 0x100
+ 0xff637000 0x100>;
+ interrupts = <0 52 1>;
+ interrupt-names = "ddr_bandwidth";
+ };
+
+ cpu_ver_name {
+ compatible = "amlogic, cpu-major-id-txlx";
+ };
+}; /* end of / */
+
+&pinctrl_aobus {
+ ao_a_uart_pins:ao_a_uart {
+ mux {
+ groups = "uart_tx_ao_a",
+ "uart_rx_ao_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ ao_b_uart_pins:ao_b_uart {
+ mux {
+ groups = "uart_tx_ao_b_ao4",
+ "uart_rx_ao_b_ao5";
+ function = "uart_ao_b";
+ };
+ };
+
+ sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
+ mux {
+ groups = "GPIOAO_0",
+ "GPIOAO_1";
+ function = "gpio_aobus";
+ };
+ };
+
+ sd_to_ao_uart_pins:sd_to_ao_uart_pins {
+ mux {
+ groups = "uart_tx_ao_a",
+ "uart_rx_ao_a";
+ function = "uart_ao_a";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ hdmitx_aocec: ao_cec {
+ mux {
+ groups = "ao_cec_ao7";
+ function = "ao_cec";
+ };
+ };
+
+ hdmitx_aocec1: ao_cec1 {
+ mux {
+ groups = "ao_cec_ao8";
+ function = "ao_cec";
+ };
+ };
+
+ hdmitx_aocecb: ao_cecb {
+ mux {
+ groups = "ao_cec_b_ao7";
+ function = "ao_cec_b";
+ };
+ };
+
+ hdmitx_aocecb1: ao_cecb1 {
+ mux {
+ groups = "ao_cec_b_ao8";
+ function = "ao_cec_b";
+ };
+ };
+
+ remote_pins:remote_pin {
+ mux {
+ groups = "remote_in";
+ function = "ir_in";
+ };
+ };
+
+ irblaster_pins:irblaster_pin {
+ mux {
+ groups = "remote_out_ao2";
+ function = "ir_out";
+ };
+ };
+
+ pwmleds_pins:pwmleds {
+
+ mux {
+ groups = "pwm_ao_a_ao3";
+ function = "pwm_ao_a";
+ };
+ };
+
+ i2c_AO_4_pins:i2c_AO_4 {
+ mux {
+ groups = "i2c_sck_ao4",
+ "i2c_sda_ao5";
+ function = "i2c_ao";
+ };
+ };
+
+ i2c_AO_10_pins:i2c_AO_10 {
+ mux {
+ groups = "i2c_sck_ao10",
+ "i2c_sda_ao11";
+ function = "i2c_ao";
+ };
+ };
+};
+
+&pinctrl_periphs {
+ a_uart_pins:a_uart {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a",
+ "uart_cts_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ b_uart_pins:b_uart {
+ mux {
+ groups = "uart_tx_b_z",
+ "uart_rx_b_z";
+ function = "uart_b";
+ };
+ };
+
+ c_uart_pins:c_uart {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c";
+ function = "uart_c";
+ };
+ };
+
+ emmc_clk_cmd_pins:emmc_clk_cmd_pins {
+ mux {
+ groups = "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_up:emmc_conf_pull_up {
+ mux {
+ groups = "emmc_nand_d07",
+ "emmc_clk",
+ "emmc_cmd";
+ function = "emmc";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ emmc_conf_pull_done:emmc_conf_pull_done {
+ mux {
+ groups = "emmc_ds";
+ function = "emmc";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ sd_clk_cmd_pins:sd_clk_cmd_pins {
+ mux {
+ groups = "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sd_all_pins:sd_all_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_d1_c",
+ "sdcard_d2_c",
+ "sdcard_d3_c",
+ "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ sd_1bit_pins:sd_1bit_pins {
+ mux {
+ groups = "sdcard_d0_c",
+ "sdcard_cmd_c",
+ "sdcard_clk_c";
+ function = "sdcard";
+ input-enable;
+ bias-pull-up;
+ };
+ };
+
+ ao_to_sd_uart_pins:ao_to_sd_uart_pins {
+ mux {
+ groups = "uart_tx_ao_a_c4",
+ "uart_rx_ao_a_c5";
+ function = "uart_ao_a_ee";
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ hdmitx_hpd: hdmitx_hpd {
+ mux {
+ groups = "hdmitx_hpd";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ hdmitx_hpd_gpio: hdmitx_hpd_gpio {
+ mux {
+ groups = "GPIOH_1";
+ function = "gpio_periphs";
+ bias-disable;
+ };
+ };
+
+ hdmitx_ddc: hdmitx_ddc {
+ mux {
+ groups = "hdmitx_sda",
+ "hdmitx_sck";
+ function = "hdmitx";
+ bias-disable;
+ };
+ };
+
+ i2c0_z_pins:i2c0_z {
+ mux {
+ groups = "i2c0_sda",
+ "i2c0_sck";
+ function = "i2c0";
+ };
+ };
+
+ i2c1_dv_pins:i2c1_z {
+ mux {
+ groups = "i2c1_sda",
+ "i2c1_sck";
+ function = "i2c1";
+ };
+ };
+
+ i2c2_h_pins:i2c2_h {
+ mux {
+ groups = "i2c2_sda",
+ "i2c2_sck";
+ function = "i2c2";
+ };
+ };
+
+ i2c3_z_pins:i2c3_z {
+ mux {
+ groups = "i2c3_sda",
+ "i2c3_sck";
+ function = "i2c3";
+ };
+ };
+
+ hdmirx_a_mux:hdmirx_a_mux {
+ mux {
+ groups = "hdmirx_hpd_a", "hdmirx_det_a",
+ "hdmirx_sda_a", "hdmirx_sck_a";
+ function = "hdmirx_a";
+ };
+ };
+
+ hdmirx_b_mux:hdmirx_b_mux {
+ mux {
+ groups = "hdmirx_hpd_b", "hdmirx_det_b",
+ "hdmirx_sda_b", "hdmirx_sck_b";
+ function = "hdmirx_b";
+ };
+ };
+
+ hdmirx_c_mux:hdmirx_c_mux {
+ mux {
+ groups = "hdmirx_hpd_c", "hdmirx_det_c",
+ "hdmirx_sda_c", "hdmirx_sck_c";
+ function = "hdmirx_c";
+ };
+ };
+
+ hdmirx_d_mux:hdmirx_d_mux {
+ mux {
+ groups = "hdmirx_hpd_d", "hdmirx_det_d",
+ "hdmirx_sda_d", "hdmirx_sck_d";
+ function = "hdmirx_d";
+ };
+ };
+
+ lcd_vbyone_pins: lcd_vbyone_pin {
+ mux {
+ groups = "vx1_lockn","vx1_htpdn";
+ function = "vbyone";
+ };
+ };
+
+ lcd_ttl_rgb_6bit_pins_on:lcd_ttl_rgb_6bit_on{
+ mux {
+ groups = "lcd_r2_7","lcd_g2_7","lcd_b2_7";
+ function = "lcd";
+ };
+ };
+ lcd_ttl_rgb_6bit_pins_off:lcd_ttl_rgb_6bit_off{
+ mux {
+ groups = "GPIOY_2","GPIOY_3","GPIOY_4","GPIOY_5",
+ "GPIOY_6","GPIOY_7", /*r2~7*/
+ "GPIOY_10","GPIOY_11","GPIOY_12","GPIOY_13",
+ "GPIOY_14","GPIOY_15", /*g2~7*/
+ "GPIOY_18","GPIOY_19","GPIOY_20","GPIOY_21",
+ "GPIOY_22","GPIOY_23"; /*b2~7*/
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+ lcd_ttl_rgb_8bit_pins_on:lcd_ttl_rgb_8bit_on{
+ mux {
+ groups = "lcd_r0_1","lcd_r2_7",
+ "lcd_g0_1","lcd_g2_7",
+ "lcd_b0_1","lcd_b2_7";
+ function = "lcd";
+ };
+ };
+ lcd_ttl_rgb_8bit_pins_off:lcd_ttl_rgb_8bit_off{
+ mux {
+ groups = "GPIOY_0","GPIOY_1","GPIOY_2","GPIOY_3",
+ "GPIOY_4","GPIOY_5", "GPIOY_6","GPIOY_7",
+ "GPIOY_8","GPIOY_9","GPIOY_10","GPIOY_11",
+ "GPIOY_12","GPIOY_13","GPIOY_14","GPIOY_15",
+ "GPIOY_16","GPIOY_17","GPIOY_18","GPIOY_19",
+ "GPIOY_20","GPIOY_21","GPIOY_22","GPIOY_23";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+ lcd_ttl_de_on_pins:lcd_ttl_de_on_pin{ /* DE + clk */
+ mux {
+ groups = "tcon_oeh","tcon_cph_y24";
+ function = "tcon";
+ };
+ };
+
+ lcd_ttl_de_off_pins:lcd_ttl_de_off_pin{ /* DE + clk */
+ mux {
+ groups = "GPIOY_24","GPIOY_25";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ lcd_ttl_hvsync_on_pins:lcd_ttl_hvsync_on_pin{ /* hvsync + clk */
+ mux_0 {
+ groups = "lcd_hs","lcd_vs";
+ function = "lcd";
+ };
+ mux_1 {
+ groups = "tcon_cph_y24";
+ function = "tcon";
+ };
+ };
+
+ lcd_ttl_hvsync_off_pins:lcd_ttl_hvsync_off_pin{ /* hvsync + clk */
+ mux {
+ groups = "GPIOY_24","GPIOY_26","GPIOY_27";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ lcd_ttl_de_hvsync_on_pins:lcd_ttl_de_hvsync_on_pin{ /*DE+hvsync+clk*/
+ mux_0 {
+ groups = "lcd_hs","lcd_vs";
+ function = "lcd";
+ };
+ mux_1 {
+ groups = "tcon_oeh","tcon_cph_y24";
+ function = "tcon";
+ };
+ };
+
+ lcd_ttl_de_hvsync_off_pins:lcd_ttl_de_hvsync_off_pin{ /*DE+hvsync+clk*/
+ mux {
+ groups = "GPIOY_24","GPIOY_25","GPIOY_26","GPIOY_27";
+ function = "gpio_periphs";
+ input-enable;
+ };
+ };
+
+ spi_a_pins: spi_a {
+ mux {
+ groups = "spi_miso_a",
+ "spi_mosi_a",
+ //"spi_ss0_a",
+ //"spi_ss1_a",
+ //"spi_ss2_a",
+ "spi_clk_a";
+ function = "spi_a";
+ };
+ };
+
+ spi_b_c_pins: spi_b_c {
+ mux {
+ groups = "spi_miso_b_c",
+ "spi_mosi_b_c",
+ //"spi_ss0_b_c",
+ //"spi_ss1_b_c",
+ //"spi_ss2_b_c",
+ "spi_clk_b_c";
+ function = "spi_b";
+ };
+ };
+
+ spi_b_dv_pins: spi_b_dv {
+ mux {
+ groups = "spi_miso_b_dv",
+ "spi_mosi_b_dv",
+ //"spi_ss0_b_dv",
+ //"spi_ss1_b_dv",
+ //"spi_ss2_b_dv",
+ "spi_clk_b_dv";
+ function = "spi_b";
+ };
+ };
+
+ wifi_32k_pins: wifi_32k_pins {
+ mux {
+ groups ="pwm_d_dv";
+ function = "pwm_d";
+ };
+ };
+};
+
+&gpu{
+ reg = <0xFFE40000 0x40000>, /*mali APB bus base address*/
+ <0xFFD04440 0x01000>, /*reset register*/
+ <0xFF800000 0x01000>, /*aobus for gpu pmu domain*/
+ <0xFF63c000 0x01000>, /*hiubus for gpu clk cntl*/
+ <0xFFD04440 0x01000>; /*reset register*/
+ tbl = <&clk125_cfg &clk285_cfg &clk400_cfg
+ &clk500_cfg &clk666_cfg &clk750_cfg &clk750_cfg>;
+};
--- /dev/null
+/*
+ * arch/arm64/boot/dts/amlogic/mesontxlx_r311-panel.dtsi
+ *
+ * Copyright (C) 2016 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/ {
+ lcd {
+ compatible = "amlogic, lcd-txlx";
+ dev_name = "lcd";
+ mode = "tv";
+ status = "okay";
+ fr_auto_policy = <1>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */
+ key_valid = <1>;
+ clocks = <&clkc CLKID_VCLK2_ENCL
+ &clkc CLKID_VCLK2_VENCL>;
+ clock-names = "encl_top_gate",
+ "encl_int_gate";
+ reg = <0xff634400 0x100>;
+ interrupts = <0 3 1
+ 0 78 1>;
+ interrupt-names = "vsync","vbyone";
+ pinctrl-names = "vbyone";
+ pinctrl-0 = <&lcd_vbyone_pins>;
+ pinctrl_version = <2>; /* for uboot */
+
+ /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
+ /* power index:(gpios_index, or extern_index, 0xff=invalid) */
+ /* power value:(0=output low, 1=output high, 2=input) */
+ /* power delay:(unit in ms) */
+ lcd_cpu-gpios = <&gpio GPIOZ_13 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_8 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_9 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_10 GPIO_ACTIVE_HIGH
+ &gpio GPIOH_4 GPIO_ACTIVE_HIGH
+ &gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
+ /*&gpio GPIOH_2 GPIO_ACTIVE_HIGH*/
+ /*&gpio GPIOH_3 GPIO_ACTIVE_HIGH*/
+ lcd_cpu_gpio_names = "GPIOZ_13","GPIOZ_8",
+ "GPIOZ_9","GPIOZ_10","GPIOH_4","GPIOH_5";
+ /*"GPIOH_2","GPIOH_3"*/
+
+ lvds_0{
+ model_name = "1080p-vfreq";
+ interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 1920 1080 /*h_active, v_active*/
+ 2200 1125 /*h_period, v_period*/
+ 8 /*lcd_bits */
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 2060 2650 /*h_period_min,max*/
+ 1100 1480 /*v_period_min,max*/
+ 120000000 160000000>; /*pclk_min,max*/
+ lcd_timing = <
+ 44 148 0 /*hs_width, hs_bp, hs_pol*/
+ 5 30 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 3 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ lvds_attr = <
+ 1 /*lvds_repack*/
+ 1 /*dual_port*/
+ 0 /*pn_swap*/
+ 0 /*port_swap*/
+ 0>; /*lane_reverse*/
+ phy_attr=<
+ 3 0 /*vswing_level, preem_level*/
+ 0 0>; /*clk vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 0 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+ lvds_1{
+ model_name = "1080p-hfreq_hdmi";
+ interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 1920 1080 /*h_active, v_active*/
+ 2200 1125 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 2080 2720 /*h_period min, max*/
+ 1100 1380 /*v_period min, max*/
+ 133940000 156000000>; /*pclk_min, max*/
+ lcd_timing = <
+ 44 148 0 /*hs_width, hs_bp, hs_pol*/
+ 5 30 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 4 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 0 /*clk_ss_level */
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ lvds_attr = <
+ 1 /*lvds_repack*/
+ 1 /*dual_port*/
+ 0 /*pn_swap*/
+ 0 /*port_swap*/
+ 0>; /*lane_reverse*/
+ phy_attr=<
+ 3 0 /*vswing_level, preem_level*/
+ 0 0>; /*clk vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 0 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+ lvds_2{
+ model_name = "768p-vfreq";
+ interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 1366 768 /*h_active, v_active*/
+ 1560 806 /*h_period, v_period*/
+ 8 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 1460 2000 /*h_period_min, max */
+ 784 1015 /*v_period_min, max */
+ 50000000 85000000>; /*pclk_min, max*/
+ lcd_timing = <
+ 56 64 0 /*hs_width, hs_bp, hs_pol*/
+ 3 28 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 3 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ lvds_attr = <
+ 1 /*lvds_repack*/
+ 0 /*dual_port*/
+ 0 /*pn_swap*/
+ 0 /*port_swap*/
+ 0>; /*lane_reverse*/
+ phy_attr=<
+ 3 0 /*vswing_level, preem_level*/
+ 0 0>; /*clk vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 0 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <0>;
+ };
+ vbyone_0{
+ model_name = "public_2region";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits */
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min, max*/
+ 2200 2760 /*v_period_min, max*/
+ 480000000 624000000>; /*pclk_min, max*/
+ lcd_timing = <
+ 33 477 0 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 1 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 2 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable */
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /* vswing_level, preem_level */
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <0 0 1 20 /*panel power on*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <3>;
+ };
+ vbyone_1{
+ model_name = "public_1region";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min, max*/
+ 2200 2790 /*v_period_min, max*/
+ 552000000 632000000>; /*pclk_min,max*/
+ lcd_timing = <
+ 33 477 0 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 1 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 1 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable*/
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /*vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <3>;
+ };
+ vbyone_2{
+ model_name = "public_2region_hdmi";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min, max*/
+ 2200 2760 /*v_period_min, max*/
+ 480000000 624000000>; /*v_period_min, max*/
+ lcd_timing = <
+ 33 477 0 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 4 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 0 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 2 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable*/
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /*vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <3>;
+ };
+ vbyone_3{
+ model_name = "BOE_HV550QU2";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min, max*/
+ 2200 2760 /*v_period_min, max*/
+ 560000000 624000000>; /*pclk_min, max*/
+ lcd_timing = <
+ 33 477 1 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 1 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 2 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable*/
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /*vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 0 3 0 10 /*3d_disable*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 3 2 0 /*3d_disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <3>;
+ };
+ vbyone_4{
+ model_name = "BOE_HV550QU2_1region";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min,max*/
+ 2200 2760 /*v_period_min,max*/
+ 560000000 624000000>; /*pclk_min, max*/
+ lcd_timing = <
+ 33 477 1 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 1 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 1 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable*/
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /*vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 0 3 0 10 /*3d_disable*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 3 2 0 /*3d_disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <3>;
+ };
+ vbyone_5{
+ model_name = "public_ldim";
+ interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
+ basic_setting = <
+ 3840 2160 /*h_active, v_active*/
+ 4400 2250 /*h_period, v_period*/
+ 10 /*lcd_bits*/
+ 16 9>; /*screen_widht, screen_height*/
+ range_setting = <
+ 4240 4800 /*h_period_min, max*/
+ 2200 2760 /*v_period_min, max*/
+ 480000000 624000000>; /*pclk_min,max*/
+ lcd_timing = <
+ 33 477 0 /*hs_width, hs_bp, hs_pol*/
+ 6 65 0>; /*vs_width, vs_bp, vs_pol*/
+ clk_attr = <
+ 2 /*fr_adj_type
+ *(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
+ * 4=hdmi_mode)
+ */
+ 1 /*clk_ss_level*/
+ 1 /*clk_auto_generate*/
+ 0>; /*pixel_clk(unit in Hz)*/
+ vbyone_attr = <
+ 8 /*lane_count*/
+ 2 /*region_num*/
+ 4 /*byte_mode*/
+ 4>; /*color_fmt*/
+ vbyone_intr_enable = <
+ 1 /*vbyone_intr_enable*/
+ 3>; /*vbyone_vsync_intr_enable*/
+ phy_attr=<3 0>; /*vswing_level, preem_level*/
+
+ /* power step: type, index, value, delay(ms) */
+ power_on_step = <
+ 0 0 1 20 /*panel power on*/
+ 2 0 0 10 /*signal enable*/
+ 0xff 0 0 0>; /*ending*/
+ power_off_step = <
+ 2 0 0 10 /*signal disable*/
+ 0 0 0 100 /*panel power off*/
+ 0xff 0 0 0>; /*ending*/
+ backlight_index = <5>;
+ };
+ }; /* end of lcd */
+
+ lcd_extern{
+ compatible = "amlogic, lcd_extern";
+ dev_name = "lcd_extern";
+ status = "okay";
+ key_valid = <1>;
+ i2c_bus = "i2c_bus_c";
+ /*pinctrl-names="extern_pins";*/
+ /*pinctrl_names_uboot = "i2c_c";*/ /* i2c_a, i2c_b, i2c_c */
+ /*pinctrl-0=<&i2c_c_master>;*/
+ /*extern-gpios = <&gpio GPIOH_2 1*/
+ /*&gpio GPIOH_3 1>;*/
+ /*extern_gpio_names = "GPIOH_2","GPIOH_3";*/
+ /*i2c_gpio_off = <0 0 1 0>; */
+ /* I2C_SCK_gpio_index, I2C_SCK_gpio_off,
+ * I2C_SDA_gpio_index, I2C_SCK_gpio_off
+ */
+
+ extern_0{
+ index = <0>;
+ extern_name = "ext_default";
+ status = "disabled";
+ type = <0>; /*0=i2c, 1=spi, 2=mipi*/
+ i2c_address = <0x1c>; /*7bit i2c_addr*/
+ i2c_second_address = <0xff>;
+ i2c_bus = "i2c_bus_c";
+ cmd_size = <0xff>; /*dynamic cmd_size*/
+
+ /* init on/off:
+ * fixed cmd_size: (type, value..., delay);
+ * cmd_size include all data.
+ * dynamic cmd_size: (type, cmd_size, value..., delay);
+ * cmd_size include value+delay.
+ */
+ /* type: 0x00=cmd(bit[3:0]=1 for second_addr),
+ * 0xf0=gpio, 0xff=ending
+ */
+ /* value: i2c or spi cmd, or gpio index & level,
+ * fill 0x0 for no use
+ */
+ /* delay: unit ms */
+ init_on = <
+ 0x00 8 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 0
+ 0x00 8 0x80 0x02 0x00 0x40 0x62 0x51 0x73 0
+ 0x00 8 0x61 0x06 0x00 0x00 0x00 0x00 0x00 0
+ 0x00 8 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 0
+ 0x00 8 0x13 0x01 0x00 0x00 0x00 0x00 0x00 0
+ 0x00 8 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 0
+ 0x00 8 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 0
+ 0x00 8 0x23 0x02 0x00 0x00 0x00 0x00 0x00 10
+ 0xff 0>; /*ending*/
+ init_off = <0xff 0>; /*ending*/
+ };
+ extern_1{
+ index = <1>;
+ extern_name = "i2c_T5800Q";
+ status = "disabled";
+ type = <0>; /* 0=i2c, 1=spi, 2=mipi */
+ i2c_address = <0x1c>; /* 7bit i2c address */
+ i2c_bus = "i2c_bus_c";
+ cmd_size = <9>;
+ };
+ };
+
+ backlight{
+ compatible = "amlogic, backlight-txlx";
+ dev_name = "backlight";
+ status = "okay";
+ key_valid = <1>;
+ pinctrl-names = "pwm_on","pwm_vs_on",
+ "pwm_combo_0_1_on",
+ "pwm_combo_0_vs_1_on",
+ "pwm_combo_0_1_vs_on";
+ pinctrl-0 = <&bl_pwm_on_pins>;
+ pinctrl-1 = <&bl_pwm_vs_on_pins>;
+ pinctrl-2 = <&bl_pwm_combo_0_on_pins
+ &bl_pwm_combo_1_on_pins>;
+ pinctrl-3 = <&bl_pwm_combo_0_vs_on_pins
+ &bl_pwm_combo_1_on_pins>;
+ pinctrl-4 = <&bl_pwm_combo_0_on_pins
+ &bl_pwm_combo_1_vs_on_pins>;
+ pinctrl_version = <2>; /* for uboot */
+ interrupts = <0 3 1>;
+ interrupt-names = "ldim_vsync";
+ bl_pwm_config = <&bl_pwm_conf>;
+
+ /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
+ /* power index:(point gpios_index, 0xff=invalid) */
+ /* power value:(0=output low, 1=output high, 2=input) */
+ /* power delay:(unit in ms) */
+ bl-gpios = <&gpio GPIOZ_4 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_6 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
+ bl_gpio_names = "GPIOZ_4","GPIOZ_6","GPIOZ_7";
+
+ backlight_0{
+ index = <0>;
+ bl_name = "backlight_pwm";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /*on_delay(ms), off_delay(ms)*/
+ bl_pwm_port = "PWM_B";
+ bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/
+ 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25>; /*duty_max(%), duty_min(%)*/
+ bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
+ };
+ backlight_1{
+ index = <1>;
+ bl_name = "backlight_pwm_vs";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /* on_delay(ms), off_delay(ms)*/
+ bl_pwm_port = "PWM_VS";
+ bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/
+ 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25>; /*duty_max(%), duty_min(%)*/
+ bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
+ };
+ backlight_2{
+ index = <2>;
+ bl_name = "backlight_pwm_combo";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /* on_delay(ms), off_delay(ms)*/
+ bl_pwm_combo_level_mapping = <255 100 /*pwm_0 range*/
+ 100 10>; /*pwm_1 range*/
+ bl_pwm_combo_port = "PWM_B","PWM_C";
+ bl_pwm_combo_attr = <1 /*pwm0 method*/
+ 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25 /*pwm0 duty_max(%), duty_min(%)*/
+ 1 /*pwm1 method*/
+ 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/
+ 100 20>; /*pwm1 duty_max(%), duty_min(%)*/
+ bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/
+ 2 0 /*pwm1 gpio_index, gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ };
+ backlight_3{
+ index = <3>;
+ bl_name = "backlight_pwm_combo";
+ bl_level_default_uboot_kernel = <31 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 410 110>; /*on_delay(ms), off_delay(ms)*/
+ bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/
+ 0 0>; /*pwm_1 range*/
+ bl_pwm_combo_port = "PWM_B","PWM_C";
+ bl_pwm_combo_attr = <1 /*pwm0 method*/
+ 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 100 25 /*pwm0 duty_max(%), duty_min(%)*/
+ 1 /*pwm1 method*/
+ 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/
+ 80 80>; /*pwm1 duty_max(%), duty_min(%)*/
+ bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/
+ 2 0 /*pwm1 gpio_index, gpio_off*/
+ 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
+ };
+ backlight_4{
+ index = <4>;
+ bl_name = "ldim_iw7027";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /*on_delay(ms), off_delay(ms)*/
+ bl_ldim_region_row_col = <1 10>;
+ bl_ldim_mode = <1>; /*1=single_side
+ * (top, bottom, left or right),
+ *2=uniform(top/bottom, left/right)
+ */
+ ldim_dev_index = <2>;
+ };
+ backlight_5{
+ index = <5>;
+ bl_name = "ldim_global";
+ bl_level_default_uboot_kernel = <100 100>;
+ bl_level_attr = <255 10 /*max, min*/
+ 128 128>; /*mid, mid_mapping*/
+ bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/
+ bl_power_attr = <0 /*en_gpio_index*/
+ 1 0 /*on_value, off_value*/
+ 200 200>; /* on_delay(ms), off_delay(ms)*/
+ bl_ldim_region_row_col = <1 1>;
+ bl_ldim_mode = <1>; /*1=single_side
+ * (top, bottom, left or right),
+ *2=uniform(top/bottom, left/right)
+ */
+ ldim_dev_index = <1>;
+ };
+ };
+
+ bl_pwm_conf:bl_pwm_conf{
+ pwm_channel_0 {
+ pwm_port_index = <1>;
+ pwms = <&pwm_ab MESON_PWM_1 30040 0>;
+ };
+ pwm_channel_1 {
+ pwm_port_index = <2>;
+ pwms = <&pwm_cd MESON_PWM_0 30040 0>;
+ };
+ };
+
+ local_dimming_device {
+ compatible = "amlogic, ldim_dev";
+ dev_name = "ldim_dev";
+ status = "okay";
+ pinctrl-names = "ldim_pwm","ldim_pwm_vs";
+ pinctrl-0 = <&ldim_pwm_pins>;
+ pinctrl-1 = <&ldim_pwm_vs_pins>;
+ pinctrl_version = <1>; /* for uboot */
+
+ /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
+ ldim_dev-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_6 GPIO_ACTIVE_HIGH
+ &gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
+ ldim_dev_gpio_names = "GPIOZ_12","GPIOZ_6","GPIOZ_7";
+
+ ldim_dev_0 {
+ index = <0>;
+ type = <0>; /*0=normal, 1=spi, 2=i2c*/
+ ldim_dev_name = "ob3350";
+ ldim_pwm_pinmux_sel = "ldim_pwm";
+ ldim_pwm_port = "PWM_B";
+ ldim_pwm_attr = <0 /* pol */
+ 200 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 50>;/*duty(%)*/
+ dim_max_min = <100 20>; /*dim_max, dim_min*/
+ en_gpio_on_off = <0 /*ldim_dev-gpios index*/
+ 1 0>; /*on_level, off_level*/
+ };
+ ldim_dev_1 {
+ index = <1>;
+ type = <0>; /*0=normal, 1=spi, 2=i2c*/
+ ldim_dev_name = "global";
+ ldim_pwm_pinmux_sel = "ldim_pwm";
+ ldim_pwm_port = "PWM_B";
+ ldim_pwm_attr = <1 /* pol */
+ 180 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 50>;/*duty(%)*/
+ dim_max_min = <100 20>; /*dim_max, dim_min*/
+ en_gpio_on_off = <2 /*ldim_dev-gpios index*/
+ 1 0>; /*on_level, off_level*/
+ };
+ ldim_dev_2 {
+ index = <2>;
+ type = <1>; /* 0=normal,1=spi,2=i2c */
+ ldim_dev_name = "iw7027";
+ ldim_pwm_pinmux_sel = "ldim_pwm_vs";
+ ldim_pwm_port = "PWM_VS";
+ ldim_pwm_attr = <1 /* pol */
+ 2 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/
+ 50>;/*duty(%)*/
+ spi_bus_num = <0>;
+ spi_chip_select = <0>;
+ spi_max_frequency = <1000000>; /* unit: hz */
+ spi_mode = <0>; /* mode: 0, 1, 2, 3 */
+ spi_cs_delay = <10 /* hold_high_delay */
+ 100>; /* clk_cs_delay (unit: us) */
+ en_gpio_on_off = <0 /* ldim_dev-gpios index */
+ 1 /* on_level */
+ 0>; /* off_level */
+ lamp_err_gpio = <0xff>;
+ /* ldim_dev-gpios index, 0xff=invalid */
+ spi_write_check = <0>; /* 0=disable, 1=enable */
+
+ dim_max_min = <0xfff 0x7f>; /* dim_max, dim_min */
+ ldim_region_mapping = <0 1 2 3 4 5 6 7 8 9>;
+
+ cmd_size = <4>;
+ /* init: (type, data..., delay),
+ * must match cmd_size for every group
+ */
+ /* type: 0x00=cmd, 0xff=ending*/
+ /* data: spi data, fill 0x0 for no use */
+ /* delay: unit ms */
+ init_on = <
+ 0x00 0x23 0x03 0x00
+ 0x00 0x24 0xff 0x00
+ 0x00 0x25 0x00 0x00
+ 0x00 0x26 0x00 0x00
+ 0x00 0x27 0x60 0x00
+ 0x00 0x29 0x00 0x00
+ 0x00 0x2a 0x00 0x00
+ 0x00 0x2b 0x00 0x00
+ 0x00 0x2c 0x73 0x00
+ 0x00 0x2d 0x37 0x00
+ 0x00 0x31 0x93 0x00
+ 0x00 0x32 0x0f 0x00
+ 0x00 0x33 0xff 0x00
+ 0x00 0x34 0xc8 0x00
+ 0x00 0x35 0xbf 0x00
+ 0xff 0x00 0x00 0x00>;
+ };
+ };
+
+}; /* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+ partitions: partitions{
+ parts = <14>;
+ part-0 = <&logo>;
+ part-1 = <&recovery>;
+ part-2 = <&misc>;
+ part-3 = <&dto>;
+ part-4 = <&cri_data>;
+ part-5 = <¶m>;
+ part-6 = <&boot>;
+ part-7 = <&rsv>;
+ part-8 = <&tee>;
+ part-9 = <&vendor>;
+ part-10 = <&odm>;
+ part-11 = <&system>;
+ part-12 = <&cache>;
+ part-13 = <&data>;
+
+ logo:logo{
+ pname = "logo";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ recovery:recovery{
+ pname = "recovery";
+ size = <0x0 0x1800000>;
+ mask = <1>;
+ };
+ misc:misc{
+ pname = "misc";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ dto:dto{
+ pname = "dto";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ cri_data:cri_data
+ {
+ pname = "cri_data";
+ size = <0x0 0x800000>;
+ mask = <2>;
+ };
+ rsv:rsv{
+ pname = "rsv";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ param:param{
+ pname = "param";
+ size = <0x0 0x1000000>;
+ mask = <2>;
+ };
+ boot:boot
+ {
+ pname = "boot";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ tee:tee{
+ pname = "tee";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ vendor:vendor
+ {
+ pname = "vendor";
+ size = <0x0 0x10000000>;
+ mask = <1>;
+ };
+ odm:odm
+ {
+ pname = "odm";
+ size = <0x0 0x10000000>;
+ mask = <1>;
+ };
+ system:system
+ {
+ pname = "system";
+ size = <0x0 0x74000000>;
+ mask = <1>;
+ };
+ cache:cache
+ {
+ pname = "cache";
+ size = <0x0 0x46000000>;
+ mask = <2>;
+ };
+ data:data
+ {
+ pname = "data";
+ size = <0xffffffff 0xffffffff>;
+ mask = <4>;
+ };
+ };
+
+ firmware {
+ android {
+ compatible = "android,firmware";
+ vbmeta {
+ compatible = "android,vbmeta";
+ parts = "boot,system,vendor";
+ by_name_prefix="/dev/block";
+ };
+ fstab {
+ compatible = "android,fstab";
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/system";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ odm {
+ compatible = "android,odm";
+ dev = "/dev/block/odm";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+ fsmgr_flags = "wait";
+ };
+ };
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+
+#include "firmware_normal.dtsi"
+
+/ {
+ partitions: partitions{
+ parts = <17>;
+ part-0 = <&logo>;
+ part-1 = <&recovery>;
+ part-2 = <&misc>;
+ part-3 = <&dto>;
+ part-4 = <&cri_data>;
+ part-5 = <¶m>;
+ part-6 = <&boot>;
+ part-7 = <&rsv>;
+ part-8 = <&metadata>;
+ part-9 = <&vbmeta>;
+ part-10 = <&tee>;
+ part-11 = <&vendor>;
+ part-12 = <&odm>;
+ part-13 = <&system>;
+ part-14 = <&product>;
+ part-15 = <&cache>;
+ part-16 = <&data>;
+
+ logo:logo{
+ pname = "logo";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ recovery:recovery{
+ pname = "recovery";
+ size = <0x0 0x1800000>;
+ mask = <1>;
+ };
+ misc:misc{
+ pname = "misc";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ dto:dto{
+ pname = "dto";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ cri_data:cri_data
+ {
+ pname = "cri_data";
+ size = <0x0 0x800000>;
+ mask = <2>;
+ };
+ rsv:rsv{
+ pname = "rsv";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ metadata:metadata{
+ pname = "metadata";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ vbmeta:vbmeta{
+ pname = "vbmeta";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ param:param{
+ pname = "param";
+ size = <0x0 0x1000000>;
+ mask = <2>;
+ };
+ boot:boot
+ {
+ pname = "boot";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ tee:tee{
+ pname = "tee";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ vendor:vendor
+ {
+ pname = "vendor";
+ size = <0x0 0x10000000>;
+ mask = <1>;
+ };
+ odm:odm
+ {
+ pname = "odm";
+ size = <0x0 0x8000000>;
+ mask = <1>;
+ };
+ system:system
+ {
+ pname = "system";
+ size = <0x0 0x50000000>;
+ mask = <1>;
+ };
+ product:product{
+ pname = "product";
+ size = <0x0 0x8000000>;
+ mask = <1>;
+ };
+ cache:cache
+ {
+ pname = "cache";
+ size = <0x0 0x46000000>;
+ mask = <2>;
+ };
+ data:data
+ {
+ pname = "data";
+ size = <0xffffffff 0xffffffff>;
+ mask = <4>;
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+
+#include "firmware_normal.dtsi"
+
+/ {
+ partitions: partitions{
+ parts = <17>;
+ part-0 = <&logo>;
+ part-1 = <&recovery>;
+ part-2 = <&misc>;
+ part-3 = <&dto>;
+ part-4 = <&cri_data>;
+ part-5 = <¶m>;
+ part-6 = <&boot>;
+ part-7 = <&rsv>;
+ part-8 = <&metadata>;
+ part-9 = <&vbmeta>;
+ part-10 = <&tee>;
+ part-11 = <&vendor>;
+ part-12 = <&odm>;
+ part-13 = <&system>;
+ part-14 = <&product>;
+ part-15 = <&cache>;
+ part-16 = <&data>;
+
+ logo:logo{
+ pname = "logo";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ recovery:recovery{
+ pname = "recovery";
+ size = <0x0 0x1800000>;
+ mask = <1>;
+ };
+ misc:misc{
+ pname = "misc";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ dto:dto{
+ pname = "dto";
+ size = <0x0 0x800000>;
+ mask = <1>;
+ };
+ cri_data:cri_data
+ {
+ pname = "cri_data";
+ size = <0x0 0x800000>;
+ mask = <2>;
+ };
+ rsv:rsv{
+ pname = "rsv";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ metadata:metadata{
+ pname = "metadata";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ vbmeta:vbmeta{
+ pname = "vbmeta";
+ size = <0x0 0x200000>;
+ mask = <1>;
+ };
+ param:param{
+ pname = "param";
+ size = <0x0 0x1000000>;
+ mask = <2>;
+ };
+ boot:boot
+ {
+ pname = "boot";
+ size = <0x0 0x1000000>;
+ mask = <1>;
+ };
+ tee:tee{
+ pname = "tee";
+ size = <0x0 0x2000000>;
+ mask = <1>;
+ };
+ vendor:vendor
+ {
+ pname = "vendor";
+ size = <0x0 0x10000000>;
+ mask = <1>;
+ };
+ odm:odm
+ {
+ pname = "odm";
+ size = <0x0 0x8000000>;
+ mask = <1>;
+ };
+ system:system
+ {
+ pname = "system";
+ size = <0x0 0x62C00000>;
+ mask = <1>;
+ };
+ product:product{
+ pname = "product";
+ size = <0x0 0x8000000>;
+ mask = <1>;
+ };
+ cache:cache
+ {
+ pname = "cache";
+ size = <0x0 0x46000000>;
+ mask = <2>;
+ };
+ data:data
+ {
+ pname = "data";
+ size = <0xffffffff 0xffffffff>;
+ mask = <4>;
+ };
+ };
+};/* end of / */
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/txlx_t962e_r321.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/meson-txlx-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mesontxlx.dtsi"
+#include "partition_mbox_normal.dtsi"
+
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "txlx_t962e_r321";
+ compatible = "amlogic, txlx";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ };
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_reserved>;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x100000 0x7ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x0>;
+ pmsg-size = <0x8000>;
+ };
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ //secos_reserved:linux,secos {
+ // status = "disabled";
+ // compatible = "amlogic, aml_secos_memory";
+ // reg = <0x0 0x05300000 0x0 0x2000000>;
+ // no-map;
+ //};
+
+
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7f800000 0x800000>;
+ };
+
+ //carveout_reserved:linux,carveout-reserve {
+ // compatible = "amlogic, idev-mem";
+ // size = <0x0 0x1000>;
+ //};
+
+ ion_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x7C00000>;
+ alignment = <0x400000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4179008(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4179008=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 5M */
+ size = <0x0800000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ linux,phandle = <5>;
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x01400000>;
+ alignment = <0x400000>;
+ };
+
+ /*vbi reserved mem*/
+ vbi_reserved:linux,vbi {
+ compatible = "amlogic, vbi-mem";
+ size = <0x100000>;
+ alloc-ranges = <0x1f800000 0x800000>;
+ };
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,
+ <&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ status = "okay";
+
+ sys {
+ label = "sysled";
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ default-state = "on"; /* keep/on/off */
+ linux,default-trigger = "none";
+ };
+
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwmleds_pins>;
+
+ sys {
+ active-low;
+ label = "sysled";
+ max-brightness = <255>;
+ pwms = <&pwm_AO_ab 0 50000 0>;
+ };
+ };
+
+ dummy-battery {
+ compatible = "amlogic, dummy-battery";
+ status = "okay";
+ };
+ dummy-charger {
+ compatible = "amlogic, dummy-charger";
+ status = "okay";
+ };
+
+ ethmac: ethernet@0xff3f0000 {
+ compatible = "amlogic, gxbb-eth-dwmac";
+ status = "okay";
+ reg = <0xff3f0000 0x10000
+ 0xff634540 0x8
+ 0xff634558 0xc
+ 0xffd01084 0x4>;
+ interrupts = <0 8 1
+ 0 9 1>;
+
+ phy-mode= "rmii";
+ mc_val_internal_phy = <0x1804>;
+ mc_val_external_phy = <0x1621>;
+ interrupt-names = "macirq",
+ "phyirq";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ internal_phy = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ meson-fb {
+ compatible = "amlogic, meson-txlx";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x01800000 0x00100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ /* 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ scale_mode = <1>;
+ /* 1920*1080*4*3 = 0x17BB000 */
+ display_size_default = <1920 1080 1920 3240 32>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+ logo_addr = "0x7f800000";
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-txlx";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 150 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff940000 0x10000>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xffd00000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xff620000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xff63c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xff800000 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0xff900000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xff638000 0x2000>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+
+
+ amvideocap {
+ compatible = "amlogic, amvideocap";
+ dev_name = "amvideocap.0";
+ status = "disabled";
+ max_size = <8>;//8M
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 6 1>;
+ interrupt-names = "de_irq";
+ clocks = <&clkc CLKID_VPU_MUX>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_mux",
+ "fclk_div4",
+ "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <250 500>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4179008>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ nr10bit-support = <1>;
+ };
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo {
+ compatible = "amlogic, amlvideo";
+ dev_name = "amlvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_txlx";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ dev_name = "hdmirx";
+ status = "okay";
+ pinctrl-names = "hdmirx_pins";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux &hdmirx_d_mux>;
+ repeat = <0>;
+ interrupts = <0 56 1>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_AUDMEAS_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "hdmirx_audmeas_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ reg = <0xffd26000 0xa00000
+ 0xff63C000 0x2000
+ 0xffe0d000 0x2000
+ 0xff63e000 0x2000
+ 0x0 0x0
+ 0xff634400 0x2000
+ 0xff646000 0x2000>;
+ };
+
+ vdin0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ dev_name = "vdin0";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0x101>;/*1:share with codec_mm;2:cma alone*/
+ /* MByte, if 10bit disable: 64M(YUV422),
+ * if 10bit enable: 64*1.5 = 96M(YUV422)
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M
+ * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <190>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x215>;
+ };
+
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-txlx";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ dev_name = "tvafe";
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0xff642000 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ memory-region = <&vbi_reserved>;
+ dev_name = "vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ reserve-iomap = "true";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tvafe_avin_detect";
+ dev_name = "tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ wb_sel = <0>;/*1:mtx ;0:gainoff*/
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_txlx";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <0>;/*1:enabel ;0:disable*/
+ };
+ amvenc_avc {
+ compatible = "amlogic, amvenc_avc";
+ //memory-region = <&amvenc_avc_reserved>;
+ //memory-region = <&avc_cma_reserved>;
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ tuner: tuner {
+ status = "okay";
+ tuner_name = "si2151_tuner";
+ tuner_i2c_adap = <&i2c1>;
+ tuner_i2c_addr = <0x60>;
+ /* tuner_xtal = <0>; */ /* unuse for si2151 */
+ /* tuner_xtal_mode = <0>; */
+ /* tuner_xtal_cap = <0>; */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0xff640000 0x2000 /* demod reg */
+ 0xff63c000 0x2000 /* hiu reg */
+ 0xff634000 0x2000 /* periphs reg */
+ 0xff648000 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev {
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
+ //gpio_en = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ };
+
+ rtc {
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xff8000a8>;
+ timer_e_addr = <0xffd0f188>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+
+ wifi {
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+ interrupts = <0 68 4>;
+ irq_trigger_type = "GPIO_IRQ_HIGH";
+ dhd_static_buf;
+ power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_32k_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf: wifi_pwm_conf {
+ pwm_channel1_conf {
+ pwms = <&pwm_cd MESON_PWM_1 30040 0>;
+ duty-cycle = <15020>;
+ times = <10>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_cd MESON_PWM_3 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe07000 0x2000>;
+ interrupts = <0 218 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ status = "disabled";
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b: sd@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe05000 0x2000>;
+ interrupts = <0 217 4>;
+ pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
+ pinctrl-0 = <&sd_clk_cmd_pins>;
+ pinctrl-1 = <&sd_all_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ non-removable;
+ disable-wp;
+ sd {
+ status = "disabled";
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+ };
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <18>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "region_code";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-txlx";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+
+ /* performance: reg_address, reg_value */
+ performance = <0x1b56 0x343
+ 0x1b05 0xf4
+ 0x1c59 0xfc48
+ 0x1b12 0x8c00
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ amhdmitx: amhdmitx {
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c2_h_pins>;
+ clocks = <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ clock-names = "hdcp22_tx_skp",
+ "hdcp22_tx_esm";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ */
+ ic_type = <6>;
+ //gpio_i2c_en = <0>;
+ //repeater_tx = <0x1>;
+ //#address-cells = <2>;
+ //#size-cells = <2>;
+ //ranges;
+ };
+
+ i2c_gpio: i2c_gpio {
+ compatible = "i2c-gpio";
+ dev_name = "i2c-gpio";
+ status = "disabled";
+ i2c-gpio,delay-us = <10>; /* 50 kHz */
+ gpios = <&gpio GPIOH_2 0
+ &gpio GPIOH_3 0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ i2c-gpio,timeout-ms = <10>;
+ i2c_gpio_edid: i2c_gpio_edid {
+ compatible = "i2c-gpio";
+ reg = <0x50 0x0 0x0 0x0>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-txlx";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TXLX"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <4>; /*all port number*/
+ ee_cec;
+ output = <1>; /*output port number*/
+ /*arc support port:bit 0-3, according to portmap*/
+ arc_port_mask = <0x8>;
+ interrupts = <0 205 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&hdmitx_aocec>;
+ pinctrl-1=<&hdmitx_aocecb>;
+ pinctrl-2=<&hdmitx_aocecb>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+
+ canvas {
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xff638000 0x2000>;
+ };
+
+ rdma {
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "okay";
+ reg = <0xff500000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ };
+
+ usb2_phy: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2";
+ status = "okay";
+ portnum = <4>;
+ reg = <0xffe09000 0x80
+ 0xffd01008 0x4>;
+ };
+
+ usb3_phy: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3";
+ status = "okay";
+ portnum = <0>;
+ reg = <0xffe09080 0x20>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0xff400000 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "gxl";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, meson-snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_audin_base {
+ reg = <0xffd03000 0x100000>;
+ };
+ io_aiu_base {
+ reg = <0xFFCFFC00 0x100000>;
+ };
+ io_eqdrc_base {
+ reg = <0xFFCFF000 0x100000>;
+ };
+ io_hiu_reset_base {
+ reg = <0xFFCFCC00 0x100000>;
+ };
+ io_isa_base {
+ reg = <0xFFD05800 0x100000>;
+ };
+ };
+
+ /* AUDIO DEVICES */
+ i2s_dai: I2S {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with audin */
+ clocks = <&clkc CLKID_MPLL3>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AMCLK_MEASURE>,
+ <&clkc CLKID_AIFIFO2>,
+ <&clkc CLKID_MIXER>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_ADC>,
+ <&clkc CLKID_AIU_TOP>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_I2S_SPDIF>,
+ <&clkc CLKID_DAC_CLK>;
+ clock-names = "mpll",
+ "mclk",
+ "top_glue",
+ "i2s_out",
+ "amclk_measure",
+ "aififo2",
+ "aud_mixer",
+ "mixer_reg",
+ "adc",
+ "top_level",
+ "aoclk",
+ "aud_in",
+ "vdac_clk";
+ compatible = "amlogic, aml-i2s-dai";
+ };
+
+ i2s2_dai: I2S2 {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with aiu */
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_AUDIN_MCLK_COMP>,
+ <&clkc CLKID_AUDIN_SCLK_COMP>,
+ <&clkc CLKID_AUDIN_LRCLK_COMP>;
+ clock-names = "audin_mpll",
+ "audin_mclk",
+ "audin_sclk",
+ "audin_lrclk";
+ compatible = "amlogic, aml-i2s2-dai";
+ };
+
+ spdif_dai: SPDIF {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-dai";
+ clocks = <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_IEC958_INT_COMP>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_IEC958_MUX>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>;
+ clock-names =
+ "mpll1",
+ "i958",
+ "mclk",
+ "spdif",
+ "clk_81",
+ "iec958",
+ "iec958_amclk";
+ };
+
+ pcm_dai: PCM {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-pcm-dai";
+ pinctrl-names = "audio_pcm";
+ /* disable pcm pin mux temporary, enable it if necessary */
+ /*pinctrl-0 = <&aml_audio_pcm>;*/
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_PCM_MCLK_COMP>,
+ <&clkc CLKID_PCM_SCLK_COMP>;
+ clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+ };
+
+ i2s_plat: i2s_platform {
+ compatible = "amlogic, aml-i2s";
+ interrupts = <0 29 1>;
+ };
+
+ pcm_plat: pcm_platform {
+ compatible = "amlogic, aml-pcm";
+ };
+
+ spdif_codec: spdif_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-codec";
+ pinctrl-names = "audio_spdif_out",
+ "audio_spdif_out_mute",
+ "audio_spdif_in",
+ "audio_spdif_in_mute";
+ pinctrl-0 = <&audio_spdif_out_pins>;
+ pinctrl-1 = <&audio_spdif_out_mute_pins>;
+ pinctrl-2 = <&audio_spdif_in_pins>;
+ pinctrl-3 = <&audio_spdif_in_mute_pins>;
+ };
+
+ pcm_codec: pcm_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pcm2BT-codec";
+ };
+ /* end of AUDIO DEVICES */
+
+ /* AUDIO board specific */
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ amlogic_codec:txlx_acodec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, txlx_acodec";
+ reg = <0xFF632000 0x1c>;
+ status = "okay";
+ };
+
+ aml_snd_tv {
+ compatible = "amlogic, txlx-snd-tv";
+ status = "okay";
+ aml-sound-card,format = "i2s";
+ aml_sound_card,name = "AML-TVAUDIO";
+ pinctrl-names = "audio_i2s";
+ pinctrl-0 = <&aml_audio_i2s>;
+ /*avout mute gpio*/
+ mute_gpio-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
+ /*switch ARC_IN & SPDIF_IN*/
+ source_switch-gpios = <&gpio GPIOZ_4 GPIO_ACTIVE_HIGH>;
+ /*analog amp mute*/
+ /*amp_mute_gpio-gpios = <&gpio GPIOZ_18 GPIO_ACTIVE_LOW>;*/
+ aux_dev = <&tas5707>;
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2 &cpudai3>;
+ codec_list = <&codec0 &codec1 &codec2 &codec3>;
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat &i2s_plat>;
+ cpudai0: cpudai0 {
+ sound-dai = <&i2s_dai>;
+ };
+ cpudai1: cpudai1 {
+ sound-dai = <&spdif_dai>;
+ };
+ cpudai2: cpudai2 {
+ sound-dai = <&pcm_dai>;
+ };
+ cpudai3: cpudai3 {
+ sound-dai = <&i2s2_dai>;
+ };
+ codec0: codec0 {
+ sound-dai = <&amlogic_codec>;
+ };
+ codec1: codec1 {
+ sound-dai = <&spdif_codec>;
+ };
+ codec2: codec2 {
+ sound-dai = <&pcm_codec>;
+ };
+ codec3: codec3 {
+ sound-dai = <&dummy_codec>;
+ };
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Speaker0_Channel_Mask = "i2s_2/3";
+ DAC0_Channel_Mask = "i2s_2/3";
+ DAC1_Channel_Mask = "i2s_2/3";
+ EQ_DRC_Channel_Mask = "i2s_2/3";
+ Spdif_samesource_Channel_Mask = "i2s_0/1";
+ };
+ };
+
+ amaudio2 {
+ compatible = "amlogic, aml_amaudio2";
+ status = "okay";
+ interrupts = <0 48 1>;
+ };
+ /* end of AUDIO board specific */
+
+ aml_sensor0: aml-sensor@0 {
+ compatible = "amlogic, aml-thermal";
+ device_name = "thermal";
+ status = "okay";
+ #thermal-sensor-cells = <1>;
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpus";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpu_core_cluster0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <437>;
+ cluster_id = <0>;
+ node_name = "mali";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "thermal_gpu_cores";
+ device_type = "gpucore";
+ };
+ };
+ cpu_cluster0:cpu_core_cluster0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore:thermal_gpu_cores {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+
+ dvb {
+ compatible = "amlogic, dvb";
+ dev_name = "dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 18 1
+ 0 24 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvrfill0_fill",
+ "dvrfill1_flush";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-txlx";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+ reg = <0xff644000 0x2000 /*dtv demod base*/
+ 0xff63c000 0x2000 /*hiu reg base*/
+ 0xff800000 0x1000 /*io_aobus_base*/
+ 0xffd01000 0x1000 /*reset*/
+ >;
+ /*move from dvbfe*/
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+ dvbfe {
+ compatible = "amlogic, dvbfe";
+ dev_name = "dvbfe";
+ status = "disabled";
+ dtv_demod0 = "AMLDEMOD";
+ fe0_dtv_demod = <0>;
+ fe0_ts = <2>;
+ fe0_dev = <0>;
+ dtv_demod0_mem = <0>;
+ dtv_demod0_spectrum = <1>;
+ dtv_demod0_cma_flag = <1>;
+ dtv_demod0_cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ tuner0 = "si2151_tuner";
+ tuner0_i2c_adap_id = <2>;
+ tuner0_i2c_addr = <0x60>;
+ //tuner0_reset_value = <0>;
+ //tuner0_reset_gpio = "GPIOY_10" ; /*GPIOX_8 76*/
+ fe0_tuner = <0>;
+ atv_demod0 = "aml_atv_demod";
+ fe0_atv_demod = <0>;
+ };
+
+ thermal-zones {
+ soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+
+ thermal-sensors = <&aml_sensor0 3>;
+
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <70000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <260000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpus 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpu_cluster0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpu 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpucore 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ };
+
+}; /* end of / */
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_z_pins>;
+
+ tas5707: tas5707@36 {
+ compatible = "ti,tas5707";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5707";
+ reg = <0x1B>;
+ reset_pin = <&gpio GPIOZ_13 GPIO_ACTIVE_LOW>;
+ eq_enable = <0>;
+ drc_enable = <0>;
+ status = "okay";
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_dv_pins>;
+};
+
+&pinctrl_periphs {
+ /*i2s*/
+ aml_audio_i2s: aml_audio_i2s {
+ mux {
+ groups = "i2s_mclk_z",
+ "i2s_sclk_z",
+ "i2s_lrclk_z",
+ "i2s_dout01_z"
+ //, "i2s_dout23_z15"
+ //, "i2s_dout45_z"
+ //, "i2s_dout67_z19"
+ //, "i2s_din01_h6"
+ //, "i2s_din23_h5"
+ //, "i2s_din23_h5"
+ //, "i2s_din67_h0"
+ ;
+ function = "i2s";
+ };
+ };
+ /*spdif*/
+ audio_spdif_out_pins: audio_spdif_out_pins {
+ mux {
+ groups = "spdif_out_z";
+ function = "spdif_out";
+ };
+ };
+ audio_spdif_out_mute_pins: audio_spdif_out_mute_pins {
+ mux {
+ groups = "GPIOZ_17";
+ function = "gpio_periphs";
+ };
+ };
+ audio_spdif_in_pins: audio_spdif_in_pins {
+ mux {
+ groups = "spdif_in_z18";
+ function = "spdif_in";
+ };
+ };
+ audio_spdif_in_mute_pins: audio_spdif_in_mute_pins {
+ mux {
+ groups = "GPIOZ_18";
+ function = "gpio_periphs";
+ };
+ };
+ /*pcm*/
+ aml_audio_pcm: aml_audio_pcm {
+ mux {
+ groups =
+ "pcm_clk_a_dv",
+ "pcm_fs_a_dv",
+ "pcm_in_a_dv",
+ "pcm_out_a_dv";
+ function = "pcm_a";
+ };
+ };
+
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&audio_data{
+ status = "okay";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_a_pins>;
+ cs-gpios = <&gpio GPIOZ_3 0>;
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/txlx_t962x_r311_1g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/meson-txlx-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mesontxlx.dtsi"
+#include "partition_mbox_normal.dtsi"
+#include "mesontxlx_r311-panel.dtsi"
+
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "txlx_t962x_r311-1g";
+ compatible = "amlogic, txlx";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ };
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_reserved>;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x100000 0x3ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x0>;
+ pmsg-size = <0x8000>;
+ };
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ //secos_reserved:linux,secos {
+ // status = "disabled";
+ // compatible = "amlogic, aml_secos_memory";
+ // reg = <0x0 0x05300000 0x0 0x2000000>;
+ // no-map;
+ //};
+
+
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x3f800000 0x800000>;
+ };
+
+ //carveout_reserved:linux,carveout-reserve {
+ // compatible = "amlogic, idev-mem";
+ // size = <0x0 0x1000>;
+ //};
+
+ ion_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x7C00000>;
+ alignment = <0x400000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4179008(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4179008=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x12000000 0x13400000>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 5M */
+ size = <0x0800000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ linux,phandle = <5>;
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x01400000>;
+ alignment = <0x400000>;
+ };
+
+ /*vbi reserved mem*/
+ vbi_reserved:linux,vbi {
+ compatible = "amlogic, vbi-mem";
+ size = <0x100000>;
+ alloc-ranges = <0x0e000000 0x800000>;
+ };
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,
+ <&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ status = "okay";
+
+ sys {
+ label = "sysled";
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ default-state = "on"; /* keep/on/off */
+ linux,default-trigger = "none";
+ };
+
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwmleds_pins>;
+
+ sys {
+ active-low;
+ label = "sysled";
+ max-brightness = <255>;
+ pwms = <&pwm_AO_ab 0 50000 0>;
+ };
+ };
+
+ ethmac: ethernet@0xff3f0000 {
+ compatible = "amlogic, gxbb-eth-dwmac";
+ status = "okay";
+ reg = <0xff3f0000 0x10000
+ 0xff634540 0x8
+ 0xff634558 0xc
+ 0xffd01084 0x4>;
+ interrupts = <0 8 1
+ 0 9 1>;
+
+ phy-mode= "rmii";
+ mc_val_internal_phy = <0x1804>;
+ mc_val_external_phy = <0x1621>;
+ interrupt-names = "macirq",
+ "phyirq";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ internal_phy = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ meson-fb {
+ compatible = "amlogic, meson-txlx";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x01800000 0x00100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ /* 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ scale_mode = <1>;
+ /* 1920*1080*4*3 = 0x17BB000 */
+ display_size_default = <1920 1080 1920 3240 32>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+ logo_addr = "0x3f800000";
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-txlx";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 150 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff940000 0x10000>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xffd00000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xff620000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xff63c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xff800000 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0xff900000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xff638000 0x2000>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+
+
+ amvideocap {
+ compatible = "amlogic, amvideocap";
+ dev_name = "amvideocap.0";
+ status = "disabled";
+ max_size = <8>;//8M
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 6 1>;
+ interrupt-names = "de_irq";
+ clocks = <&clkc CLKID_VPU_MUX>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_mux",
+ "fclk_div4",
+ "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <250 500>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4179008>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ nr10bit-support = <1>;
+ };
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo {
+ compatible = "amlogic, amlvideo";
+ dev_name = "amlvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_txlx";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ dev_name = "hdmirx";
+ status = "okay";
+ pinctrl-names = "hdmirx_pins";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux &hdmirx_d_mux>;
+ repeat = <0>;
+ interrupts = <0 56 1>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_AUDMEAS_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "hdmirx_audmeas_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ reg = <0xffd26000 0xa00000
+ 0xff63C000 0x2000
+ 0xffe0d000 0x2000
+ 0xff63e000 0x2000
+ 0x0 0x0
+ 0xff634400 0x2000
+ 0xff646000 0x2000>;
+ };
+
+ vdin0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ dev_name = "vdin0";
+ status = "okay";
+ reserve-iomap = "true";
+ /*bit0:(1:share with codec_mm;0:cma alone)*/
+ /*bit8:(1:alloc in discontinus way;0:alone in continuous way)*/
+ flag_cma = <0x101>;
+ /* MByte, if 10bit disable: 64M(YUV422),
+ * if 10bit enable: 64*1.5 = 96M(YUV422)
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M
+ * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <190>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ };
+
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-txlx";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ dev_name = "tvafe";
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0xff642000 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ memory-region = <&vbi_reserved>;
+ dev_name = "vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ reserve-iomap = "true";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tvafe_avin_detect";
+ dev_name = "tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <1>;/*1:mtx ;0:gainoff*/
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_txlx";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <1>;/*1:enabel ;0:disable*/
+ };
+ amvenc_avc {
+ compatible = "amlogic, amvenc_avc";
+ //memory-region = <&amvenc_avc_reserved>;
+ //memory-region = <&avc_cma_reserved>;
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ tuner: tuner {
+ status = "okay";
+ tuner_name = "mxl661_tuner";
+ tuner_i2c_adap = <&i2c1>;
+ tuner_i2c_addr = <0x60>;
+ tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode = <0>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(1)
+ */
+ tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0xff640000 0x2000 /* demod reg */
+ 0xff63c000 0x2000 /* hiu reg */
+ 0xff634000 0x2000 /* periphs reg */
+ 0xff648000 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev {
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ power_down_disable = <1>;
+ gpio_reset = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
+ //gpio_en = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ };
+
+ rtc {
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xff8000a8>;
+ timer_e_addr = <0xffd0f188>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+
+ wifi {
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+ interrupts = <0 68 4>;
+ irq_trigger_type = "GPIO_IRQ_HIGH";
+ dhd_static_buf;
+ power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_32k_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf: wifi_pwm_conf {
+ pwm_channel1_conf {
+ pwms = <&pwm_cd MESON_PWM_1 30040 0>;
+ duty-cycle = <15020>;
+ times = <10>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_cd MESON_PWM_3 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe07000 0x2000>;
+ interrupts = <0 218 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ status = "disabled";
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b: sd@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe05000 0x2000>;
+ interrupts = <0 217 1>;
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "ao_to_sd_jtag_pins",
+ "sd_to_ao_jtag_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ status = "disabled";
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED";
+ /* "MMC_CAP_UHS_SDR12",
+ * "MMC_CAP_UHS_SDR25",
+ * "MMC_CAP_UHS_SDR50",
+ * "MMC_CAP_UHS_SDR104";
+ */
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOH_10 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+ };
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <20>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-txlx";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+
+ /* performance: reg_address, reg_value */
+ performance = <0x1b56 0x343
+ 0x1b05 0xf4
+ 0x1c59 0xfc48
+ 0x1b12 0x8c00
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ amhdmitx: amhdmitx {
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "disabled";
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c2_h_pins>;
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ */
+ ic_type = <6>;
+ //gpio_i2c_en = <0>;
+ //repeater_tx = <0x1>;
+ //#address-cells = <2>;
+ //#size-cells = <2>;
+ //ranges;
+ };
+
+ i2c_gpio: i2c_gpio {
+ compatible = "i2c-gpio";
+ dev_name = "i2c-gpio";
+ status = "disabled";
+ i2c-gpio,delay-us = <10>; /* 50 kHz */
+ gpios = <&gpio GPIOH_2 0
+ &gpio GPIOH_3 0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ i2c-gpio,timeout-ms = <10>;
+ i2c_gpio_edid: i2c_gpio_edid {
+ compatible = "i2c-gpio";
+ reg = <0x50 0x0 0x0 0x0>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-txlx";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TXLX"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <4>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 205 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&hdmitx_aocec>;
+ pinctrl-1=<&hdmitx_aocecb>;
+ pinctrl-2=<&hdmitx_aocecb>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+
+ canvas {
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xff638000 0x2000>;
+ };
+
+ rdma {
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "okay";
+ reg = <0xff500000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ };
+
+ usb2_phy: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2";
+ status = "okay";
+ portnum = <4>;
+ reg = <0xffe09000 0x80
+ 0xffd01008 0x4>;
+ };
+
+ usb3_phy: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3";
+ status = "okay";
+ portnum = <0>;
+ reg = <0xffe09080 0x20>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0xff400000 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "gxl";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, meson-snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_audin_base {
+ reg = <0xffd03000 0x100000>;
+ };
+ io_aiu_base {
+ reg = <0xFFCFFC00 0x100000>;
+ };
+ io_eqdrc_base {
+ reg = <0xFFCFF000 0x100000>;
+ };
+ io_hiu_reset_base {
+ reg = <0xFFCFCC00 0x100000>;
+ };
+ io_isa_base {
+ reg = <0xFFD05800 0x100000>;
+ };
+ };
+
+ /* AUDIO DEVICES */
+ i2s_dai: I2S {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with audin */
+ clocks = <&clkc CLKID_MPLL3>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AMCLK_MEASURE>,
+ <&clkc CLKID_AIFIFO2>,
+ <&clkc CLKID_MIXER>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_ADC>,
+ <&clkc CLKID_AIU_TOP>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_I2S_SPDIF>,
+ <&clkc CLKID_DAC_CLK>;
+ clock-names = "mpll",
+ "mclk",
+ "top_glue",
+ "i2s_out",
+ "amclk_measure",
+ "aififo2",
+ "aud_mixer",
+ "mixer_reg",
+ "adc",
+ "top_level",
+ "aoclk",
+ "aud_in",
+ "vdac_clk";
+ compatible = "amlogic, aml-i2s-dai";
+ };
+
+ i2s2_dai: I2S2 {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with aiu */
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_AUDIN_MCLK_COMP>,
+ <&clkc CLKID_AUDIN_SCLK_COMP>,
+ <&clkc CLKID_AUDIN_LRCLK_COMP>;
+ clock-names = "audin_mpll",
+ "audin_mclk",
+ "audin_sclk",
+ "audin_lrclk";
+ compatible = "amlogic, aml-i2s2-dai";
+ };
+
+ spdif_dai: SPDIF {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-dai";
+ clocks = <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_IEC958_INT_COMP>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_IEC958_MUX>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>;
+ clock-names =
+ "mpll1",
+ "i958",
+ "mclk",
+ "spdif",
+ "clk_81",
+ "iec958",
+ "iec958_amclk";
+ };
+
+ pcm_dai: PCM {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-pcm-dai";
+ pinctrl-names = "audio_pcm";
+ /* disable pcm pin mux temporary, enable it if necessary */
+ /*pinctrl-0 = <&aml_audio_pcm>;*/
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_PCM_MCLK_COMP>,
+ <&clkc CLKID_PCM_SCLK_COMP>;
+ clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+ };
+
+ i2s_plat: i2s_platform {
+ compatible = "amlogic, aml-i2s";
+ interrupts = <0 29 1>;
+ };
+
+ pcm_plat: pcm_platform {
+ compatible = "amlogic, aml-pcm";
+ };
+
+ spdif_codec: spdif_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-codec";
+ pinctrl-names = "audio_spdif_out", "audio_spdif_out_mute";
+ pinctrl-0 = <&audio_spdif_out_pins>;
+ pinctrl-1 = <&audio_spdif_out_mute_pins>;
+ };
+
+ pcm_codec: pcm_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pcm2BT-codec";
+ };
+ /* end of AUDIO DEVICES */
+
+ /* AUDIO board specific */
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ amlogic_codec:txlx_acodec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, txlx_acodec";
+ reg = <0xFF632000 0x1c>;
+ status = "okay";
+ };
+
+ aml_snd_tv {
+ compatible = "amlogic, txlx-snd-tv";
+ status = "okay";
+ aml-sound-card,format = "i2s";
+ aml_sound_card,name = "AML-TVAUDIO";
+ pinctrl-names = "audio_i2s";
+ pinctrl-0 = <&aml_audio_i2s>;
+ /*avout mute gpio*/
+ mute_gpio-gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
+ /*analog amp mute*/
+ /*amp_mute_gpio-gpios = <&gpio GPIOZ_18 GPIO_ACTIVE_LOW>;*/
+ aux_dev = <&tas5707>;
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2 &cpudai3>;
+ codec_list = <&codec0 &codec1 &codec2 &codec3>;
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat &i2s_plat>;
+ cpudai0: cpudai0 {
+ sound-dai = <&i2s_dai>;
+ };
+ cpudai1: cpudai1 {
+ sound-dai = <&spdif_dai>;
+ };
+ cpudai2: cpudai2 {
+ sound-dai = <&pcm_dai>;
+ };
+ cpudai3: cpudai3 {
+ sound-dai = <&i2s2_dai>;
+ };
+ codec0: codec0 {
+ sound-dai = <&amlogic_codec>;
+ };
+ codec1: codec1 {
+ sound-dai = <&spdif_codec>;
+ };
+ codec2: codec2 {
+ sound-dai = <&pcm_codec>;
+ };
+ codec3: codec3 {
+ sound-dai = <&dummy_codec>;
+ };
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Speaker0_Channel_Mask = "i2s_2/3";
+ DAC0_Channel_Mask = "i2s_2/3";
+ DAC1_Channel_Mask = "i2s_2/3";
+ EQ_DRC_Channel_Mask = "i2s_2/3";
+ Spdif_samesource_Channel_Mask = "i2s_0/1";
+ };
+ };
+
+ amaudio2 {
+ compatible = "amlogic, aml_amaudio2";
+ status = "okay";
+ interrupts = <0 48 1>;
+ };
+ /* end of AUDIO board specific */
+
+
+ aml_sensor0: aml-sensor@0 {
+ compatible = "amlogic, aml-thermal";
+ device_name = "thermal";
+ status = "okay";
+ #thermal-sensor-cells = <1>;
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpus";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpu_core_cluster0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <437>;
+ cluster_id = <0>;
+ node_name = "mali";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "thermal_gpu_cores";
+ device_type = "gpucore";
+ };
+ };
+ cpu_cluster0:cpu_core_cluster0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore:thermal_gpu_cores {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+
+ dvb {
+ compatible = "amlogic, dvb";
+ dev_name = "dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 18 1
+ 0 24 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvrfill0_fill",
+ "dvrfill1_flush";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-txlx";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+
+ reg = <0xff644000 0x2000 /*dtv demod base*/
+ 0xff63c000 0x2000 /*hiu reg base*/
+ 0xff800000 0x1000 /*io_aobus_base*/
+ 0xffd01000 0x1000 /*reset*/
+ >;
+ /*move from dvbfe*/
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+ dvbfe {
+ compatible = "amlogic, dvbfe";
+ dev_name = "dvbfe";
+ status = "disabled";
+ dtv_demod0 = "AMLDEMOD";
+ fe0_dtv_demod = <0>;
+ fe0_ts = <2>;
+ fe0_dev = <0>;
+ dtv_demod0_mem = <0>;
+ dtv_demod0_spectrum = <1>;
+ dtv_demod0_cma_flag = <1>;
+ dtv_demod0_cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ tuner0 = "si2151_tuner";
+ tuner0_i2c_adap_id = <2>;
+ tuner0_i2c_addr = <0x60>;
+ //tuner0_reset_value = <0>;
+ //tuner0_reset_gpio = "GPIOY_10" ; /*GPIOX_8 76*/
+ fe0_tuner = <0>;
+ atv_demod0 = "aml_atv_demod";
+ fe0_atv_demod = <0>;
+ };
+
+ thermal-zones {
+ soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+
+ thermal-sensors = <&aml_sensor0 3>;
+
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <70000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <260000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpus 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpu_cluster0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpu 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpucore 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ };
+
+}; /* end of / */
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_h_pins>;
+
+ tas5707: tas5707@36 {
+ compatible = "ti,tas5707";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5707";
+ reg = <0x1B>;
+ reset_pin = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>;
+ eq_enable = <0>;
+ drc_enable = <0>;
+ status = "okay";
+ };
+
+ lcd_extern_i2c {
+ compatible = "amlogic, lcd_i2c_T5800Q";
+ status = "disabled";
+ reg = <0x1c>; /*reg_address for i2c_T5800Q*/
+ dev_name = "i2c_T5800Q";
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_dv_pins>;
+};
+
+&pinctrl_periphs {
+ /*i2s*/
+ aml_audio_i2s: aml_audio_i2s {
+ mux {
+ groups = "i2s_mclk_h",
+ "i2s_sclk_h",
+ "i2s_lrclk_h",
+ "i2s_dout01_h6";
+ function = "i2s";
+ };
+ };
+ /*spdif*/
+ audio_spdif_out_pins: audio_spdif_out_pins {
+ mux {
+ groups = "spdif_out_dv";
+ function = "spdif_out";
+ };
+ };
+ audio_spdif_out_mute_pins: audio_spdif_out_mute_pins {
+ mux {
+ groups = "GPIODV_6";
+ function = "gpio_periphs";
+ };
+ };
+ /*pcm*/
+ aml_audio_pcm: aml_audio_pcm {
+ mux {
+ groups =
+ "pcm_clk_a_dv",
+ "pcm_fs_a_dv",
+ "pcm_in_a_dv",
+ "pcm_out_a_dv";
+ function = "pcm_a";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_on_pins:bl_pwm_on_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_0_on_pins:bl_pwm_combo_0_on_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ bl_pwm_combo_1_on_pins:bl_pwm_combo_1_on_pin {
+ mux {
+ pins = "pwm_c_z";
+ function = "pwm_c";
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z7";
+ function = "pwm_vs";
+ };
+ };
+
+ /*ldim*/
+ ldim_pwm_pins:ldim_pwm_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ ldim_pwm_vs_pins:ldim_pwm_vs_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&audio_data{
+ status = "okay";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_a_pins>;
+ cs-gpios = <&gpio GPIOZ_3 0>;
+};
--- /dev/null
+/*
+ * arch/arm/boot/dts/amlogic/txlx_t962x_r311_2g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/meson-txlx-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mesontxlx.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+#include "mesontxlx_r311-panel.dtsi"
+
+/ {
+ model = "Amlogic";
+ amlogic-dt-id = "txlx_t962x_r311-2g";
+ compatible = "amlogic, txlx";
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ };
+
+ ion_dev {
+ compatible = "amlogic, ion_dev";
+ memory-region = <&ion_reserved>;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x100000 0x7ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ ramoops@0x07400000 {
+ compatible = "ramoops";
+ reg = <0x07400000 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x0>;
+ pmsg-size = <0x8000>;
+ };
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x400000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x05000000 0x400000>;
+ };
+
+ //secos_reserved:linux,secos {
+ // status = "disabled";
+ // compatible = "amlogic, aml_secos_memory";
+ // reg = <0x0 0x05300000 0x0 0x2000000>;
+ // no-map;
+ //};
+
+
+
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x800000>;
+ alignment = <0x400000>;
+ alloc-ranges = <0x7f800000 0x800000>;
+ };
+
+ //carveout_reserved:linux,carveout-reserve {
+ // compatible = "amlogic, idev-mem";
+ // size = <0x0 0x1000>;
+ //};
+
+ ion_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x7C00000>;
+ alignment = <0x400000>;
+ };
+
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4179008(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4179008=40M(0x28) support 10bit
+ */
+ size = <0x02800000>;
+ alignment = <0x400000>;
+ };
+
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "amlogic, ppmgr_memory";
+ size = <0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x13400000>;
+ alignment = <0x400000>;
+ linux,contiguous-region;
+ alloc-ranges = <0x12000000 0x13400000>;
+ };
+
+ picdec_cma_reserved:linux,picdec {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0>;
+ alignment = <0x0>;
+ linux,contiguous-region;
+ };
+
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0>;
+ alignment = <0x100000>;
+ //no-map;
+ };
+
+ demod_cma_reserved:linux,demod_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 5M */
+ size = <0x0800000>;
+ alignment = <0x400000>;
+ };
+
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ linux,phandle = <5>;
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x01400000>;
+ alignment = <0x400000>;
+ };
+
+ /*vbi reserved mem*/
+ vbi_reserved:linux,vbi {
+ compatible = "amlogic, vbi-mem";
+ size = <0x100000>;
+ alloc-ranges = <0x0e000000 0x800000>;
+ };
+ };
+
+ /* for external keypad */
+ adc_keypad {
+ compatible = "amlogic, adc_keypad";
+ status = "okay";
+ key_name = "power","up","down","enter","left","right","home";
+ key_num = <7>;
+ io-channels = <&saradc SARADC_CH2>,
+ <&saradc SARADC_CH3>;
+ io-channel-names = "key-chan-2", "key-chan-3";
+ key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+ SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+ key_code = <116 103 108 28 105 106 102>;
+ key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+ key_tolerance = <40 40 40 40 40 40 40>;
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ status = "okay";
+
+ sys {
+ label = "sysled";
+ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+ default-state = "on"; /* keep/on/off */
+ linux,default-trigger = "none";
+ };
+
+ };
+
+ pwmleds {
+ compatible = "pwm-leds";
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwmleds_pins>;
+
+ sys {
+ active-low;
+ label = "sysled";
+ max-brightness = <255>;
+ pwms = <&pwm_AO_ab 0 50000 0>;
+ };
+ };
+
+ ethmac: ethernet@0xff3f0000 {
+ compatible = "amlogic, gxbb-eth-dwmac";
+ status = "okay";
+ reg = <0xff3f0000 0x10000
+ 0xff634540 0x8
+ 0xff634558 0xc
+ 0xffd01084 0x4>;
+ interrupts = <0 8 1
+ 0 9 1>;
+
+ phy-mode= "rmii";
+ mc_val_internal_phy = <0x1804>;
+ mc_val_external_phy = <0x1621>;
+ interrupt-names = "macirq",
+ "phyirq";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+ internal_phy = <1>;
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ fr_auto_policy = <0>;
+ };
+
+ meson-fb {
+ compatible = "amlogic, meson-txlx";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x01800000 0x00100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ /* 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ scale_mode = <1>;
+ /* 1920*1080*4*3 = 0x17BB000 */
+ display_size_default = <1920 1080 1920 3240 32>;
+ pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+ logo_addr = "0x7f800000";
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-txlx";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 150 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_G2D>,
+ <&clkc CLKID_GE2D_GATE>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0xff940000 0x10000>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_cbus_base{
+ reg = <0xffd00000 0x100000>;
+ };
+ io_dos_base{
+ reg = <0xff620000 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0xff63c000 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0xff800000 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0xff900000 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0xff638000 0x2000>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ clocks = <&clkc CLKID_DOS_PARSER
+ &clkc CLKID_DEMUX
+ &clkc CLKID_DOS
+ &clkc CLKID_CLK81
+ &clkc CLKID_VDEC_MUX
+ &clkc CLKID_HCODEC_MUX
+ &clkc CLKID_HEVC_MUX>;
+ clock-names = "parser_top",
+ "demux",
+ "vdec",
+ "clk_81",
+ "clk_vdec_mux",
+ "clk_hcodec_mux",
+ "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+
+
+ amvideocap {
+ compatible = "amlogic, amvideocap";
+ dev_name = "amvideocap.0";
+ status = "disabled";
+ max_size = <8>;//8M
+ };
+
+ picdec {
+ compatible = "amlogic, picdec";
+ memory-region = <&picdec_cma_reserved>;
+ dev_name = "picdec";
+ status = "okay";
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 6 1>;
+ interrupt-names = "de_irq";
+ clocks = <&clkc CLKID_VPU_MUX>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_mux",
+ "fclk_div4",
+ "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <250 500>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4179008>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ nr10bit-support = <1>;
+ };
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+
+ amlvideo {
+ compatible = "amlogic, amlvideo";
+ dev_name = "amlvideo";
+ status = "okay";
+ };
+
+ amlvideo2_0 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <0>;
+ cma_mode = <1>;
+ };
+
+ amlvideo2_1 {
+ compatible = "amlogic, amlvideo2";
+ dev_name = "amlvideo2";
+ status = "okay";
+ amlvideo2_id = <1>;
+ cma_mode = <1>;
+ };
+
+ hdmirx {
+ compatible = "amlogic, hdmirx_txlx";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ dev_name = "hdmirx";
+ status = "okay";
+ pinctrl-names = "hdmirx_pins";
+ pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+ &hdmirx_c_mux &hdmirx_d_mux>;
+ repeat = <0>;
+ interrupts = <0 56 1>;
+ clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+ <&clkc CLKID_HDMIRX_CFG_COMP>,
+ <&clkc CLKID_HDMIRX_ACR_COMP>,
+ <&clkc CLKID_HDMIRX_AUDMEAS_COMP>,
+ <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV7>,
+ <&clkc CLKID_HDCP22_SKP_COMP>,
+ <&clkc CLKID_HDCP22_ESM_COMP>;
+ // <&clkc CLK_AUD_PLL2FS>,
+ // <&clkc CLK_AUD_PLL4FS>,
+ // <&clkc CLK_AUD_OUT>;
+ clock-names = "hdmirx_modet_clk",
+ "hdmirx_cfg_clk",
+ "hdmirx_acr_ref_clk",
+ "hdmirx_audmeas_clk",
+ "xtal",
+ "fclk_div5",
+ "fclk_div7",
+ "hdcp_rx22_skp",
+ "hdcp_rx22_esm";
+ // "hdmirx_aud_pll2fs",
+ // "hdmirx_aud_pll4f",
+ // "clk_aud_out";
+ hdmirx_id = <0>;
+ en_4k_2_2k = <0>;
+ reg = <0xffd26000 0xa00000
+ 0xff63C000 0x2000
+ 0xffe0d000 0x2000
+ 0xff63e000 0x2000
+ 0x0 0x0
+ 0xff634400 0x2000
+ 0xff646000 0x2000>;
+ };
+
+ vdin0 {
+ compatible = "amlogic, vdin";
+ /*memory-region = <&vdin0_cma_reserved>;*/
+ dev_name = "vdin0";
+ status = "okay";
+ reserve-iomap = "true";
+ /*bit0:(1:share with codec_mm;0:cma alone)*/
+ /*bit8:(1:alloc in discontinus way;0:alone in continuous way)*/
+ flag_cma = <0x101>;
+ /* MByte, if 10bit disable: 64M(YUV422),
+ * if 10bit enable: 64*1.5 = 96M(YUV422)
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ * if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 190M
+ * if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ * if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ * if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ cma_size = <190>;
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <0>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ * bit4:support yuv422 10bit full pack mode (from txl new add)
+ * bit8:use 8bit at 4k_50/60hz_10bit
+ * bit9:use 10bit at 4k_50/60hz_10bit
+ */
+ tv_bit_mode = <0x215>;
+ };
+
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ clocks = <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_VDIN_MEAS_COMP>;
+ clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ vdin_id = <1>;
+ /* vdin write mem color depth support:
+ * bit0:support 8bit
+ * bit1:support 9bit
+ * bit2:support 10bit
+ * bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ tvafe {
+ compatible = "amlogic, tvafe-txlx";
+ /*memory-region = <&tvafe_cma_reserved>;*/
+ dev_name = "tvafe";
+ status = "okay";
+ flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+ cma_size = <5>;/*MByte*/
+ reg = <0xff642000 0x2000>;/*tvafe reg base*/
+ reserve-iomap = "true";
+ tvafe_id = <0>;
+ //pinctrl-names = "default";
+ /*!!particular sequence, no more and no less!!!*/
+ tvafe_pin_mux = <
+ 3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+ 1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+ 2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+ 4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+ >;
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+ };
+
+ vbi {
+ compatible = "amlogic, vbi";
+ memory-region = <&vbi_reserved>;
+ dev_name = "vbi";
+ status = "okay";
+ interrupts = <0 83 1>;
+ reserve-iomap = "true";
+ };
+
+ tvafe_avin_detect {
+ compatible = "amlogic, tvafe_avin_detect";
+ dev_name = "tvafe_avin_detect";
+ status = "okay";
+ device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+ interrupts = <0 12 1>,
+ <0 13 1>;
+ };
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <1>;/*1:enabel ;0:disable*/
+ wb_en = <1>;/*1:enabel ;0:disable*/
+ cm_en = <1>;/*1:enabel ;0:disable*/
+ wb_sel = <1>;/*1:mtx ;0:gainoff*/
+ };
+ amdolby_vision {
+ compatible = "amlogic, dolby_vision_txlx";
+ dev_name = "aml_amdolby_vision_driver";
+ status = "okay";
+ tv_mode = <1>;/*1:enabel ;0:disable*/
+ };
+ amvenc_avc {
+ compatible = "amlogic, amvenc_avc";
+ //memory-region = <&amvenc_avc_reserved>;
+ //memory-region = <&avc_cma_reserved>;
+ dev_name = "amvenc_avc";
+ status = "okay";
+ interrupts = <0 45 1>;
+ interrupt-names = "mailbox_2";
+ };
+
+ tuner: tuner {
+ status = "okay";
+ tuner_name = "mxl661_tuner";
+ tuner_i2c_adap = <&i2c1>;
+ tuner_i2c_addr = <0x60>;
+ tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
+ tuner_xtal_mode = <0>;
+ /* NO_SHARE_XTAL(0)
+ * SLAVE_XTAL_SHARE(1)
+ */
+ tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
+ };
+
+ atv-demod {
+ compatible = "amlogic, atv-demod";
+ status = "okay";
+ tuner = <&tuner>;
+ btsc_sap_mode = <1>;
+ /* pinctrl-names="atvdemod_agc_pins"; */
+ /* pinctrl-0=<&atvdemod_agc_pins>; */
+ reg = <0xff640000 0x2000 /* demod reg */
+ 0xff63c000 0x2000 /* hiu reg */
+ 0xff634000 0x2000 /* periphs reg */
+ 0xff648000 0x2000>; /* audio reg */
+ reg_23cf = <0x88188832>;
+ /*default:0x88188832;r840 on haier:0x48188832*/
+ };
+
+ bt-dev {
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ power_down_disable = <1>;
+ gpio_reset = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
+ //gpio_en = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ };
+
+ rtc {
+ compatible = "amlogic, aml_vrtc";
+ alarm_reg_addr = <0xff8000a8>;
+ timer_e_addr = <0xffd0f188>;
+ init_date = "2015/01/01";
+ status = "okay";
+ };
+
+ wifi {
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+ interrupts = <0 68 4>;
+ irq_trigger_type = "GPIO_IRQ_HIGH";
+ dhd_static_buf;
+ power_on_pin = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_32k_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf: wifi_pwm_conf {
+ pwm_channel1_conf {
+ pwms = <&pwm_cd MESON_PWM_1 30040 0>;
+ duty-cycle = <15020>;
+ times = <10>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_cd MESON_PWM_3 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe07000 0x2000>;
+ interrupts = <0 218 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ status = "disabled";
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_1_8V_DDR",
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b: sd@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-txlx";
+ reg = <0xffe05000 0x2000>;
+ interrupts = <0 217 1>;
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins",
+ "sd_1bit_pins",
+ "sd_clk_cmd_uart_pins",
+ "sd_1bit_uart_pins",
+ "sd_to_ao_uart_pins",
+ "ao_to_sd_uart_pins",
+ "ao_to_sd_jtag_pins",
+ "sd_to_ao_jtag_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+ pinctrl-2 = <&sd_1bit_pins>;
+ pinctrl-3 = <&sd_to_ao_uart_clr_pins
+ &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+ pinctrl-4 = <&sd_to_ao_uart_clr_pins
+ &sd_1bit_pins &ao_to_sd_uart_pins>;
+ pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+ pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ status = "disabled";
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED";
+ /* "MMC_CAP_UHS_SDR12",
+ * "MMC_CAP_UHS_SDR25",
+ * "MMC_CAP_UHS_SDR50",
+ * "MMC_CAP_UHS_SDR104";
+ */
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOH_10 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ * 5:NON sdio device(means sd/mmc card)
+ */
+ };
+ };
+
+ unifykey {
+ compatible = "amlogic, unifykey";
+ status = "okay";
+
+ unifykey-num = <21>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11 = <&keysn_11>;
+ unifykey-index-12 = <&keysn_12>;
+ unifykey-index-13 = <&keysn_13>;
+ unifykey-index-14 = <&keysn_14>;
+ unifykey-index-15 = <&keysn_15>;
+ unifykey-index-16 = <&keysn_16>;
+ unifykey-index-17 = <&keysn_17>;
+ unifykey-index-18 = <&keysn_18>;
+ unifykey-index-19 = <&keysn_19>;
+ unifykey-index-20 = <&keysn_20>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "hdcp22_rx_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "hdcp22_rx_fw";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "hdcp14_rx";
+ key-device = "normal";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_14:key_14{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_15:key_15{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_16:key_16{
+ key-name = "lcd";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_17:key_17{
+ key-name = "lcd_extern";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_18:key_18{
+ key-name = "backlight";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_19:key_19{
+ key-name = "attestationkeybox";// attestation key
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_20:key_20{
+ key-name = "region_code";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ }; /* End unifykey */
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-txlx";
+ dev_name = "cvbsout";
+ status = "okay";
+ clocks = <&clkc CLKID_VCLK2_ENCI
+ &clkc CLKID_VCLK2_VENCI0
+ &clkc CLKID_VCLK2_VENCI1
+ &clkc CLKID_DAC_CLK>;
+ clock-names = "venci_top_gate",
+ "venci_0_gate",
+ "venci_1_gate",
+ "vdac_clk_gate";
+
+ /* performance: reg_address, reg_value */
+ performance = <0x1b56 0x343
+ 0x1b05 0xf4
+ 0x1c59 0xfc48
+ 0x1b12 0x8c00
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ amhdmitx: amhdmitx {
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "disabled";
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c2_h_pins>;
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ */
+ ic_type = <6>;
+ //gpio_i2c_en = <0>;
+ //repeater_tx = <0x1>;
+ //#address-cells = <2>;
+ //#size-cells = <2>;
+ //ranges;
+ };
+
+ i2c_gpio: i2c_gpio {
+ compatible = "i2c-gpio";
+ dev_name = "i2c-gpio";
+ status = "disabled";
+ i2c-gpio,delay-us = <10>; /* 50 kHz */
+ gpios = <&gpio GPIOH_2 0
+ &gpio GPIOH_3 0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ i2c-gpio,timeout-ms = <10>;
+ i2c_gpio_edid: i2c_gpio_edid {
+ compatible = "i2c-gpio";
+ reg = <0x50 0x0 0x0 0x0>;
+ };
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-txlx";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "TXLX"; /* Max Chars: 16 */
+ cec_osd_string = "AML_TV"; /* Max Chars: 14 */
+ port_num = <4>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 205 1
+ 0 199 1>;
+ interrupt-names = "hdmi_aocecb","hdmi_aocec";
+ pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+ pinctrl-0=<&hdmitx_aocec>;
+ pinctrl-1=<&hdmitx_aocecb>;
+ pinctrl-2=<&hdmitx_aocecb>;
+ reg = <0xFF80023c 0x4
+ 0xFF800000 0x400>;
+ reg-names = "ao_exit","ao";
+ };
+
+
+ canvas {
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0xff638000 0x2000>;
+ };
+
+ rdma {
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "okay";
+ reg = <0xff500000 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy>, <&usb3_phy>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ };
+
+ usb2_phy: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2";
+ status = "okay";
+ portnum = <4>;
+ reg = <0xffe09000 0x80
+ 0xffd01008 0x4>;
+ };
+
+ usb3_phy: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3";
+ status = "okay";
+ portnum = <0>;
+ reg = <0xffe09080 0x20>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0xff400000 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "gxl";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <1>;
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, meson-snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ io_audin_base {
+ reg = <0xffd03000 0x100000>;
+ };
+ io_aiu_base {
+ reg = <0xFFCFFC00 0x100000>;
+ };
+ io_eqdrc_base {
+ reg = <0xFFCFF000 0x100000>;
+ };
+ io_hiu_reset_base {
+ reg = <0xFFCFCC00 0x100000>;
+ };
+ io_isa_base {
+ reg = <0xFFD05800 0x100000>;
+ };
+ };
+
+ /* AUDIO DEVICES */
+ i2s_dai: I2S {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with audin */
+ clocks = <&clkc CLKID_MPLL3>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_AIU_GLUE>,
+ <&clkc CLKID_I2S_OUT>,
+ <&clkc CLKID_AMCLK_MEASURE>,
+ <&clkc CLKID_AIFIFO2>,
+ <&clkc CLKID_MIXER>,
+ <&clkc CLKID_MIXER_IFACE>,
+ <&clkc CLKID_ADC>,
+ <&clkc CLKID_AIU_TOP>,
+ <&clkc CLKID_AOCLK_GATE>,
+ <&clkc CLKID_I2S_SPDIF>,
+ <&clkc CLKID_DAC_CLK>;
+ clock-names = "mpll",
+ "mclk",
+ "top_glue",
+ "i2s_out",
+ "amclk_measure",
+ "aififo2",
+ "aud_mixer",
+ "mixer_reg",
+ "adc",
+ "top_level",
+ "aoclk",
+ "aud_in",
+ "vdac_clk";
+ compatible = "amlogic, aml-i2s-dai";
+ };
+
+ i2s2_dai: I2S2 {
+ #sound-dai-cells = <0>;
+ /* config mpll whether same with aiu */
+ clocks = <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_AUDIN_MCLK_COMP>,
+ <&clkc CLKID_AUDIN_SCLK_COMP>,
+ <&clkc CLKID_AUDIN_LRCLK_COMP>;
+ clock-names = "audin_mpll",
+ "audin_mclk",
+ "audin_sclk",
+ "audin_lrclk";
+ compatible = "amlogic, aml-i2s2-dai";
+ };
+
+ spdif_dai: SPDIF {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-dai";
+ clocks = <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_IEC958_INT_COMP>,
+ <&clkc CLKID_AMCLK_COMP>,
+ <&clkc CLKID_IEC958_MUX>,
+ <&clkc CLKID_CLK81>,
+ <&clkc CLKID_IEC958>,
+ <&clkc CLKID_IEC958_GATE>;
+ clock-names =
+ "mpll1",
+ "i958",
+ "mclk",
+ "spdif",
+ "clk_81",
+ "iec958",
+ "iec958_amclk";
+ };
+
+ pcm_dai: PCM {
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-pcm-dai";
+ pinctrl-names = "audio_pcm";
+ /* disable pcm pin mux temporary, enable it if necessary */
+ /*pinctrl-0 = <&aml_audio_pcm>;*/
+ clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_PCM_MCLK_COMP>,
+ <&clkc CLKID_PCM_SCLK_COMP>;
+ clock-names = "mpll0", "pcm_mclk", "pcm_sclk";
+ pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+ };
+
+ i2s_plat: i2s_platform {
+ compatible = "amlogic, aml-i2s";
+ interrupts = <0 29 1>;
+ };
+
+ pcm_plat: pcm_platform {
+ compatible = "amlogic, aml-pcm";
+ };
+
+ spdif_codec: spdif_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml-spdif-codec";
+ pinctrl-names = "audio_spdif_out", "audio_spdif_out_mute";
+ pinctrl-0 = <&audio_spdif_out_pins>;
+ pinctrl-1 = <&audio_spdif_out_mute_pins>;
+ };
+
+ pcm_codec: pcm_codec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pcm2BT-codec";
+ };
+ /* end of AUDIO DEVICES */
+
+ /* AUDIO board specific */
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+
+ amlogic_codec:txlx_acodec{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, txlx_acodec";
+ reg = <0xFF632000 0x1c>;
+ status = "okay";
+ };
+
+ aml_snd_tv {
+ compatible = "amlogic, txlx-snd-tv";
+ status = "okay";
+ aml-sound-card,format = "i2s";
+ aml_sound_card,name = "AML-TVAUDIO";
+ pinctrl-names = "audio_i2s";
+ pinctrl-0 = <&aml_audio_i2s>;
+ /*avout mute gpio*/
+ mute_gpio-gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
+ /*analog amp mute*/
+ /*amp_mute_gpio-gpios = <&gpio GPIOZ_18 GPIO_ACTIVE_LOW>;*/
+ aux_dev = <&tas5707>;
+ cpu_list = <&cpudai0 &cpudai1 &cpudai2 &cpudai3>;
+ codec_list = <&codec0 &codec1 &codec2 &codec3>;
+ plat_list = <&i2s_plat &i2s_plat &pcm_plat &i2s_plat>;
+ cpudai0: cpudai0 {
+ sound-dai = <&i2s_dai>;
+ };
+ cpudai1: cpudai1 {
+ sound-dai = <&spdif_dai>;
+ };
+ cpudai2: cpudai2 {
+ sound-dai = <&pcm_dai>;
+ };
+ cpudai3: cpudai3 {
+ sound-dai = <&i2s2_dai>;
+ };
+ codec0: codec0 {
+ sound-dai = <&amlogic_codec>;
+ };
+ codec1: codec1 {
+ sound-dai = <&spdif_codec>;
+ };
+ codec2: codec2 {
+ sound-dai = <&pcm_codec>;
+ };
+ codec3: codec3 {
+ sound-dai = <&dummy_codec>;
+ };
+ Channel_Mask {
+ /*i2s has 4 pins, 8channel, mux output*/
+ Speaker0_Channel_Mask = "i2s_2/3";
+ DAC0_Channel_Mask = "i2s_2/3";
+ DAC1_Channel_Mask = "i2s_2/3";
+ EQ_DRC_Channel_Mask = "i2s_2/3";
+ Spdif_samesource_Channel_Mask = "i2s_0/1";
+ };
+ };
+
+ amaudio2 {
+ compatible = "amlogic, aml_amaudio2";
+ status = "okay";
+ interrupts = <0 48 1>;
+ };
+ /* end of AUDIO board specific */
+
+ aml_sensor0: aml-sensor@0 {
+ compatible = "amlogic, aml-thermal";
+ device_name = "thermal";
+ status = "okay";
+ #thermal-sensor-cells = <1>;
+ cooling_devices {
+ cpufreq_cool_cluster0 {
+ min_state = <1000000>;
+ dyn_coeff = <140>;
+ cluster_id = <0>;
+ node_name = "cpus";
+ device_type = "cpufreq";
+ };
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpu_core_cluster0";
+ device_type = "cpucore";
+ };
+ gpufreq_cool {
+ min_state = <400>;
+ dyn_coeff = <437>;
+ cluster_id = <0>;
+ node_name = "mali";
+ device_type = "gpufreq";
+ };
+ gpucore_cool {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "thermal_gpu_cores";
+ device_type = "gpucore";
+ };
+ };
+ cpu_cluster0:cpu_core_cluster0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ gpucore:thermal_gpu_cores {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+
+ dvb {
+ compatible = "amlogic, dvb";
+ dev_name = "dvb";
+ status = "okay";
+ fe0_mode = "internal";
+ fe0_tuner = <&tuner>;
+ /*"parallel","serial","disable"*/
+ ts2 = "parallel";
+ ts2_control = <0>;
+ ts2_invert = <0>;
+ interrupts = <0 23 1
+ 0 5 1
+ 0 53 1
+ 0 19 1
+ 0 25 1
+ 0 18 1
+ 0 24 1>;
+ interrupt-names = "demux0_irq",
+ "demux1_irq",
+ "demux2_irq",
+ "dvr0_irq",
+ "dvr1_irq",
+ "dvrfill0_fill",
+ "dvrfill1_flush";
+ clocks = <&clkc CLKID_DEMUX
+ &clkc CLKID_ASYNC_FIFO
+ &clkc CLKID_AHB_ARB0
+ &clkc CLKID_DOS_PARSER>;
+ clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+ };
+ aml_dtv_demod {
+ compatible = "amlogic, ddemod-txlx";
+ dev_name = "aml_dtv_demod";
+ status = "okay";
+
+ //pinctrl-names="dtvdemod_agc";
+ //pinctrl-0=<&dtvdemod_agc>;
+
+
+ clocks = <&clkc CLKID_DAC_CLK>;
+ clock-names = "vdac_clk_gate";
+
+
+ reg = <0xff644000 0x2000 /*dtv demod base*/
+ 0xff63c000 0x2000 /*hiu reg base*/
+ 0xff800000 0x1000 /*io_aobus_base*/
+ 0xffd01000 0x1000 /*reset*/
+ >;
+ /*move from dvbfe*/
+ dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
+ spectrum = <1>;
+ cma_flag = <1>;
+ cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ };
+ dvbfe {
+ compatible = "amlogic, dvbfe";
+ dev_name = "dvbfe";
+ status = "disabled";
+ dtv_demod0 = "AMLDEMOD";
+ fe0_dtv_demod = <0>;
+ fe0_ts = <2>;
+ fe0_dev = <0>;
+ dtv_demod0_mem = <0>;
+ dtv_demod0_spectrum = <1>;
+ dtv_demod0_cma_flag = <1>;
+ dtv_demod0_cma_mem_size = <8>;
+ memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+ tuner0 = "si2151_tuner";
+ tuner0_i2c_adap_id = <2>;
+ tuner0_i2c_addr = <0x60>;
+ //tuner0_reset_value = <0>;
+ //tuner0_reset_gpio = "GPIOY_10" ; /*GPIOX_8 76*/
+ fe0_tuner = <0>;
+ atv_demod0 = "aml_atv_demod";
+ fe0_atv_demod = <0>;
+ };
+
+ thermal-zones {
+ soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <2150>;
+
+ thermal-sensors = <&aml_sensor0 3>;
+
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <70000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <5000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <260000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpus 0 4>;
+ contribution = <1024>;
+ };
+ cpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&cpu_cluster0 0 3>;
+ contribution = <1024>;
+ };
+ gpufreq_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpu 0 4>;
+ contribution = <1024>;
+ };
+ gpucore_cooling_map {
+ trip = <&control>;
+ cooling-device = <&gpucore 0 2>;
+ contribution = <1024>;
+ };
+ };
+ };
+ };
+
+}; /* end of / */
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c2_h_pins>;
+
+ tas5707: tas5707@36 {
+ compatible = "ti,tas5707";
+ #sound-dai-cells = <0>;
+ codec_name = "tas5707";
+ reg = <0x1B>;
+ reset_pin = <&gpio GPIODV_4 GPIO_ACTIVE_LOW>;
+ eq_enable = <0>;
+ drc_enable = <0>;
+ status = "okay";
+ };
+ lcd_extern_i2c {
+ compatible = "amlogic, lcd_i2c_T5800Q";
+ status = "disabled";
+ reg = <0x1c>; /*reg_address for i2c_T5800Q*/
+ dev_name = "i2c_T5800Q";
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <300000>;
+ pinctrl-names="default";
+ pinctrl-0=<&i2c1_dv_pins>;
+};
+
+&pinctrl_periphs {
+ /*i2s*/
+ aml_audio_i2s: aml_audio_i2s {
+ mux {
+ groups = "i2s_mclk_h",
+ "i2s_sclk_h",
+ "i2s_lrclk_h",
+ "i2s_dout01_h6";
+ function = "i2s";
+ };
+ };
+ /*spdif*/
+ /*spdif*/
+ audio_spdif_out_pins: audio_spdif_out_pins {
+ mux {
+ groups = "spdif_out_dv";
+ function = "spdif_out";
+ };
+ };
+ audio_spdif_out_mute_pins: audio_spdif_out_mute_pins {
+ mux {
+ groups = "GPIODV_6";
+ function = "gpio_periphs";
+ };
+ };
+ /*pcm*/
+ aml_audio_pcm: aml_audio_pcm {
+ mux {
+ groups =
+ "pcm_clk_a_dv",
+ "pcm_fs_a_dv",
+ "pcm_in_a_dv",
+ "pcm_out_a_dv";
+ function = "pcm_a";
+ };
+ };
+
+ /*backlight*/
+ bl_pwm_on_pins:bl_pwm_on_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_0_on_pins:bl_pwm_combo_0_on_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ bl_pwm_combo_1_on_pins:bl_pwm_combo_1_on_pin {
+ mux {
+ pins = "pwm_c_z";
+ function = "pwm_c";
+ };
+ };
+ bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+ bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+ mux {
+ pins = "pwm_vs_z7";
+ function = "pwm_vs";
+ };
+ };
+
+ /*ldim*/
+ ldim_pwm_pins:ldim_pwm_pin {
+ mux {
+ pins = "pwm_b";
+ function = "pwm_b";
+ };
+ };
+ ldim_pwm_vs_pins:ldim_pwm_vs_pin {
+ mux {
+ pins = "pwm_vs_z6";
+ function = "pwm_vs";
+ };
+ };
+};
+
+&uart_A {
+ status = "okay";
+};
+
+&audio_data{
+ status = "okay";
+};
+
+&pwm_AO_ab {
+ status = "okay";
+};
+
+&pwm_ab {
+ status = "okay";
+};
+
+&pwm_cd {
+ status = "okay";
+};
+
+&spicc0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_a_pins>;
+ cs-gpios = <&gpio GPIOZ_3 0>;
+};
--- /dev/null
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_FHANDLE is not set
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_BPF=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_JUMP_LABEL=y
+CONFIG_CC_STACKPROTECTOR_STRONG=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_DEFAULT_NOOP=y
+CONFIG_ARCH_VIRT=y
+CONFIG_ARCH_MESON=y
+CONFIG_ARM64_A32=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_PCI=y
+CONFIG_PCIE_DW_PLAT=y
+CONFIG_SMP=y
+CONFIG_SCHED_MC=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_CMA=y
+CONFIG_CMA_AREAS=15
+CONFIG_ZSMALLOC=y
+CONFIG_SECCOMP=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
+CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
+CONFIG_ARM_SCPI_CPUFREQ=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_BINFMT_MISC=y
+CONFIG_PM_AUTOSLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_ESP=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_INET_DIAG_DESTROY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_VTI=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_SECMARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_TRACE=y
+CONFIG_NETFILTER_XT_TARGET_SECMARK=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_SECURITY=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_IP6_NF_NAT=y
+CONFIG_IP6_NF_TARGET_MASQUERADE=y
+CONFIG_IP6_NF_TARGET_NPT=y
+CONFIG_L2TP=y
+CONFIG_L2TP_DEBUGFS=y
+CONFIG_L2TP_V3=y
+CONFIG_L2TP_IP=y
+CONFIG_L2TP_ETH=y
+CONFIG_BRIDGE=y
+# CONFIG_BRIDGE_IGMP_SNOOPING is not set
+CONFIG_PHONET=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_CLS_U32=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_DNS_RESOLVER=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+CONFIG_RFKILL=y
+CONFIG_AMLOGIC_DRIVER=y
+CONFIG_AMLOGIC_MODIFY=y
+CONFIG_AMLOGIC_INPUT_BOOST=y
+CONFIG_AMLOGIC_UART=y
+CONFIG_AMLOGIC_SERIAL_MESON_CONSOLE=y
+CONFIG_AMLOGIC_IOMAP=y
+CONFIG_AMLOGIC_PINCTRL=y
+CONFIG_AMLOGIC_PINCTRL_MESON_GXL=y
+CONFIG_AMLOGIC_PINCTRL_MESON_AXG=y
+CONFIG_AMLOGIC_PINCTRL_MESON_TXLX=y
+CONFIG_AMLOGIC_PINCTRL_MESON_G12A=y
+CONFIG_AMLOGIC_USB=y
+CONFIG_AMLOGIC_USB_DWC_OTG_HCD=y
+CONFIG_AMLOGIC_USB_HOST_ELECT_TEST=y
+CONFIG_AMLOGIC_USBPHY=y
+CONFIG_AMLOGIC_USB2PHY=y
+CONFIG_AMLOGIC_USB3PHY=y
+CONFIG_AMLOGIC_I2C=y
+CONFIG_AMLOGIC_I2C_SLAVE=y
+CONFIG_AMLOGIC_I2C_MASTER=y
+CONFIG_AMLOGIC_SPICC_MASTER=y
+CONFIG_AMLOGIC_SEC=y
+CONFIG_AMLOGIC_CPU_VERSION=y
+CONFIG_AMLOGIC_MESON64_VERSION=y
+CONFIG_AMLOGIC_CPU_INFO=y
+CONFIG_AMLOGIC_REG_ACCESS=y
+CONFIG_AMLOGIC_TIMER=y
+CONFIG_AMLOGIC_LOCAL_TIMER=y
+CONFIG_AMLOGIC_BC_TIMER=y
+CONFIG_AMLOGIC_CLK=y
+CONFIG_AMLOGIC_COMMON_CLK_SCPI=y
+CONFIG_AMLOGIC_GX_CLK=y
+CONFIG_AMLOGIC_CRYPTO=y
+CONFIG_AMLOGIC_CRYPTO_DMA=y
+CONFIG_AMLOGIC_INPUT=y
+CONFIG_AMLOGIC_INPUT_KEYBOARD=y
+CONFIG_AMLOGIC_ADC_KEYPADS=y
+CONFIG_AMLOGIC_GPIO_KEY=y
+CONFIG_AMLOGIC_REMOTE=y
+CONFIG_AMLOGIC_MESON_REMOTE=y
+CONFIG_AMLOGIC_TOUCHSCREEN=y
+CONFIG_AMLOGIC_TOUCHSCREEN_FTS=y
+CONFIG_AMLOGIC_TOUCHSCREEN_GT1X=y
+CONFIG_AMLOGIC_TOUCHSCREEN_GT9XX=y
+CONFIG_AMLOGIC_EFUSE=y
+CONFIG_AMLOGIC_REBOOT=y
+CONFIG_AMLOGIC_GX_REBOOT=y
+CONFIG_AMLOGIC_INTERNAL_PHY=y
+CONFIG_AMLOGIC_CPU_HOTPLUG=y
+CONFIG_AMLOGIC_PWM=y
+CONFIG_AMLOGIC_MEDIA_ENABLE=y
+CONFIG_AMLOGIC_MEDIA_COMMON=y
+CONFIG_AMLOGIC_MEDIA_DRIVERS=y
+CONFIG_AMLOGIC_MEDIA_MULTI_DEC=y
+CONFIG_AMLOGIC_MEDIA_CODEC_MM=y
+CONFIG_AMLOGIC_MEDIA_CANVAS=y
+CONFIG_AMLOGIC_MEDIA_GE2D=y
+CONFIG_AMLOGIC_ION=y
+CONFIG_AMLOGIC_MEDIA_RDMA=y
+CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA=y
+CONFIG_AMLOGIC_MEDIA_VFM=y
+CONFIG_AMLOGIC_VPU=y
+CONFIG_AMLOGIC_VIDEOBUF_RESOURCE=y
+CONFIG_AMLOGIC_MEDIA_VIDEO=y
+CONFIG_AMLOGIC_MEDIA_VIDEOCAPTURE=y
+CONFIG_AMLOGIC_VOUT=y
+CONFIG_AMLOGIC_CVBS_OUTPUT=y
+CONFIG_AMLOGIC_WSS=y
+CONFIG_AMLOGIC_VDAC=y
+CONFIG_AMLOGIC_HDMITX=y
+CONFIG_AMLOGIC_LCD=y
+CONFIG_AMLOGIC_LCD_TV=y
+CONFIG_AMLOGIC_LCD_TABLET=y
+CONFIG_AMLOGIC_LCD_EXTERN=y
+CONFIG_AMLOGIC_BACKLIGHT=y
+CONFIG_AMLOGIC_BL_EXTERN=y
+CONFIG_AMLOGIC_BL_EXTERN_I2C_LP8556=y
+CONFIG_AMLOGIC_BL_EXTERN_MIPI_LT070ME05=y
+CONFIG_AMLOGIC_LOCAL_DIMMING=y
+CONFIG_AMLOGIC_VOUT_SERVE=y
+CONFIG_AMLOGIC_VOUT2_SERVE=y
+CONFIG_AMLOGIC_MEDIA_FB=y
+CONFIG_AMLOGIC_MEDIA_FB_OSD_SYNC_FENCE=y
+CONFIG_AMLOGIC_MEDIA_FB_OSD_VSYNC_RDMA=y
+CONFIG_AMLOGIC_MEDIA_FB_OSD2_ENABLE=y
+CONFIG_AMLOGIC_MEDIA_FB_OSD2_CURSOR=y
+CONFIG_AMLOGIC_MEDIA_DEINTERLACE=y
+CONFIG_AMLOGIC_MEDIA_VIN=y
+CONFIG_AMLOGIC_MEDIA_TVIN=y
+CONFIG_AMLOGIC_MEDIA_VDIN=y
+CONFIG_AMLOGIC_MEDIA_VIUIN=y
+CONFIG_AMLOGIC_MEDIA_TVIN_BT656=y
+CONFIG_AMLOGIC_MEDIA_TVIN_HDMI_EXT=y
+CONFIG_AMLOGIC_MEDIA_TVIN_HDMI_EXT_SII9135=y
+CONFIG_AMLOGIC_MEDIA_TVIN_HDMI=y
+CONFIG_AMLOGIC_MEDIA_TVIN_AFE=y
+CONFIG_AMLOGIC_MEDIA_TVIN_VBI=y
+CONFIG_AMLOGIC_MEDIA_TVIN_AVDETECT=y
+CONFIG_AMLOGIC_MEDIA_VIDEO_PROCESSOR=y
+CONFIG_AMLOGIC_V4L_VIDEO=y
+CONFIG_AMLOGIC_V4L_VIDEO2=y
+CONFIG_AMLOGIC_POST_PROCESS_MANAGER=y
+CONFIG_AMLOGIC_POST_PROCESS_MANAGER_PPSCALER=y
+CONFIG_AMLOGIC_VIDEOBUF2_ION=y
+CONFIG_AMLOGIC_IONVIDEO=y
+CONFIG_AMLOGIC_PIC_DEC=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_VECM=y
+CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION=y
+CONFIG_AMLOGIC_MEDIA_GDC=y
+CONFIG_AMLOGIC_DTV_DEMOD=y
+CONFIG_AMLOGIC_MMC=y
+CONFIG_AMLOGIC_NAND=y
+CONFIG_AMLOGIC_VRTC=y
+CONFIG_AMLOGIC_SMARTCARD=y
+CONFIG_AMLOGIC_CEC=y
+CONFIG_AMLOGIC_UNIFYKEY=y
+CONFIG_AMLOGIC_V8_UNIFYKEY=y
+CONFIG_AMLOGIC_TEMP_SENSOR=y
+CONFIG_AMLOGIC_CPUCORE_THERMAL=y
+CONFIG_AMLOGIC_GPU_THERMAL=y
+CONFIG_AMLOGIC_GPUCORE_THERMAL=y
+CONFIG_AMLOGIC_AMAUDIO=y
+CONFIG_AMLOGIC_AMAUDIO2=y
+CONFIG_AMLOGIC_AUDIO_DSP=y
+CONFIG_AMLOGIC_AUDIO_INFO=y
+CONFIG_AMLOGIC_SUSPEND=y
+CONFIG_AMLOGIC_GX_SUSPEND=y
+CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND=y
+CONFIG_AMLOGIC_LED=y
+CONFIG_AMLOGIC_LED_SYS=y
+CONFIG_AMLOGIC_JTAG=y
+CONFIG_AMLOGIC_JTAG_MESON=y
+CONFIG_AMLOGIC_WDT=y
+CONFIG_AMLOGIC_WDT_MESON=y
+CONFIG_AMLOGIC_WDT_MESON_V3=y
+CONFIG_AMLOGIC_ESM=y
+CONFIG_AMLOGIC_WIFI=y
+CONFIG_AMLOGIC_BT_DEVICE=y
+CONFIG_AMLOGIC_PCIE=y
+CONFIG_AMLOGIC_IRBLASTER=y
+CONFIG_AMLOGIC_IIO=y
+CONFIG_AMLOGIC_SARADC=y
+CONFIG_AMLOGIC_TEE=y
+CONFIG_AMLOGIC_GPIO_IRQ=y
+CONFIG_AMLOGIC_ATV_DEMOD=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=8
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_OOPS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_UBI=y
+CONFIG_ZRAM=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_UID_SYS_STATS=y
+CONFIG_EEPROM_AT24=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_VERITY=y
+CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE=1
+CONFIG_DM_VERITY_FEC=y
+CONFIG_DM_ANDROID_VERITY=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_8139CP=y
+CONFIG_8139TOO=y
+CONFIG_8139TOO_TUNE_TWISTER=y
+CONFIG_8139TOO_8129=y
+CONFIG_8139_OLD_RX_RESET=y
+CONFIG_R8169=y
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_MESON=y
+CONFIG_AMLOGIC_ETH_PRIVE=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=y
+CONFIG_PPPOL2TP=y
+CONFIG_PPPOLAC=y
+CONFIG_PPPOPNS=y
+CONFIG_PPP_ASYNC=y
+CONFIG_USB_USBNET=y
+CONFIG_ATH10K=m
+CONFIG_ATH10K_PCI=m
+CONFIG_INPUT_POLLDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_XPAD=y
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_LEGACY_PTY_COUNT=32
+# CONFIG_DEVMEM is not set
+# CONFIG_DEVKMEM is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_DEVPORT is not set
+CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_MESON_SPICC=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_FB=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_AMLOGIC_SND_SOC_CODECS=y
+CONFIG_AMLOGIC_SND_CODEC_DUMMY_CODEC=y
+CONFIG_AMLOGIC_SND_CODEC_PCM2BT=y
+CONFIG_AMLOGIC_SND_CODEC_PDM_DUMMY_CODEC=y
+CONFIG_AMLOGIC_SND_CODEC_AMLT9015=y
+CONFIG_AMLOGIC_SND_CODEC_TXLX_ACODEC=y
+CONFIG_AMLOGIC_SND_SOC_TAS5707=y
+CONFIG_AMLOGIC_SND_SOC_TLV320ADC3101=y
+CONFIG_AMLOGIC_SND_SOC_PCM186X=y
+CONFIG_AMLOGIC_SND_SOC_SSM3525=y
+CONFIG_AMLOGIC_SND_SOC_SSM3515=y
+CONFIG_AMLOGIC_SND_SOC_TAS575X=y
+CONFIG_AMLOGIC_SND_SOC_AD82584F=y
+CONFIG_AMLOGIC_SND_SOC=y
+CONFIG_AMLOGIC_SND_SOC_MESON=y
+CONFIG_AMLOGIC_SND_SOC_AUGE=y
+CONFIG_AMLOGIC_SND_SPLIT_MODE=y
+CONFIG_AMLOGIC_SND_SOC_COMMON=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ACM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_HOST=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_ISP1301=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_MTP=y
+CONFIG_USB_CONFIGFS_F_PTP=y
+CONFIG_USB_CONFIGFS_F_ACC=y
+CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
+CONFIG_USB_CONFIGFS_UEVENT=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_ARMMMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_LEDS_TRIGGER_PANIC=y
+CONFIG_SYNC_FILE=y
+CONFIG_SW_SYNC=y
+CONFIG_UIO=y
+CONFIG_UIO_PDRV_GENIRQ=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_STAGING=y
+CONFIG_ASHMEM=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+CONFIG_PM_DEVFREQ=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+CONFIG_EXTCON=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+CONFIG_IIO_KFIFO_BUF=y
+CONFIG_PWM=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_ENCRYPTION=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+CONFIG_QUOTA_NETLINK_INTERFACE=y
+CONFIG_QFMT_V2=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_EXFAT_FS=y
+CONFIG_NTFS_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_ECRYPT_FS=y
+CONFIG_SDCARD_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RUBIN=y
+CONFIG_UBIFS_FS=y
+CONFIG_CRAMFS=y
+CONFIG_SQUASHFS=y
+CONFIG_PSTORE=y
+CONFIG_PSTORE_CONSOLE=y
+CONFIG_PSTORE_PMSG=y
+CONFIG_PSTORE_RAM=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_LOCKUP_DETECTOR=y
+CONFIG_WQ_WATCHDOG=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_PANIC_ON_RT_THROTTLING=y
+CONFIG_SCHEDSTATS=y
+CONFIG_SCHED_STACK_END_CHECK=y
+CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_STACK_TRACER=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_SECURITY_DMESG_RESTRICT=y
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+CONFIG_SECURITY_PATH=y
+CONFIG_LSM_MMAP_MIN_ADDR=0
+CONFIG_HARDENED_USERCOPY=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SMACK=y
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC7=y
u64 cval;
isb();
+#ifdef CONFIG_ARM64_A32
+ asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#else
asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
+#endif
return cval;
}
#include <asm/unwind.h>
#include <asm/memblock.h>
#include <asm/virt.h>
-
+#ifdef CONFIG_AMLOGIC_CPU_INFO
+#include <linux/amlogic/cpu_version.h>
+#endif
#include "atags.h"
{
int i, j;
u32 cpuid;
+#ifdef CONFIG_AMLOGIC_CPU_INFO
+ unsigned char chipid[CHIPID_LEN];
+#endif
for_each_online_cpu(i) {
/*
seq_printf(m, "CPU revision\t: %d\n\n", cpuid & 15);
}
+#ifdef CONFIG_AMLOGIC_CPU_INFO
+ cpuinfo_get_chipid(chipid, CHIPID_LEN);
+ seq_puts(m, "Serial\t\t: ");
+ for (i = 0; i < 16; i++)
+ seq_printf(m, "%02x", chipid[i]);
+ seq_puts(m, "\n");
+ seq_printf(m, "Hardware\t: %s\n\n", "Amlogic");
+#else
seq_printf(m, "Hardware\t: %s\n", machine_name);
seq_printf(m, "Revision\t: %04x\n", system_rev);
seq_printf(m, "Serial\t\t: %s\n", system_serial);
+#endif
return 0;
}
select GPIOLIB
select GENERIC_IRQ_CHIP
select ARM_GIC
- select CACHE_L2X0
+ select CACHE_L2X0 if !ARM64_A32
select PINCTRL
select COMMON_CLK
bool "Amlogic Meson8b SoCs support"
default ARCH_MESON
+config ARM64_A32
+ tristate "ARMV8 Run in A32"
+ default n
+ help
+ amlogic armv8 chip support 32bit.
+
endif
ret = -1;
#endif
if (ret < 0) {
- pr_err("%s, can't find back trace\n", __func__);
+ //pr_err("%s, can't find back trace\n", __func__);
return 0;
}
step++;
#endif
ip = find_back_trace();
if (!ip) {
- pr_err("can't find backtrace for page:%lx\n",
- page_to_pfn(page));
- dump_stack();
+ //pr_err("can't find backtrace for page:%lx\n",
+ // page_to_pfn(page));
+ //dump_stack();
return;
}
val = pack_ip(ip, order, flag);
struct class *aml_store_class = NULL;
struct gpt_header *gpt_h = NULL;
unsigned char *buffer = NULL;
- unsigned int pgcnt;
- struct page *page = NULL;
pr_info("Enter %s\n", __func__);
if (is_card_emmc(card) == 0) /* not emmc, nothing to do */
return 0;
- pgcnt = PAGE_ALIGN(512) >> PAGE_SHIFT;
- page = dma_alloc_from_contiguous(NULL, pgcnt, get_order(512));
-
- if (!page)
+ buffer = kmalloc(512, GFP_KERNEL);
+ if (!buffer)
return -ENOMEM;
- buffer = page_address(page);
mmc_claim_host(card->host);
ret = mmc_read_internal(card, 1, 1, buffer);
if (ret) {
pr_err("%s: save dtb error", __func__);
+ kfree(buffer);
goto out;
}
gpt_h = (struct gpt_header *) buffer;
if (le64_to_cpu(gpt_h->signature) == GPT_HEADER_SIGNATURE) {
- dma_release_from_contiguous(NULL, page, pgcnt);
+ kfree(buffer);
mmc_release_host(card->host);
return 0;
}
- dma_release_from_contiguous(NULL, page, pgcnt);
+ kfree(buffer);
store_device = host->storage_flag;
projects / platform / kernel / linux-amlogic.git / commitdiff