ARM: dts: imx7-colibri: clean-up usdhc1 and add sleep config

Adding no-1-8-v property to usdhc1 to disable +1.8V signaling (UHS-I)
mode on SoM dtsi level.

Clean up no-1-8-v from Aster carrier board dtsi, which is using defaults
from SoM dtsi and is not UHS-I capable.

A carrier board may have a MMC/SD card slot with a switchable power
supply. Add a pinctrl sleep used when the card power is off to avoid
backfeeding to the card and add the "sleep" pinctrl to the usdhc1
controller.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx7-colibri-aster.dtsi b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
index 440f98dc323d41754ca05e7ec0d41f3c18f55c58..f3a5cb7d6a0ca564d961a059da22a6b985c3797b 100644 (file)
--- a/arch/arm/boot/dts/imx7-colibri-aster.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-aster.dtsi
@@ -61,10 +61,7 @@
        status = "okay";
 };
 
+/* Colibri MMC/SD */
 &usdhc1 {
-       keep-power-in-suspend;
-       no-1-8-v;
-       wakeup-source;
-       vmmc-supply = <&reg_3v3>;
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 33a9cbbca0d25b3f456b37330f4db5a7865b93c6..618831e89ce801cc4621cd5719d370c3bf5dd81b 100644 (file)
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -97,8 +97,5 @@
 };
 
 &usdhc1 {
-       keep-power-in-suspend;
-       wakeup-source;
-       vmmc-supply = <&reg_3v3>;
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 09dbd262dad1580fa91c439747193d3acb8b0d45..3da9ddc06aae7a49f5ef5718119d2ee5534cb14d 100644 (file)
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -585,12 +585,19 @@
        extcon = <0>, <&extcon_usbc_det>;
 };
 
+/* Colibri MMC/SD */
 &usdhc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
        cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
        disable-wp;
+       no-1-8-v;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+       pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>;
+       pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>;
+       vmmc-supply = <&reg_3v3>;
        vqmmc-supply = <&reg_LDO2>;
+       wakeup-source;
 };
 
 &usdhc3 {
@@ -949,36 +956,48 @@
                >;
        };
 
-       pinctrl_usdhc1: usdhc1-grp {
+       pinctrl_usdhc1: usdhc1grp {
                fsl,pins = <
-                       MX7D_PAD_SD1_CMD__SD1_CMD       0x59
-                       MX7D_PAD_SD1_CLK__SD1_CLK       0x19
-                       MX7D_PAD_SD1_DATA0__SD1_DATA0   0x59
-                       MX7D_PAD_SD1_DATA1__SD1_DATA1   0x59
-                       MX7D_PAD_SD1_DATA2__SD1_DATA2   0x59
-                       MX7D_PAD_SD1_DATA3__SD1_DATA3   0x59
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x19 /* SODIMM 47 */
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x59 /* SODIMM 190 */
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59 /* SODIMM 192 */
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59 /* SODIMM 49 */
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59 /* SODIMM 51 */
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59 /* SODIMM 53 */
                >;
        };
 
-       pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
                fsl,pins = <
-                       MX7D_PAD_SD1_CMD__SD1_CMD       0x5a
-                       MX7D_PAD_SD1_CLK__SD1_CLK       0x1a
-                       MX7D_PAD_SD1_DATA0__SD1_DATA0   0x5a
-                       MX7D_PAD_SD1_DATA1__SD1_DATA1   0x5a
-                       MX7D_PAD_SD1_DATA2__SD1_DATA2   0x5a
-                       MX7D_PAD_SD1_DATA3__SD1_DATA3   0x5a
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1a
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5a
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5a
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5a
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5a
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5a
                >;
        };
 
-       pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
                fsl,pins = <
-                       MX7D_PAD_SD1_CMD__SD1_CMD       0x5b
-                       MX7D_PAD_SD1_CLK__SD1_CLK       0x1b
-                       MX7D_PAD_SD1_DATA0__SD1_DATA0   0x5b
-                       MX7D_PAD_SD1_DATA1__SD1_DATA1   0x5b
-                       MX7D_PAD_SD1_DATA2__SD1_DATA2   0x5b
-                       MX7D_PAD_SD1_DATA3__SD1_DATA3   0x5b
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1b
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5b
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5b
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5b
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5b
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5b
+               >;
+       };
+
+       /* Avoid backfeeding with removed card power. */
+       pinctrl_usdhc1_sleep: usdhc1-slpgrp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x10
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x10
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x10
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x10
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x10
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x10
                >;
        };
 
@@ -1077,9 +1096,15 @@
                >;
        };
 
-       pinctrl_cd_usdhc1: usdhc1-cd-grp {
+       pinctrl_cd_usdhc1: cdusdhc1grp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x59 /* SODIMM 43 / MMC_CD */
+               >;
+       };
+
+       pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp {
                fsl,pins = <
-                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x59 /* CD */
+                       MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0     0x0
                >;
        };