habanalabs: fix DDR bar address setting

DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR.

Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 74785cc..f634e9c 100644 (file)
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -2575,8 +2575,7 @@ static int goya_hw_init(struct hl_device *hdev)
         * After CPU initialization is finished, change DDR bar mapping inside
         * iATU to point to the start address of the MMU page tables
         */
-       if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE +
-                       (MMU_PAGE_TABLES_ADDR &
+       if (goya_set_ddr_bar_base(hdev, (MMU_PAGE_TABLES_ADDR &
                        ~(prop->dram_pci_bar_size - 0x1ull))) == U64_MAX) {
                dev_err(hdev->dev,
                        "failed to map DDR bar to MMU page tables\n");