IVGCVSW-3495 Refactor names of convolution2d unit tests
authorJan Eilers <jan.eilers@arm.com>
Fri, 12 Jul 2019 09:46:33 +0000 (10:46 +0100)
committerJan Eilers <jan.eilers@arm.com>
Mon, 15 Jul 2019 11:27:29 +0000 (11:27 +0000)
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Idb1325cba730dbf62b4742e4078220ef97d4b526

src/backends/backendsCommon/test/LayerTests.cpp
src/backends/cl/test/ClLayerTests.cpp
src/backends/reference/test/RefLayerTests.cpp

index b8f0541..03ab37d 100644 (file)
@@ -874,7 +874,7 @@ LayerTestResult<T, 4> Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test(
 
     // Since the dilation rate is 2 this will dilate the kernel to be like 3x3: d(K-1)+1 --> 2 x (2-1) + 1 = 3,
     // therefore the output will be 4x4: (I − K + 2P)/S +1 => trunc ( (10 - 3 + 2x2 ) / 3 + 1 )
-    // where, dilation size = d = 2; kernel size = K = 2; input size = I = 10; padding size = P = 2; stride = S = 1
+    // where, dilation size = d = 2; kernel size = K = 2; input size = I = 10; padding size = P = 2; stride = S = 3
     armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
     std::vector<float> outputExpectedNoQuantizedValues =
     {
index f2ff294..db10036 100644 (file)
@@ -106,7 +106,6 @@ ARMNN_AUTO_TEST_CASE(Convolution2d3x3Dilation3x3NhwcUint8,
                      Convolution2d3x3Dilation3x3Test<armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NHWC)
-
 ARMNN_AUTO_TEST_CASE(Convolution2d2x3x3Dilation3x3,
                      Convolution2d2x3x3Dilation3x3Test<armnn::DataType::Float32, armnn::DataType::Float32>,
                      false,
@@ -123,28 +122,27 @@ ARMNN_AUTO_TEST_CASE(Convolution2d2x3x3Dilation3x3NhwcUint8,
                      Convolution2d2x3x3Dilation3x3Test<armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NHWC)
-
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::Float32, armnn::DataType::Float32>,
                      false,
                      armnn::DataLayout::NCHW)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestNhwc,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3Nhwc,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::Float32, armnn::DataType::Float32>,
                      false,
                      armnn::DataLayout::NHWC)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestUint8,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3Uint8,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NCHW)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestNhwcUint8,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3NhwcUint8,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NHWC)
-
+                     
 // Depthwise Convolution
 ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1,
                      DepthwiseConvolution2dDepthMul1Test, true, armnn::DataLayout::NCHW)
index 57ac946..509dbf7 100644 (file)
@@ -121,32 +121,32 @@ ARMNN_AUTO_TEST_CASE(Convolution2d2x3x3Dilation3x3NhwcInt16,
                      false,
                      armnn::DataLayout::NHWC)
 
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::Float32, armnn::DataType::Float32>,
                      false,
                      armnn::DataLayout::NCHW)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestNhwc,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3Nhwc,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::Float32, armnn::DataType::Float32>,
                      false,
                      armnn::DataLayout::NHWC)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestUint8,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3Uint8,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NCHW)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestNhwcUint8,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3NhwcUint8,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedAsymm8, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NHWC)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestInt16,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3Int16,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedSymm16, armnn::DataType::Signed32>,
                      false,
                      armnn::DataLayout::NCHW)
-ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding1x1TestNhwcInt16,
+ARMNN_AUTO_TEST_CASE(Convolution2d2x2Dilation2x2Padding2x2Stride3x3NhwcInt16,
                      Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test
                              <armnn::DataType::QuantisedSymm16, armnn::DataType::Signed32>,
                      false,