arm/dt: tegra: Use new compatible value for DVC I2C controller
authorStephen Warren <swarren@nvidia.com>
Sun, 18 Dec 2011 06:29:31 +0000 (23:29 -0700)
committerOlof Johansson <olof@lixom.net>
Tue, 20 Dec 2011 01:54:53 +0000 (17:54 -0800)
Update the device tree to indicate which I2C controller is the DVC
controller. AUXDATA needs to be updated too, since the compatible
value changed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/tegra20.dtsi
arch/arm/mach-tegra/board-dt.c

index 660c8ad..3da7afd 100644 (file)
@@ -39,7 +39,7 @@
        i2c@7000d000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra20-i2c";
+               compatible = "nvidia,tegra20-i2c-dvc";
                reg = <0x7000D000 0x200>;
                interrupts = < 0 53 0x04 >;
        };
index 2fa599d..0fe3230 100644 (file)
@@ -71,7 +71,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
-       OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
+       OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
        OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),