; CHECK-LABEL: atomic_shl1_xor_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btcq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: xorq %rdx, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB0_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%shl = shl nuw i64 1, %c
; CHECK-LABEL: atomic_shl1_small_mask_xor_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: andb $31, %cl
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $31, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btcq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB3_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: xorq %rdx, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB3_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andl %edx, %eax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 31
; CHECK-LABEL: atomic_shl1_mask0_xor_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB4_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: xorq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB4_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btcq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 63
; CHECK-LABEL: atomic_shl1_mask1_xor_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB5_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: xorq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB5_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btcq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%shl = shl nuw i64 1, %c
; CHECK-LABEL: atomic_shl1_mask01_xor_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btcq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB6_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: xorq %rdx, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB6_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 63
; CHECK-LABEL: atomic_shl1_and_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btrq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB24_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: andq %rsi, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB24_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%shl = shl nuw i64 1, %c
; CHECK-LABEL: atomic_shl1_small_mask_and_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: andb $31, %cl
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
+; CHECK-NEXT: andl $31, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btrq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB27_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: andq %rsi, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB27_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andl %edx, %eax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 31
; CHECK-LABEL: atomic_shl1_mask0_and_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movq $-2, %rdx
-; CHECK-NEXT: rolq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB28_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: andq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB28_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btrq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 63
; CHECK-LABEL: atomic_shl1_mask1_and_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movq $-2, %rdx
-; CHECK-NEXT: rolq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB29_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: andq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB29_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: movl $1, %edx
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btrq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%shl = shl nuw i64 1, %c
; CHECK-LABEL: atomic_shl1_mask01_and_64_gpr_val:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
+; CHECK-NEXT: andl $63, %ecx
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: lock btrq %rcx, (%rdi)
+; CHECK-NEXT: setb %al
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB30_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rcx
-; CHECK-NEXT: andq %rsi, %rcx
-; CHECK-NEXT: lock cmpxchgq %rcx, (%rdi)
-; CHECK-NEXT: jne .LBB30_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: andq %rdx, %rax
+; CHECK-NEXT: shlq %cl, %rax
; CHECK-NEXT: retq
entry:
%rem = and i64 %c, 63
define i64 @atomic_shl1_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_and_64_gpr_brnz:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB40_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %r8
-; CHECK-NEXT: andq %rsi, %r8
-; CHECK-NEXT: lock cmpxchgq %r8, (%rdi)
-; CHECK-NEXT: jne .LBB40_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: testq %rdx, %rax
-; CHECK-NEXT: je .LBB40_3
-; CHECK-NEXT: # %bb.4: # %if.then
-; CHECK-NEXT: movq (%rdi,%rcx,8), %rax
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $63, %eax
+; CHECK-NEXT: lock btrq %rax, (%rdi)
+; CHECK-NEXT: jae .LBB40_1
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
-; CHECK-NEXT: .LBB40_3:
+; CHECK-NEXT: .LBB40_1:
; CHECK-NEXT: movl $123, %eax
; CHECK-NEXT: retq
entry:
define i64 @atomic_shl1_small_mask_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_small_mask_and_64_gpr_brnz:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: andl $31, %ecx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB43_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %r8
-; CHECK-NEXT: andq %rsi, %r8
-; CHECK-NEXT: lock cmpxchgq %r8, (%rdi)
-; CHECK-NEXT: jne .LBB43_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: testl %edx, %eax
-; CHECK-NEXT: je .LBB43_3
-; CHECK-NEXT: # %bb.4: # %if.then
-; CHECK-NEXT: movq (%rdi,%rcx,8), %rax
+; CHECK-NEXT: andl $31, %esi
+; CHECK-NEXT: lock btrq %rsi, (%rdi)
+; CHECK-NEXT: jae .LBB43_1
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
-; CHECK-NEXT: .LBB43_3:
+; CHECK-NEXT: .LBB43_1:
; CHECK-NEXT: movl $123, %eax
; CHECK-NEXT: retq
entry:
define i64 @atomic_shl1_mask0_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_mask0_and_64_gpr_brnz:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movq $-2, %rdx
-; CHECK-NEXT: rolq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB44_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: andq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB44_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: btq %rcx, %rax
-; CHECK-NEXT: jae .LBB44_3
-; CHECK-NEXT: # %bb.4: # %if.then
-; CHECK-NEXT: movq (%rdi,%rcx,8), %rax
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $63, %eax
+; CHECK-NEXT: lock btrq %rax, (%rdi)
+; CHECK-NEXT: jae .LBB44_1
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
-; CHECK-NEXT: .LBB44_3:
+; CHECK-NEXT: .LBB44_1:
; CHECK-NEXT: movl $123, %eax
; CHECK-NEXT: retq
entry:
define i64 @atomic_shl1_mask1_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_mask1_and_64_gpr_brnz:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movq $-2, %rdx
-; CHECK-NEXT: rolq %cl, %rdx
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB45_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %rsi
-; CHECK-NEXT: andq %rdx, %rsi
-; CHECK-NEXT: lock cmpxchgq %rsi, (%rdi)
-; CHECK-NEXT: jne .LBB45_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: btq %rcx, %rax
-; CHECK-NEXT: jae .LBB45_3
-; CHECK-NEXT: # %bb.4: # %if.then
-; CHECK-NEXT: movq (%rdi,%rcx,8), %rax
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $63, %eax
+; CHECK-NEXT: lock btrq %rax, (%rdi)
+; CHECK-NEXT: jae .LBB45_1
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
-; CHECK-NEXT: .LBB45_3:
+; CHECK-NEXT: .LBB45_1:
; CHECK-NEXT: movl $123, %eax
; CHECK-NEXT: retq
entry:
define i64 @atomic_shl1_mask01_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_mask01_and_64_gpr_brnz:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: movq %rsi, %rcx
-; CHECK-NEXT: movl $1, %edx
-; CHECK-NEXT: shlq %cl, %rdx
-; CHECK-NEXT: movq $-2, %rsi
-; CHECK-NEXT: rolq %cl, %rsi
-; CHECK-NEXT: movq (%rdi), %rax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: .LBB46_1: # %atomicrmw.start
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: movq %rax, %r8
-; CHECK-NEXT: andq %rsi, %r8
-; CHECK-NEXT: lock cmpxchgq %r8, (%rdi)
-; CHECK-NEXT: jne .LBB46_1
-; CHECK-NEXT: # %bb.2: # %atomicrmw.end
-; CHECK-NEXT: testq %rdx, %rax
-; CHECK-NEXT: je .LBB46_3
-; CHECK-NEXT: # %bb.4: # %if.then
-; CHECK-NEXT: movq (%rdi,%rcx,8), %rax
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $63, %eax
+; CHECK-NEXT: lock btrq %rax, (%rdi)
+; CHECK-NEXT: jae .LBB46_1
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: movq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
-; CHECK-NEXT: .LBB46_3:
+; CHECK-NEXT: .LBB46_1:
; CHECK-NEXT: movl $123, %eax
; CHECK-NEXT: retq
entry:
define zeroext i16 @atomic_shl1_small_mask_xor_16_gpr_val(ptr %v, i16 zeroext %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_xor_16_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: andb $7, %cl
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movzwl (%edx), %eax
-; X86-NEXT: movzwl %si, %ecx
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB13_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %esi
-; X86-NEXT: xorl %ecx, %esi
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: lock cmpxchgw %si, (%edx)
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: jne .LBB13_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %ecx, %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $7, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btcw %cx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_xor_16_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andb $7, %cl
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $7, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btcw %cx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movzwl (%rdi), %eax
-; X64-NEXT: movzwl %dx, %ecx
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB13_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %edx
-; X64-NEXT: xorl %ecx, %edx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: lock cmpxchgw %dx, (%rdi)
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: jne .LBB13_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %ecx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
entry:
define zeroext i16 @atomic_shl1_mask01_xor_16_gpr_val(ptr %v, i16 zeroext %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_xor_16_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: andb $15, %cl
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movzwl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB16_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: xorl %edx, %ecx
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: lock cmpxchgw %cx, (%esi)
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: jne .LBB16_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %edx, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $15, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btcw %cx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_xor_16_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andb $15, %cl
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $15, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btcw %cx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movzwl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB16_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: xorl %edx, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: lock cmpxchgw %cx, (%rdi)
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: jne .LBB16_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
entry:
define zeroext i16 @atomic_shl1_small_mask_and_16_gpr_val(ptr %v, i16 zeroext %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_and_16_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: andb $7, %cl
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movw $-2, %di
-; X86-NEXT: rolw %cl, %di
-; X86-NEXT: movzwl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB37_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: andl %edi, %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $7, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btrw %cx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: lock cmpxchgw %cx, (%edx)
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: jne .LBB37_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movzwl %si, %ecx
-; X86-NEXT: andl %eax, %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_and_16_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andb $7, %cl
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movw $-2, %si
+; X64-NEXT: andl $7, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btrw %cx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: rolw %cl, %si
-; X64-NEXT: movzwl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB37_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: andl %esi, %ecx
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: lock cmpxchgw %cx, (%rdi)
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: jne .LBB37_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movzwl %dx, %ecx
-; X64-NEXT: andl %eax, %ecx
-; X64-NEXT: movl %ecx, %eax
; X64-NEXT: retq
entry:
%0 = and i16 %c, 7
define zeroext i16 @atomic_shl1_mask01_and_16_gpr_val(ptr %v, i16 zeroext %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_and_16_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: andb $15, %cl
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movw $-2, %di
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: rolw %cl, %di
-; X86-NEXT: movzwl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB40_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: andl %edi, %ecx
-; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: lock cmpxchgw %cx, (%esi)
-; X86-NEXT: # kill: def $ax killed $ax def $eax
-; X86-NEXT: jne .LBB40_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %edx, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $15, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btrw %cx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_and_16_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andb $15, %cl
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movw $-2, %r8w
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: rolw %cl, %r8w
-; X64-NEXT: movzwl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB40_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: andl %r8d, %ecx
-; X64-NEXT: # kill: def $ax killed $ax killed $eax
-; X64-NEXT: lock cmpxchgw %cx, (%rdi)
-; X64-NEXT: # kill: def $ax killed $ax def $eax
-; X64-NEXT: jne .LBB40_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: andl $15, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btrw %cx, (%rdi)
+; X64-NEXT: setb %al
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_or_32_gpr_val(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_or_32_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB60_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: orl %edx, %ecx
-; X86-NEXT: lock cmpxchgl %ecx, (%esi)
-; X86-NEXT: jne .LBB60_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %edx, %eax
-; X86-NEXT: popl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btsl %ecx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_or_32_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $31, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btsl %ecx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB60_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: orl %edx, %ecx
-; X64-NEXT: lock cmpxchgl %ecx, (%rdi)
-; X64-NEXT: jne .LBB60_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: retq
entry:
%shl = shl nuw i32 1, %c
define i32 @atomic_shl1_small_mask_or_32_gpr_val(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_or_32_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: andb $15, %cl
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB61_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: orl %esi, %ecx
-; X86-NEXT: lock cmpxchgl %ecx, (%edx)
-; X86-NEXT: jne .LBB61_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %esi, %eax
-; X86-NEXT: popl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $15, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btsl %ecx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_or_32_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andb $15, %cl
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $15, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btsl %ecx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB61_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: orl %edx, %ecx
-; X64-NEXT: lock cmpxchgl %ecx, (%rdi)
-; X64-NEXT: jne .LBB61_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: retq
entry:
%0 = and i32 %c, 15
define i32 @atomic_shl1_mask0_or_32_gpr_val(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask0_or_32_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB62_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB62_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $1, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btsl %ecx, (%edx)
+; X86-NEXT: setb %al
; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: andl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask0_or_32_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB62_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB62_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $31, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btsl %ecx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: retq
entry:
%0 = and i32 %c, 31
define i32 @atomic_shl1_mask1_or_32_gpr_val(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask1_or_32_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB63_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB63_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $1, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btsl %ecx, (%edx)
+; X86-NEXT: setb %al
; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: andl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask1_or_32_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB63_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB63_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $31, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btsl %ecx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: retq
entry:
%shl = shl nuw i32 1, %c
define i32 @atomic_shl1_mask01_or_32_gpr_val(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_or_32_gpr_val:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB64_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %ecx
-; X86-NEXT: orl %edx, %ecx
-; X86-NEXT: lock cmpxchgl %ecx, (%esi)
-; X86-NEXT: jne .LBB64_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: andl %edx, %eax
-; X86-NEXT: popl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: andl $31, %ecx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: lock btsl %ecx, (%edx)
+; X86-NEXT: setb %al
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: shll %cl, %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_or_32_gpr_val:
; X64: # %bb.0: # %entry
; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
+; X64-NEXT: andl $31, %ecx
+; X64-NEXT: xorl %eax, %eax
+; X64-NEXT: lock btsl %ecx, (%rdi)
+; X64-NEXT: setb %al
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB64_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %ecx
-; X64-NEXT: orl %edx, %ecx
-; X64-NEXT: lock cmpxchgl %ecx, (%rdi)
-; X64-NEXT: jne .LBB64_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: andl %edx, %eax
+; X64-NEXT: shll %cl, %eax
; X64-NEXT: retq
entry:
%0 = and i32 %c, 31
define i32 @atomic_shl1_or_32_gpr_br(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_or_32_gpr_br:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB78_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB78_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB78_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB78_5
-; X86-NEXT: .LBB78_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB78_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB78_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB78_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_or_32_gpr_br:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB78_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB78_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB78_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB78_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB78_3:
+; X64-NEXT: .LBB78_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_small_mask_or_32_gpr_br(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_or_32_gpr_br:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andl $15, %ecx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB79_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB79_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB79_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB79_5
-; X86-NEXT: .LBB79_3:
+; X86-NEXT: lock btsl %ecx, (%eax)
+; X86-NEXT: jae .LBB79_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%eax,%ecx,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB79_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB79_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_or_32_gpr_br:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andl $15, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB79_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB79_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB79_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: andl $15, %esi
+; X64-NEXT: lock btsl %esi, (%rdi)
+; X64-NEXT: jae .LBB79_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB79_3:
+; X64-NEXT: .LBB79_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask0_or_32_gpr_br(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask0_or_32_gpr_br:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB80_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB80_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jae .LBB80_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB80_5
-; X86-NEXT: .LBB80_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB80_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB80_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB80_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask0_or_32_gpr_br:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB80_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB80_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB80_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB80_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB80_3:
+; X64-NEXT: .LBB80_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask1_or_32_gpr_br(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask1_or_32_gpr_br:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB81_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB81_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jae .LBB81_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB81_5
-; X86-NEXT: .LBB81_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB81_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB81_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB81_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask1_or_32_gpr_br:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB81_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB81_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB81_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB81_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB81_3:
+; X64-NEXT: .LBB81_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask01_or_32_gpr_br(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_or_32_gpr_br:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB82_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB82_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB82_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB82_5
-; X86-NEXT: .LBB82_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB82_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB82_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB82_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_or_32_gpr_br:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB82_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB82_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB82_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB82_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB82_3:
+; X64-NEXT: .LBB82_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_or_32_gpr_brz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_or_32_gpr_brz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movl $1, %edi
-; X86-NEXT: shll %cl, %edi
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB84_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: orl %edi, %edx
-; X86-NEXT: lock cmpxchgl %edx, (%esi)
-; X86-NEXT: jne .LBB84_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $123, %edx
-; X86-NEXT: testl %edi, %eax
-; X86-NEXT: jne .LBB84_4
-; X86-NEXT: # %bb.3: # %if.then
-; X86-NEXT: movl (%esi,%ecx,4), %edx
-; X86-NEXT: .LBB84_4: # %return
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: lock btsl %eax, (%edx)
+; X86-NEXT: movl $123, %eax
+; X86-NEXT: jae .LBB84_1
+; X86-NEXT: # %bb.2: # %return
+; X86-NEXT: retl
+; X86-NEXT: .LBB84_1: # %if.then
+; X86-NEXT: movl (%edx,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_or_32_gpr_brz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %esi
-; X64-NEXT: shll %cl, %esi
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB84_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %edx
-; X64-NEXT: orl %esi, %edx
-; X64-NEXT: lock cmpxchgl %edx, (%rdi)
-; X64-NEXT: jne .LBB84_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $123, %edx
-; X64-NEXT: testl %esi, %eax
-; X64-NEXT: je .LBB84_3
-; X64-NEXT: # %bb.4: # %return
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: movl $123, %eax
+; X64-NEXT: jae .LBB84_1
+; X64-NEXT: # %bb.2: # %return
; X64-NEXT: retq
-; X64-NEXT: .LBB84_3: # %if.then
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: movl (%rdi,%rax,4), %edx
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: .LBB84_1: # %if.then
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
entry:
%shl = shl nuw i32 1, %c
define i32 @atomic_shl1_small_mask_or_32_gpr_brz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_or_32_gpr_brz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: andl $15, %ecx
-; X86-NEXT: movl $1, %edi
-; X86-NEXT: shll %cl, %edi
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB85_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: orl %edi, %edx
-; X86-NEXT: lock cmpxchgl %edx, (%esi)
-; X86-NEXT: jne .LBB85_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $123, %edx
-; X86-NEXT: testl %edi, %eax
-; X86-NEXT: jne .LBB85_4
-; X86-NEXT: # %bb.3: # %if.then
-; X86-NEXT: movl (%esi,%ecx,4), %edx
-; X86-NEXT: .LBB85_4: # %return
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: andl $15, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: movl $123, %eax
+; X86-NEXT: jae .LBB85_1
+; X86-NEXT: # %bb.2: # %return
+; X86-NEXT: retl
+; X86-NEXT: .LBB85_1: # %if.then
+; X86-NEXT: movl (%ecx,%edx,4), %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_or_32_gpr_brz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andl $15, %ecx
-; X64-NEXT: movl $1, %esi
-; X64-NEXT: shll %cl, %esi
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB85_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %edx
-; X64-NEXT: orl %esi, %edx
-; X64-NEXT: lock cmpxchgl %edx, (%rdi)
-; X64-NEXT: jne .LBB85_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $123, %edx
-; X64-NEXT: testl %esi, %eax
-; X64-NEXT: je .LBB85_3
-; X64-NEXT: # %bb.4: # %return
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: andl $15, %esi
+; X64-NEXT: lock btsl %esi, (%rdi)
+; X64-NEXT: movl $123, %eax
+; X64-NEXT: jae .LBB85_1
+; X64-NEXT: # %bb.2: # %return
; X64-NEXT: retq
-; X64-NEXT: .LBB85_3: # %if.then
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: movl (%rdi,%rax,4), %edx
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: .LBB85_1: # %if.then
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
entry:
%0 = and i32 %c, 15
define i32 @atomic_shl1_mask0_or_32_gpr_brz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask0_or_32_gpr_brz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB86_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %edx, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%esi)
-; X86-NEXT: jne .LBB86_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $123, %edx
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jb .LBB86_4
-; X86-NEXT: # %bb.3: # %if.then
-; X86-NEXT: movl (%esi,%ecx,4), %edx
-; X86-NEXT: .LBB86_4: # %return
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: lock btsl %eax, (%edx)
+; X86-NEXT: movl $123, %eax
+; X86-NEXT: jae .LBB86_1
+; X86-NEXT: # %bb.2: # %return
+; X86-NEXT: retl
+; X86-NEXT: .LBB86_1: # %if.then
+; X86-NEXT: movl (%edx,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask0_or_32_gpr_brz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB86_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB86_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $123, %edx
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB86_3
-; X64-NEXT: # %bb.4: # %return
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: movl $123, %eax
+; X64-NEXT: jae .LBB86_1
+; X64-NEXT: # %bb.2: # %return
; X64-NEXT: retq
-; X64-NEXT: .LBB86_3: # %if.then
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: movl (%rdi,%rax,4), %edx
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: .LBB86_1: # %if.then
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
entry:
%rem = and i32 %c, 31
define i32 @atomic_shl1_mask1_or_32_gpr_brz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask1_or_32_gpr_brz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movl $1, %edx
-; X86-NEXT: shll %cl, %edx
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB87_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %edx, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%esi)
-; X86-NEXT: jne .LBB87_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $123, %edx
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jb .LBB87_4
-; X86-NEXT: # %bb.3: # %if.then
-; X86-NEXT: movl (%esi,%ecx,4), %edx
-; X86-NEXT: .LBB87_4: # %return
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: lock btsl %eax, (%edx)
+; X86-NEXT: movl $123, %eax
+; X86-NEXT: jae .LBB87_1
+; X86-NEXT: # %bb.2: # %return
+; X86-NEXT: retl
+; X86-NEXT: .LBB87_1: # %if.then
+; X86-NEXT: movl (%edx,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask1_or_32_gpr_brz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB87_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB87_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $123, %edx
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB87_3
-; X64-NEXT: # %bb.4: # %return
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: movl $123, %eax
+; X64-NEXT: jae .LBB87_1
+; X64-NEXT: # %bb.2: # %return
; X64-NEXT: retq
-; X64-NEXT: .LBB87_3: # %if.then
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: movl (%rdi,%rax,4), %edx
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: .LBB87_1: # %if.then
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
entry:
%shl = shl nuw i32 1, %c
define i32 @atomic_shl1_mask01_or_32_gpr_brz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_or_32_gpr_brz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movl $1, %edi
-; X86-NEXT: shll %cl, %edi
-; X86-NEXT: movl (%esi), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB88_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: orl %edi, %edx
-; X86-NEXT: lock cmpxchgl %edx, (%esi)
-; X86-NEXT: jne .LBB88_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: movl $123, %edx
-; X86-NEXT: testl %edi, %eax
-; X86-NEXT: jne .LBB88_4
-; X86-NEXT: # %bb.3: # %if.then
-; X86-NEXT: movl (%esi,%ecx,4), %edx
-; X86-NEXT: .LBB88_4: # %return
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: andl $31, %eax
+; X86-NEXT: lock btsl %eax, (%edx)
+; X86-NEXT: movl $123, %eax
+; X86-NEXT: jae .LBB88_1
+; X86-NEXT: # %bb.2: # %return
+; X86-NEXT: retl
+; X86-NEXT: .LBB88_1: # %if.then
+; X86-NEXT: movl (%edx,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_or_32_gpr_brz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %esi
-; X64-NEXT: shll %cl, %esi
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB88_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %edx
-; X64-NEXT: orl %esi, %edx
-; X64-NEXT: lock cmpxchgl %edx, (%rdi)
-; X64-NEXT: jne .LBB88_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: movl $123, %edx
-; X64-NEXT: testl %esi, %eax
-; X64-NEXT: je .LBB88_3
-; X64-NEXT: # %bb.4: # %return
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: movl $123, %eax
+; X64-NEXT: jae .LBB88_1
+; X64-NEXT: # %bb.2: # %return
; X64-NEXT: retq
-; X64-NEXT: .LBB88_3: # %if.then
-; X64-NEXT: movl %ecx, %eax
-; X64-NEXT: movl (%rdi,%rax,4), %edx
-; X64-NEXT: movl %edx, %eax
+; X64-NEXT: .LBB88_1: # %if.then
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
entry:
%rem = and i32 %c, 31
define i32 @atomic_shl1_or_32_gpr_brnz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_or_32_gpr_brnz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB90_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB90_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB90_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB90_5
-; X86-NEXT: .LBB90_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB90_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB90_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB90_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_or_32_gpr_brnz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB90_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB90_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB90_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB90_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB90_3:
+; X64-NEXT: .LBB90_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_small_mask_or_32_gpr_brnz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_small_mask_or_32_gpr_brnz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: andl $15, %ecx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB91_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB91_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB91_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB91_5
-; X86-NEXT: .LBB91_3:
+; X86-NEXT: lock btsl %ecx, (%eax)
+; X86-NEXT: jae .LBB91_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%eax,%ecx,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB91_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB91_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_small_mask_or_32_gpr_brnz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: andl $15, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB91_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB91_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB91_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: andl $15, %esi
+; X64-NEXT: lock btsl %esi, (%rdi)
+; X64-NEXT: jae .LBB91_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB91_3:
+; X64-NEXT: .LBB91_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask0_or_32_gpr_brnz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask0_or_32_gpr_brnz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB92_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB92_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jae .LBB92_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB92_5
-; X86-NEXT: .LBB92_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB92_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB92_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB92_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask0_or_32_gpr_brnz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB92_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB92_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB92_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB92_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB92_3:
+; X64-NEXT: .LBB92_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask1_or_32_gpr_brnz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask1_or_32_gpr_brnz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB93_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB93_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: btl %ecx, %eax
-; X86-NEXT: jae .LBB93_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB93_5
-; X86-NEXT: .LBB93_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB93_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB93_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB93_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask1_or_32_gpr_brnz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB93_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB93_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: btl %ecx, %eax
-; X64-NEXT: jae .LBB93_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB93_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB93_3:
+; X64-NEXT: .LBB93_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry:
define i32 @atomic_shl1_mask01_or_32_gpr_brnz(ptr %v, i32 %c) nounwind {
; X86-LABEL: atomic_shl1_mask01_or_32_gpr_brnz:
; X86: # %bb.0: # %entry
-; X86-NEXT: pushl %edi
-; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: movl $1, %esi
-; X86-NEXT: shll %cl, %esi
-; X86-NEXT: movl (%edx), %eax
-; X86-NEXT: .p2align 4, 0x90
-; X86-NEXT: .LBB94_1: # %atomicrmw.start
-; X86-NEXT: # =>This Inner Loop Header: Depth=1
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: orl %esi, %edi
-; X86-NEXT: lock cmpxchgl %edi, (%edx)
-; X86-NEXT: jne .LBB94_1
-; X86-NEXT: # %bb.2: # %atomicrmw.end
-; X86-NEXT: testl %esi, %eax
-; X86-NEXT: je .LBB94_3
-; X86-NEXT: # %bb.4: # %if.then
-; X86-NEXT: movl (%edx,%ecx,4), %eax
-; X86-NEXT: jmp .LBB94_5
-; X86-NEXT: .LBB94_3:
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl $31, %edx
+; X86-NEXT: lock btsl %edx, (%ecx)
+; X86-NEXT: jae .LBB94_1
+; X86-NEXT: # %bb.2: # %if.then
+; X86-NEXT: movl (%ecx,%eax,4), %eax
+; X86-NEXT: retl
+; X86-NEXT: .LBB94_1:
; X86-NEXT: movl $123, %eax
-; X86-NEXT: .LBB94_5: # %return
-; X86-NEXT: popl %esi
-; X86-NEXT: popl %edi
; X86-NEXT: retl
;
; X64-LABEL: atomic_shl1_mask01_or_32_gpr_brnz:
; X64: # %bb.0: # %entry
-; X64-NEXT: movl %esi, %ecx
-; X64-NEXT: movl $1, %edx
-; X64-NEXT: shll %cl, %edx
-; X64-NEXT: movl (%rdi), %eax
-; X64-NEXT: .p2align 4, 0x90
-; X64-NEXT: .LBB94_1: # %atomicrmw.start
-; X64-NEXT: # =>This Inner Loop Header: Depth=1
-; X64-NEXT: movl %eax, %esi
-; X64-NEXT: orl %edx, %esi
-; X64-NEXT: lock cmpxchgl %esi, (%rdi)
-; X64-NEXT: jne .LBB94_1
-; X64-NEXT: # %bb.2: # %atomicrmw.end
-; X64-NEXT: testl %edx, %eax
-; X64-NEXT: je .LBB94_3
-; X64-NEXT: # %bb.4: # %if.then
-; X64-NEXT: movl %ecx, %eax
+; X64-NEXT: movl %esi, %eax
+; X64-NEXT: andl $31, %eax
+; X64-NEXT: lock btsl %eax, (%rdi)
+; X64-NEXT: jae .LBB94_1
+; X64-NEXT: # %bb.2: # %if.then
+; X64-NEXT: movl %esi, %eax
; X64-NEXT: movl (%rdi,%rax,4), %eax
; X64-NEXT: retq
-; X64-NEXT: .LBB94_3:
+; X64-NEXT: .LBB94_1:
; X64-NEXT: movl $123, %eax
; X64-NEXT: retq
entry: