Account for the "+i" integer pipe transfer cost (1cy use of JALU0 for GPR PRF write)
This also adds missing vcvttss2si tests
llvm-svn: 328505
defm : JWriteResFpuPair<WriteCvtI2F, [JFPU1, JSTC], 3>; // Integer -> Float.
defm : JWriteResFpuPair<WriteCvtF2F, [JFPU1, JSTC], 3>; // Float -> Float size conversion.
+def JWriteCVTSI2F : SchedWriteRes<[JFPU1, JSTC, JFPA, JALU0]> {
+ let Latency = 7;
+ let NumMicroOps = 2;
+}
+def : InstRW<[JWriteCVTSI2F], (instregex "(V)?CVT(T?)S(D|S)2SI(64)?rr")>;
+
+def JWriteCVTSI2FLd : SchedWriteRes<[JLAGU, JFPU1, JSTC, JFPA, JALU0]> {
+ let Latency = 12;
+ let NumMicroOps = 2;
+}
+def : InstRW<[JWriteCVTSI2FLd], (instregex "(V)?CVT(T?)S(D|S)2SI(64)?rm")>;
+
////////////////////////////////////////////////////////////////////////////////
// Vector integer operations.
////////////////////////////////////////////////////////////////////////////////
;
; BTVER2-SSE-LABEL: test_cvtss2si:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvtss2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvtss2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvtss2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvtss2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvtss2si:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvtss2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-NEXT: vcvtss2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-NEXT: vcvtss2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-NEXT: vcvtss2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvtss2siq:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvtss2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvtss2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvtss2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvtss2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvtss2siq:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvtss2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-NEXT: vcvtss2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-NEXT: vcvtss2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-NEXT: vcvtss2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvttss2si:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvttss2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvttss2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvttss2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvttss2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvttss2si:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvttss2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-NEXT: vcvttss2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-NEXT: vcvttss2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-NEXT: vcvttss2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvttss2siq:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvttss2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvttss2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvttss2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvttss2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvttss2siq:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvttss2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-NEXT: vcvttss2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-NEXT: vcvttss2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-NEXT: vcvttss2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvtsd2si:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvtsd2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvtsd2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvtsd2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvtsd2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvtsd2si:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvtsd2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-NEXT: vcvtsd2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-NEXT: vcvtsd2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-NEXT: vcvtsd2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvtsd2siq:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvtsd2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvtsd2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvtsd2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvtsd2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvtsd2siq:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvtsd2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-NEXT: vcvtsd2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-NEXT: vcvtsd2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-NEXT: vcvtsd2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvttsd2si:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvttsd2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvttsd2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvttsd2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvttsd2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvttsd2si:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvttsd2si (%rdi), %eax # sched: [8:1.00]
-; BTVER2-NEXT: vcvttsd2si %xmm0, %ecx # sched: [3:1.00]
+; BTVER2-NEXT: vcvttsd2si (%rdi), %eax # sched: [12:1.00]
+; BTVER2-NEXT: vcvttsd2si %xmm0, %ecx # sched: [7:1.00]
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
;
; BTVER2-SSE-LABEL: test_cvttsd2siq:
; BTVER2-SSE: # %bb.0:
-; BTVER2-SSE-NEXT: cvttsd2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-SSE-NEXT: cvttsd2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-SSE-NEXT: cvttsd2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-SSE-NEXT: cvttsd2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-SSE-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-SSE-NEXT: retq # sched: [4:1.00]
;
; BTVER2-LABEL: test_cvttsd2siq:
; BTVER2: # %bb.0:
-; BTVER2-NEXT: vcvttsd2si (%rdi), %rax # sched: [8:1.00]
-; BTVER2-NEXT: vcvttsd2si %xmm0, %rcx # sched: [3:1.00]
+; BTVER2-NEXT: vcvttsd2si (%rdi), %rax # sched: [12:1.00]
+; BTVER2-NEXT: vcvttsd2si %xmm0, %rcx # sched: [7:1.00]
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
vcvttsd2si (%rax), %ecx
vcvttsd2si (%rax), %rcx
+vcvttss2si %xmm0, %ecx
+vcvttss2si %xmm0, %rcx
+vcvttss2si (%rax), %ecx
+vcvttss2si (%rax), %rcx
+
vdivpd %xmm0, %xmm1, %xmm2
vdivpd (%rax), %xmm1, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtps2pd (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtps2pd %xmm0, %ymm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtps2pd (%rax), %ymm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtsd2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtsd2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtsd2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtsd2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvtsd2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvtsd2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvtsd2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvtsd2si (%rax), %rcx
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtsd2ss %xmm0, %xmm1, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtsd2ss (%rax), %xmm1, %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtsi2sdl %ecx, %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtsi2ssq (%rax), %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtss2sd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtss2sd (%rax), %xmm1, %xmm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtss2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtss2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtss2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvtss2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvtss2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvtss2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvtss2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvtss2si (%rax), %rcx
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvttpd2dq %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvttpd2dqx (%rax), %xmm2
# CHECK-NEXT: - - - 2.00 2.00 - 2.00 - - - 2.00 - - - vcvttpd2dq %ymm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvttps2dq (%rax), %xmm2
# CHECK-NEXT: - - - - - - 2.00 - - - 2.00 - - - vcvttps2dq %ymm0, %ymm2
# CHECK-NEXT: - - - - - - 2.00 2.00 - - 2.00 - - - vcvttps2dq (%rax), %ymm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvttsd2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvttsd2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvttsd2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - vcvttsd2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvttsd2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvttsd2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvttsd2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvttsd2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvttss2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - vcvttss2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvttss2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - vcvttss2si (%rax), %rcx
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - vdivpd %xmm0, %xmm1, %xmm2
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - vdivpd (%rax), %xmm1, %xmm2
# CHECK-NEXT: - - - - 38.00 - 2.00 - - - - - - - vdivpd %ymm0, %ymm1, %ymm2
# CHECK-NEXT: 1 3 1.00 cvtsi2ssq %rcx, %xmm2
# CHECK-NEXT: 1 8 1.00 * cvtsi2ssl (%rax), %xmm2
# CHECK-NEXT: 1 8 1.00 * cvtsi2ssl (%rax), %xmm2
-# CHECK-NEXT: 1 3 1.00 cvtss2si %xmm0, %ecx
-# CHECK-NEXT: 1 3 1.00 cvtss2si %xmm0, %rcx
-# CHECK-NEXT: 1 8 1.00 * cvtss2si (%rax), %ecx
-# CHECK-NEXT: 1 8 1.00 * cvtss2si (%rax), %rcx
-# CHECK-NEXT: 1 3 1.00 cvttss2si %xmm0, %ecx
-# CHECK-NEXT: 1 3 1.00 cvttss2si %xmm0, %rcx
-# CHECK-NEXT: 1 8 1.00 * cvttss2si (%rax), %ecx
-# CHECK-NEXT: 1 8 1.00 * cvttss2si (%rax), %rcx
+# CHECK-NEXT: 2 7 1.00 cvtss2si %xmm0, %ecx
+# CHECK-NEXT: 2 7 1.00 cvtss2si %xmm0, %rcx
+# CHECK-NEXT: 2 12 1.00 * cvtss2si (%rax), %ecx
+# CHECK-NEXT: 2 12 1.00 * cvtss2si (%rax), %rcx
+# CHECK-NEXT: 2 7 1.00 cvttss2si %xmm0, %ecx
+# CHECK-NEXT: 2 7 1.00 cvttss2si %xmm0, %rcx
+# CHECK-NEXT: 2 12 1.00 * cvttss2si (%rax), %ecx
+# CHECK-NEXT: 2 12 1.00 * cvttss2si (%rax), %rcx
# CHECK-NEXT: 1 19 19.00 divps %xmm0, %xmm2
# CHECK-NEXT: 1 24 19.00 * divps (%rax), %xmm2
# CHECK-NEXT: 1 19 19.00 divss %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtsi2ssq %rcx, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtsi2ssl (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtsi2ssl (%rax), %xmm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtss2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtss2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtss2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtss2si (%rax), %rcx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvttss2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvttss2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttss2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttss2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvtss2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvtss2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvtss2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvtss2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvttss2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvttss2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvttss2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvttss2si (%rax), %rcx
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - divps %xmm0, %xmm2
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - divps (%rax), %xmm2
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - divss %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtps2dq (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtps2pd %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtps2pd (%rax), %xmm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtsd2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtsd2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtsd2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtsd2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvtsd2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvtsd2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvtsd2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvtsd2si (%rax), %rcx
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtsd2ss %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvtsd2ss (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvtsi2sdl %ecx, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttpd2dq (%rax), %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvttps2dq %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttps2dq (%rax), %xmm2
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvttsd2si %xmm0, %ecx
-# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - cvttsd2si %xmm0, %rcx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttsd2si (%rax), %ecx
-# CHECK-NEXT: - - - - - - 1.00 1.00 - - 1.00 - - - cvttsd2si (%rax), %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvttsd2si %xmm0, %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 - - - 1.00 - - - cvttsd2si %xmm0, %rcx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvttsd2si (%rax), %ecx
+# CHECK-NEXT: 1.00 - - 1.00 - - 1.00 1.00 - - 1.00 - - - cvttsd2si (%rax), %rcx
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - divpd %xmm0, %xmm2
# CHECK-NEXT: - - - - 19.00 - 1.00 1.00 - - - - - - divpd (%rax), %xmm2
# CHECK-NEXT: - - - - 19.00 - 1.00 - - - - - - - divsd %xmm0, %xmm2