For use by radeonsi.
v2: Make sure that it works for all 64 bits set.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
*mask &= ~(((1u << *count) - 1) << *start);
}
+static inline void
+u_bit_scan_consecutive_range64(uint64_t *mask, int *start, int *count)
+{
+ if (*mask == ~0llu) {
+ *start = 0;
+ *count = 64;
+ *mask = 0;
+ return;
+ }
+ *start = ffsll(*mask) - 1;
+ *count = ffsll(~(*mask >> *start)) - 1;
+ *mask &= ~(((1llu << *count) - 1) << *start);
+}
+
/**
* Return float bits.
*/