struct addi_private *devpriv = dev->private;
outl(data[0],
- devpriv->iobase + APCI3501_ANALOG_OUTPUT +
+ dev->iobase + APCI3501_ANALOG_OUTPUT +
APCI3501_AO_VOLT_MODE);
if (data[0]) {
printk("\nIn WriteAnalogOutput :: Not Valid Channel\n");
} /* end if((ul_Channel_no<0)||(ul_Channel_no>7)) */
- ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT);
+ ul_DAC_Ready = inl(dev->iobase + APCI3501_ANALOG_OUTPUT);
while (ul_DAC_Ready == 0) {
- ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT);
+ ul_DAC_Ready = inl(dev->iobase + APCI3501_ANALOG_OUTPUT);
ul_DAC_Ready = (ul_DAC_Ready >> 8) & 1;
}
(unsigned int) ((*data << 0x8) & 0x7FFFFF00L) |
(unsigned int) (ul_Polarity));
outl(ul_Command1,
- devpriv->iobase + APCI3501_ANALOG_OUTPUT +
+ dev->iobase + APCI3501_ANALOG_OUTPUT +
APCI3501_AO_PROG);
}
devpriv->b_TimerSelectMode = ADDIDATA_WATCHDOG;
/* Disable the watchdog */
- outl(0x0, devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Wa */
+ outl(0x0, dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Wa */
if (data[1] == 1) {
/* Enable TIMER int & DISABLE ALL THE OTHER int SOURCES */
outl(0x02,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} else {
- outl(0x0, devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Timer interrupt */
+ outl(0x0, dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Timer interrupt */
}
/* Loading the Timebase value */
outl(data[2],
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TIMEBASE);
/* Loading the Reload value */
outl(data[3],
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_RELOAD_VALUE);
/* Set the mode */
- ul_Command1 = inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG) | 0xFFF819E0UL; /* e2->e0 */
+ ul_Command1 = inl(dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG) | 0xFFF819E0UL; /* e2->e0 */
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} /* end if(data[0]==ADDIDATA_WATCHDOG) */
else if (data[0] == ADDIDATA_TIMER) {
/* First Stop The Timer */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
- outl(ul_Command1, devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* Stop The Timer */
+ outl(ul_Command1, dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* Stop The Timer */
devpriv->b_TimerSelectMode = ADDIDATA_TIMER;
if (data[1] == 1) {
/* Enable TIMER int & DISABLE ALL THE OTHER int SOURCES */
outl(0x02,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} else {
- outl(0x0, devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Timer interrupt */
+ outl(0x0, dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* disable Timer interrupt */
}
/* Loading Timebase */
outl(data[2],
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TIMEBASE);
/* Loading the Reload value */
outl(data[3],
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_RELOAD_VALUE);
- /* printk ("\nTimer Address :: %x\n", (devpriv->iobase+APCI3501_WATCHDOG)); */
+ /* printk ("\nTimer Address :: %x\n", (dev->iobase + APCI3501_WATCHDOG)); */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 =
(ul_Command1 & 0xFFF719E2UL) | 2UL << 13UL | 0x10UL;
- outl(ul_Command1, devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* mode 2 */
+ outl(ul_Command1, dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG); /* mode 2 */
} /* end if(data[0]==ADDIDATA_TIMER) */
if (data[1] == 1) {
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x1UL;
/* Enable the Watchdog */
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
}
{
/* Stop The Watchdog */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
outl(0x0,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} else if (data[1] == 2) {
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x200UL;
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} /* if(data[1]==2) */
} /* end if (devpriv->b_TimerSelectMode==ADDIDATA_WATCHDOG) */
if (data[1] == 1) {
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x1UL;
/* Enable the Timer */
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
} else if (data[1] == 0) {
/* Stop The Timer */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
}
else if (data[1] == 2) {
/* Trigger the Timer */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x200UL;
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_PROG);
}
} /* end if (devpriv->b_TimerSelectMode==ADDIDATA_TIMER) */
- i_Temp = inl(devpriv->iobase + APCI3501_WATCHDOG +
+ i_Temp = inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TRIG_STATUS) & 0x1;
return insn->n;
}
if (devpriv->b_TimerSelectMode == ADDIDATA_WATCHDOG) {
data[0] =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TRIG_STATUS) & 0x1;
- data[1] = inl(devpriv->iobase + APCI3501_WATCHDOG);
+ data[1] = inl(dev->iobase + APCI3501_WATCHDOG);
} /* end if (devpriv->b_TimerSelectMode==ADDIDATA_WATCHDOG) */
else if (devpriv->b_TimerSelectMode == ADDIDATA_TIMER) {
data[0] =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TRIG_STATUS) & 0x1;
- data[1] = inl(devpriv->iobase + APCI3501_WATCHDOG);
+ data[1] = inl(dev->iobase + APCI3501_WATCHDOG);
} /* end if (devpriv->b_TimerSelectMode==ADDIDATA_TIMER) */
else if ((devpriv->b_TimerSelectMode != ADDIDATA_TIMER)
struct comedi_insn *insn,
unsigned int *data)
{
- struct addi_private *devpriv = dev->private;
-
- data[1] = inl(devpriv->iobase + APCI3501_DIGITAL_IP) & 0x3;
+ data[1] = inl(dev->iobase + APCI3501_DIGITAL_IP) & 0x3;
return insn->n;
}
struct comedi_insn *insn,
unsigned int *data)
{
- struct addi_private *devpriv = dev->private;
unsigned int mask = data[0];
unsigned int bits = data[1];
- s->state = inl(devpriv->iobase + APCI3501_DIGITAL_OP);
+ s->state = inl(dev->iobase + APCI3501_DIGITAL_OP);
if (mask) {
s->state &= ~mask;
s->state |= (bits & mask);
- outl(s->state, devpriv->iobase + APCI3501_DIGITAL_OP);
+ outl(s->state, dev->iobase + APCI3501_DIGITAL_OP);
}
data[1] = s->state;
/* Disable Interrupt */
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
+ inl(dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
ul_Command1 = (ul_Command1 & 0xFFFFF9FDul);
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
+ dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
ui_Timer_AOWatchdog =
- inl(devpriv->iobase + APCI3501_WATCHDOG +
+ inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_IRQ) & 0x1;
if ((!ui_Timer_AOWatchdog)) {
/* Enable Interrupt Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
ul_Command1 =
- inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
+ inl(dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
ul_Command1 = ((ul_Command1 & 0xFFFFF9FDul) | 1 << 1);
outl(ul_Command1,
- devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
- i_temp = inl(devpriv->iobase + APCI3501_WATCHDOG +
+ dev->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG);
+ i_temp = inl(dev->iobase + APCI3501_WATCHDOG +
APCI3501_TCW_TRIG_STATUS) & 0x1;
return IRQ_HANDLED;
static int apci3501_reset(struct comedi_device *dev)
{
- struct addi_private *devpriv = dev->private;
int i_Count = 0, i_temp = 0;
unsigned int ul_Command1 = 0, ul_Polarity, ul_DAC_Ready = 0;
- outl(0x0, devpriv->iobase + APCI3501_DIGITAL_OP);
- outl(1, devpriv->iobase + APCI3501_ANALOG_OUTPUT +
+ outl(0x0, dev->iobase + APCI3501_DIGITAL_OP);
+ outl(1, dev->iobase + APCI3501_ANALOG_OUTPUT +
APCI3501_AO_VOLT_MODE);
ul_Polarity = 0x80000000;
for (i_Count = 0; i_Count <= 7; i_Count++) {
- ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT);
+ ul_DAC_Ready = inl(dev->iobase + APCI3501_ANALOG_OUTPUT);
while (ul_DAC_Ready == 0) {
ul_DAC_Ready =
- inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT);
+ inl(dev->iobase + APCI3501_ANALOG_OUTPUT);
ul_DAC_Ready = (ul_DAC_Ready >> 8) & 1;
}
(unsigned int) ((i_temp << 0x8) & 0x7FFFFF00L) |
(unsigned int) (ul_Polarity));
outl(ul_Command1,
- devpriv->iobase + APCI3501_ANALOG_OUTPUT +
+ dev->iobase + APCI3501_ANALOG_OUTPUT +
APCI3501_AO_PROG);
}
}
return ret;
dev->iobase = pci_resource_start(pcidev, 1);
- devpriv->iobase = dev->iobase;
devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);