tg3: Recode PCI MRRS adjustment as a PCI quirk
authorMatt Carlson <mcarlson@broadcom.com>
Mon, 27 Feb 2012 09:44:48 +0000 (09:44 +0000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 5 Mar 2012 01:54:01 +0000 (20:54 -0500)
This patch recodes the MRRS cap for 5719 A0 devices as a PCI quirk.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/tg3.c
drivers/pci/quirks.c
include/linux/pci_ids.h

index a8490a4..bc236b6 100644 (file)
@@ -14242,12 +14242,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
 
                tg3_flag_set(tp, PCI_EXPRESS);
 
-               if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0) {
-                       int readrq = pcie_get_readrq(tp->pdev);
-                       if (readrq > 2048)
-                               pcie_set_readrq(tp->pdev, 2048);
-               }
-
                pci_read_config_word(tp->pdev,
                                     pci_pcie_cap(tp->pdev) + PCI_EXP_LNKCTL,
                                     &lnkctl);
index 6476547..f722c5f 100644 (file)
@@ -2161,6 +2161,24 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
                        PCI_DEVICE_ID_NX2_5709S,
                        quirk_brcm_570x_limit_vpd);
 
+static void __devinit quirk_brcm_5719_limit_mrrs(struct pci_dev *dev)
+{
+       u32 rev;
+
+       pci_read_config_dword(dev, 0xf4, &rev);
+
+       /* Only CAP the MRRS if the device is a 5719 A0 */
+       if (rev == 0x05719000) {
+               int readrq = pcie_get_readrq(dev);
+               if (readrq > 2048)
+                       pcie_set_readrq(dev, 2048);
+       }
+}
+
+DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM,
+                        PCI_DEVICE_ID_TIGON3_5719,
+                        quirk_brcm_5719_limit_mrrs);
+
 /* Originally in EDAC sources for i82875P:
  * Intel tells BIOS developers to hide device 6 which
  * configures the overflow device access containing
index 31d77af..3329965 100644 (file)
 #define PCI_DEVICE_ID_NX2_57711E       0x1650
 #define PCI_DEVICE_ID_TIGON3_5705      0x1653
 #define PCI_DEVICE_ID_TIGON3_5705_2    0x1654
+#define PCI_DEVICE_ID_TIGON3_5719      0x1657
 #define PCI_DEVICE_ID_TIGON3_5721      0x1659
 #define PCI_DEVICE_ID_TIGON3_5722      0x165a
 #define PCI_DEVICE_ID_TIGON3_5723      0x165b