OS << ')';
}
-void MipsInstPrinter::printCPURegs(const MCInst *MI, unsigned OpNo,
- raw_ostream &O) {
- printRegName(O, MI->getOperand(OpNo).getReg());
-}
-
void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
- void printCPURegs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
let ParserMethod = "parseFGR32Regs";
}
-def CPURegsOpnd : RegisterOperand<CPURegs, "printCPURegs"> {
+def CPURegsOpnd : RegisterOperand<CPURegs> {
let ParserMatchClass = CPURegsAsmOperand;
}
-def CPU64RegsOpnd : RegisterOperand<CPU64Regs, "printCPURegs"> {
+def CPU64RegsOpnd : RegisterOperand<CPU64Regs> {
let ParserMatchClass = CPU64RegsAsmOperand;
}
-def CCROpnd : RegisterOperand<CCR, "printCPURegs"> {
+def CCROpnd : RegisterOperand<CCR> {
let ParserMatchClass = CCRAsmOperand;
}
let ParserMethod = "parseHW64Regs";
}
-def HWRegsOpnd : RegisterOperand<HWRegs, "printCPURegs"> {
+def HWRegsOpnd : RegisterOperand<HWRegs> {
let ParserMatchClass = HWRegsAsmOperand;
}
-def HW64RegsOpnd : RegisterOperand<HWRegs64, "printCPURegs"> {
+def HW64RegsOpnd : RegisterOperand<HWRegs64> {
let ParserMatchClass = HW64RegsAsmOperand;
}