/* { dg-final { scan-assembler-not "\\.data(?!\\.rel\\.ro)" { xfail powerpc*-*-aix* mmix-*-* x86_64-*-mingw* } } } */
/* { dg-final { scan-assembler-symbol-section {^_?a$} {^\.(const|rodata|srodata)|\[RO\]} } } */
static const int a[2] = { 1, 2 };
-/* { dg-final { scan-assembler-symbol-section {^_?a1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?a1$} {^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
const int a1[2] = { 1, 2 };
typedef const int ci;
/* { dg-final { scan-assembler-symbol-section {^_?b$} {^\.(const|rodata|srodata)|\[RO\]} } } */
static ci b[2] = { 3, 4 };
-/* { dg-final { scan-assembler-symbol-section {^_?b1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?b1$} {^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
ci b1[2] = { 3, 4 };
typedef int ia[2];
/* { dg-final { scan-assembler-symbol-section {^_?c$} {^\.(const|rodata|srodata)|\[RO\]} } } */
static const ia c = { 5, 6 };
-/* { dg-final { scan-assembler-symbol-section {^_?c1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?c1$} {^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
const ia c1 = { 5, 6 };
typedef const int cia[2];
/* { dg-final { scan-assembler-symbol-section {^_?d$} {^\.(const|rodata|srodata)|\[RO\]} } } */
static cia d = { 7, 8 };
-/* { dg-final { scan-assembler-symbol-section {^_?d1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?d1$} {^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
cia d1 = { 7, 8 };
/* { dg-final { scan-assembler-symbol-section {^_?e$} {^\.(const|rodata|srodata)|\[RO\]} } } */
static cia e[2] = { { 1, 2 }, { 3, 4 } };
-/* { dg-final { scan-assembler-symbol-section {^_?e1$} {^\.(const|rodata|srodata)|\[RO\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?e1$} {^\.(const|rodata|srodata|sdata)|\[RO\]} } } */
cia e1[2] = { { 1, 2 }, { 3, 4 } };
-/* { dg-final { scan-assembler-symbol-section {^_?p$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const p = &a;
-/* { dg-final { scan-assembler-symbol-section {^_?q$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const q = &b;
-/* { dg-final { scan-assembler-symbol-section {^_?r$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const r = &c;
-/* { dg-final { scan-assembler-symbol-section {^_?s$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const s = &d;
-/* { dg-final { scan-assembler-symbol-section {^_?t$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const t = &e;
-/* { dg-final { scan-assembler-symbol-section {^_?p1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?p1$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const p1 = &a1;
-/* { dg-final { scan-assembler-symbol-section {^_?q1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?q1$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const q1 = &b1;
-/* { dg-final { scan-assembler-symbol-section {^_?r1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?r1$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const r1 = &c1;
-/* { dg-final { scan-assembler-symbol-section {^_?s1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?s1$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const s1 = &d1;
-/* { dg-final { scan-assembler-symbol-section {^_?t1$} {^\.(const|rodata|srodata)|\[RW\]} } } */
+/* { dg-final { scan-assembler-symbol-section {^_?t1$} {^\.(const|rodata|srodata|sdata)|\[RW\]} } } */
void *const t1 = &e1;
foreach symbol_name [lsort [array names section_by_symbol]] {
if { [regexp -- $symbol_pattern $symbol_name] } {
set section $section_by_symbol($symbol_name)
+ if { [istarget powerpc*-*-*] && $section == ".opd" } {
+ set section $section_by_symbol(.L.$symbol_name)
+ }
set description "$testcase $name symbol $printable_symbol_pattern (found $symbol_name) has section $printable_expected_section_pattern"
if { $section == "" } {
fail "$description (no section detected)"
set section_pattern {^\s*(?:(?:\.section|\.csect)\s+(.*)|(\.const|\.data|\.text)\s*)$}
set label_pattern {^(\S+):$}
+ set previous_pattern {^\s*\.previous\s*$}
set fd [open $filename r]
set current_section ""
+ set prev_section ""
while { [gets $fd line] >= 0 } {
if { [regexp -- $label_pattern $line dummy symbol_name] } {
set up_result($symbol_name) $current_section
} elseif { [regexp -- $section_pattern $line dummy section_directive_arguments full_section_directive] } {
+ set prev_section $current_section
if { $full_section_directive eq "" } {
# Example: .section .text,"ax",progbits
# Example: .section ".text",#alloc,#execinstr,#progbits
# Example: .text
set current_section "$full_section_directive"
}
- }
+ } elseif { [regexp -- $previous_pattern $line dummy] } {
+ set sect $prev_section
+ set prev_section $current_section
+ set current_section $sect
+ }
}
close $fd
}