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Ensure that `GenTreeIndir load` is used in a scope where it can't be optimized away...
author
Tanner Gooding
<tagoo@outlook.com>
Wed, 23 Oct 2019 20:11:21 +0000
(13:11 -0700)
committer
GitHub
<noreply@github.com>
Wed, 23 Oct 2019 20:11:21 +0000
(13:11 -0700)
Commit migrated from https://github.com/dotnet/coreclr/commit/
03710d0733755bcc121c7a2f1ea7e323a9442848
src/coreclr/src/jit/instr.cpp
patch
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diff --git
a/src/coreclr/src/jit/instr.cpp
b/src/coreclr/src/jit/instr.cpp
index
a0d1bd3
..
8055dc6
100644
(file)
--- a/
src/coreclr/src/jit/instr.cpp
+++ b/
src/coreclr/src/jit/instr.cpp
@@
-1112,13
+1112,14
@@
void CodeGen::inst_RV_TT_IV(instruction ins, emitAttr attr, regNumber reg1, GenT
default:
{
+ GenTreeIndir load = indirForm(rmOp->TypeGet(), addr);
+
if (memIndir == nullptr)
{
// This is the HW intrinsic load case.
// Until we improve the handling of addressing modes in the emitter, we'll create a
// temporary GT_IND to generate code with.
- GenTreeIndir load = indirForm(rmOp->TypeGet(), addr);
- memIndir = &load;
+ memIndir = &load;
}
GetEmitter()->emitIns_R_A_I(ins, attr, reg1, memIndir, ival);
return;