Add ADI Blackfin support

- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:

diff --git a/CHANGELOG b/CHANGELOG
index a11dd4d..20e875a 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,12 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Add ADI Blackfin support
+  - add support for Analog Devices Blackfin BF533 CPU
+  - add support for the ADI BF533 Stamp uClinux board
+  - add support for the ADI BF533 EZKit board
+  Patches by Richard Klingler, 11 Jun 2005
+
 * Add loads of ntohl() in image header handling
   Patch by Steven Scholz, 10 Jun 2005
 

diff --git a/Makefile b/Makefile
index fefcbba..0c8137f 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -85,6 +85,9 @@ endif
 ifeq ($(ARCH),microblaze)
 CROSS_COMPILE = mb-
 endif
+ifeq ($(ARCH),blackfin)
+CROSS_COMPILE = bfin-elf-
+endif
 endif
 endif
 
@@ -111,6 +114,10 @@ endif
 ifeq ($(CPU),mpc85xx)
 OBJS += cpu/$(CPU)/resetvec.o
 endif
+ifeq ($(CPU),bf533)
+OBJS += cpu/$(CPU)/start1.o    cpu/$(CPU)/interrupt.o  cpu/$(CPU)/cache.o
+OBJS += cpu/$(CPU)/cplbhdlr.o  cpu/$(CPU)/cplbmgr.o    cpu/$(CPU)/flush.o
+endif
 
 LIBS  = lib_generic/libgeneric.a
 LIBS += board/$(BOARDDIR)/lib$(BOARD).a
@@ -1860,6 +1867,19 @@ suzaku_config:   unconfig
        @./mkconfig -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
 
 #########################################################################
+## Blackfin
+#########################################################################
+ezkit533_config        :       unconfig
+       @./mkconfig $(@:_config=) blackfin bf533 ezkit533
+
+stamp_config   :       unconfig
+       @./mkconfig $(@:_config=) blackfin bf533 stamp
+
+dspstamp_config        :       unconfig
+       @./mkconfig $(@:_config=) blackfin bf533 dsp_stamp
+
+#########################################################################
+#########################################################################
 #########################################################################
 
 clean:
@@ -1870,6 +1890,7 @@ clean:
        rm -f examples/hello_world examples/timer \
              examples/eepro100_eeprom examples/sched \
              examples/mem_to_mem_idma2intr examples/82559_eeprom \
+             examples/smc91111_eeprom \
              examples/test_burst
        rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
        rm -f tools/mpc86x_clk tools/ncb

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 8bb524b..5b93bdd 100644 (file)
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -252,6 +252,8 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
        if (hdr->ih_arch != IH_CPU_MICROBLAZE)
 #elif defined(__nios2__)
        if (hdr->ih_arch != IH_CPU_NIOS2)
+#elif defined(__blackfin__)
+       if (hdr->ih_arch != IH_CPU_BLACKFIN)
 #else
 # error Unknown CPU type
 #endif

diff --git a/config.mk b/config.mk
index d85ac36..dfbb1b7 100644 (file)
--- a/config.mk
+++ b/config.mk
@@ -53,6 +53,10 @@ PLATFORM_CPPFLAGS+= -D__ARM__
 endif
 endif
 
+ifeq ($(ARCH),blackfin)
+PLATFORM_CPPFLAGS+= -D__BLACKFIN__ -mno-underscore
+endif
+
 ifdef  ARCH
 sinclude $(TOPDIR)/$(ARCH)_config.mk   # include architecture dependend rules
 endif

diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index ff4d85f..a989d34 100644 (file)
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -878,18 +878,27 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset
                debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
                       cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
                *addr.cp = cword.c;
+#ifdef CONFIG_BLACKFIN
+               asm("ssync;");
+#endif
                break;
        case FLASH_CFI_16BIT:
                debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
                       cmd, cword.w,
                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
                *addr.wp = cword.w;
+#ifdef CONFIG_BLACKFIN
+               asm("ssync;");
+#endif
                break;
        case FLASH_CFI_32BIT:
                debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
                       cmd, cword.l,
                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
                *addr.lp = cword.l;
+#ifdef CONFIG_BLACKFIN
+               asm("ssync;");
+#endif
                break;
        case FLASH_CFI_64BIT:
 #ifdef DEBUG
@@ -904,6 +913,9 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset
                }
 #endif
                *addr.llp = cword.ll;
+#ifdef CONFIG_BLACKFIN
+               asm("ssync;");
+#endif
                break;
        }
 }

diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 84e243d..f91e4b9 100644 (file)
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -160,6 +160,9 @@ extern void eth_halt(void);
 extern int eth_rx(void);
 extern int eth_send(volatile void *packet, int length);
 
+#ifdef SHARED_RESOURCES
+       extern void swap_to(int device_id);
+#endif
 
 /*
  . This is called by  register_netdev().  It is responsible for
@@ -533,6 +536,9 @@ static void smc_shutdown()
        SMC_SELECT_BANK( 0 );
        SMC_outb( RCR_CLEAR, RCR_REG );
        SMC_outb( TCR_CLEAR, TCR_REG );
+#ifdef SHARED_RESOURCES
+       swap_to(FLASH);
+#endif
 }
 
 
@@ -1511,6 +1517,9 @@ static void print_packet( byte * buf, int length )
 #endif
 
 int eth_init(bd_t *bd) {
+#ifdef SHARED_RESOURCES
+       swap_to(ETHERNET);
+#endif
        return (smc_open(bd));
 }
 

diff --git a/drivers/smc91111.h b/drivers/smc91111.h
index c3c3367..d03cbc3 100644 (file)
--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -185,6 +185,8 @@ typedef unsigned long int           dword;
 
 #ifdef CONFIG_ADNPESC1
 #define        SMC_inw(r)      (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
+#elif CONFIG_BLACKFIN
+#define        SMC_inw(r)      ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); asm("ssync;"); __v;})
 #else
 #define        SMC_inw(r)      (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
 #endif
@@ -192,6 +194,8 @@ typedef unsigned long int           dword;
 
 #ifdef CONFIG_ADNPESC1
 #define        SMC_outw(d,r)   (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
+#elif CONFIG_BLACKFIN
+#define        SMC_outw(d,r)   {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d);asm("ssync;");}
 #else
 #define        SMC_outw(d,r)   (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
 #endif

diff --git a/examples/Makefile b/examples/Makefile
index 2f8c4c4..fee2674 100644 (file)
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -53,6 +53,10 @@ ifeq ($(ARCH),microblaze)
 LOAD_ADDR = 0x80F00000
 endif
 
+ifeq ($(ARCH),blackfin)
+LOAD_ADDR = 0x1000
+endif
+
 include $(TOPDIR)/config.mk
 
 SREC   = hello_world.srec
@@ -73,6 +77,11 @@ SREC   += sched.srec
 BIN    += sched.bin sched
 endif
 
+ifeq ($(ARCH),blackfin)
+SREC   += smc91111_eeprom.srec
+BIN    += smc91111_eeprom.bin smc91111_eeprom
+endif
+
 # The following example is pretty 8xx specific...
 ifeq ($(CPU),mpc8xx)
 SREC   += timer.srec

diff --git a/examples/smc91111_eeprom.c b/examples/smc91111_eeprom.c
index 885f933..98e3e86 100644 (file)
--- a/examples/smc91111_eeprom.c
+++ b/examples/smc91111_eeprom.c
@@ -214,13 +214,11 @@ int smc91111_eeprom (int argc, char *argv[])
 
                        switch (what) {
                        case 1:
-                               printf ("Writing EEPROM register %02x with %04x\n",
-                                       reg, value);
+                               printf ("Writing EEPROM register %02x with %04x\n", reg, value);
                                write_eeprom_reg (value, reg);
                                break;
                        case 2:
-                               printf ("Writing MAC register bank %i,
-                                       reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
+                               printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
                                SMC_SELECT_BANK (reg >> 4);
                                SMC_outw (value, reg & 0xE);
                                break;

diff --git a/examples/stubs.c b/examples/stubs.c
index d4c6e06..1797274 100644 (file)
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -125,6 +125,19 @@ gd_t *global_data;
 "      lwi     r5, r5, %1\n"                   \
 "      bra     r5\n"                           \
        : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r5");
+#elif defined(CONFIG_BLACKFIN)
+/*
+ * P5 holds the pointer to the global_data, P0 is a call-clobbered
+ * register
+ */
+#define EXPORT_FUNC(x)                 \
+        asm volatile (                 \
+"       .globl " #x "\n"               \
+#x ":\n"                               \
+"      P0 = [P5 + %0]\n"               \
+"      P0 = [P0 + %1]\n"               \
+"      JUMP (P0)\n"                    \
+       : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "P0");
 #else
 #error stubs definition missing for this architecture
 #endif

diff --git a/include/flash.h b/include/flash.h
index 8493191..4c68c68 100644 (file)
--- a/include/flash.h
+++ b/include/flash.h
@@ -242,6 +242,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
 #define STM_ID_29W320DT 0x22CA22CA     /* M29W320DT ID (32 M, top boot sector) */
 #define STM_ID_29W320DB 0x22CB22CB     /* M29W320DB ID (32 M, bottom boot sect)        */
 #define STM_ID_29W040B 0x00E300E3      /* M29W040B ID (4M = 512K x 8)  */
+#define FLASH_PSD4256GV 0x00E9         /* PSD4256 Flash and CPLD combination   */
 
 #define INTEL_ID_28F016S    0x66a066a0 /* 28F016S[VS] ID (16M = 512k x 16)     */
 #define INTEL_ID_28F800B3T  0x88928892 /*  8M = 512K x 16 top boot sector      */

diff --git a/include/image.h b/include/image.h
index af37bca..139df0b 100644 (file)
--- a/include/image.h
+++ b/include/image.h
@@ -75,6 +75,7 @@
 #define IH_CPU_NIOS            13      /* Nios-32      */
 #define IH_CPU_MICROBLAZE      14      /* MicroBlaze   */
 #define IH_CPU_NIOS2           15      /* Nios-II      */
+#define IH_CPU_BLACKFIN                16      /* Blackfin     */
 
 /*
  * Image Types

diff --git a/include/linux/stat.h b/include/linux/stat.h
index 2f7a3b3..f9422cb 100644 (file)
--- a/include/linux/stat.h
+++ b/include/linux/stat.h
@@ -67,7 +67,7 @@ struct stat {
 
 #endif /* __PPC__ */
 
-#if defined (__ARM__) || defined (__I386__) || defined (__M68K__)
+#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__blackfin__)
 
 struct stat {
        unsigned short st_dev;

diff --git a/rtc/Makefile b/rtc/Makefile
index 4ceac76..b08057e 100644 (file)
--- a/rtc/Makefile
+++ b/rtc/Makefile
@@ -28,8 +28,8 @@ include $(TOPDIR)/config.mk
 LIB    = librtc.a
 
 OBJS   = date.o   \
-         ds12887.o ds1302.o ds1306.o ds1307.o ds1337.o \
-         ds1556.o ds164x.o ds174x.o \
+         bf533_rtc.o ds12887.o ds1302.o ds1306.o ds1307.o \
+         ds1337.o ds1556.o ds164x.o ds174x.o \
          m41t11.o max6900.o m48t35ax.o mc146818.o mk48t59.o \
          mpc5xxx.o mpc8xx.o pcf8563.o s3c24x0_rtc.o rs5c372.o
 

diff --git a/tools/mkimage.c b/tools/mkimage.c
index 70452db..5222bb2 100644 (file)
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -93,6 +93,7 @@ table_entry_t arch_name[] = {
     {  IH_CPU_SH,              "sh",           "SuperH",       },
     {  IH_CPU_SPARC,           "sparc",        "SPARC",        },
     {  IH_CPU_SPARC64,         "sparc64",      "SPARC 64 Bit", },
+    {  IH_CPU_BLACKFIN,        "blackfin",     "Blackfin",     },
     {  -1,                     "",             "",             },
 };