dt-bindings: coresight: Add burst size for TMC

Add "arm,max-burst-size" optional property for TMC ETR.
If specified, this value indicates the maximum burst size
that can be initiated by TMC on the AXI bus.

Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210901131049.1365367-2-tanmay@marvell.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index 7f9c1ca8748766b66f9dbfa41e3734522a490863..c68d93a35b6c342ee2f4bb3eb460376b8ca18a60 100644 (file)
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -127,6 +127,11 @@ its hardware characteristcs.
        * arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
          use the SG mode on this system.
 
+       * arm,max-burst-size: The maximum burst size initiated by TMC on the
+         AXI master interface. The burst size can be in the range [0..15],
+         the setting supports one data transfer per burst up to a maximum of
+         16 data transfers per burst.
+
 * Optional property for CATU :
        * interrupts : Exactly one SPI may be listed for reporting the address
          error