The default CPU used by llvm-mc doesn't have the NOPL feature, but
if we know we're compiling in 64-bit mode we should be able to
use nopl.
; TEXT-10-EMPTY:
; TEXT-10-NEXT: <.text>:
; TEXT-10-NEXT: retq
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
-; TEXT-10-NEXT: nop
+; TEXT-10-NEXT: nopw %cs:(%rax,%rax)
+; TEXT-10-NEXT: nopl (%rax,%rax)
; TEXT-10-NEXT: retq
; TEXT-10-NEXT: int3
; TEXT-10-NEXT: int3
// This CPU doesn't support long nops. If needed add more.
// FIXME: We could generated something better than plain 0x90.
- if (!STI.getFeatureBits()[X86::FeatureNOPL]) {
+ if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit)) {
for (uint64_t i = 0; i < Count; ++i)
OS << '\x90';
return true;
# CHECK-NEXT: 1: testq $2, %rdx
# CHECK-NEXT: 8: jne
# CHECK-NEXT: e: nop
-# CHECK-NEXT: f: nop
# CHECK-NEXT: 10: jle
.text
# following nops, doing so would make the jmp misaligned.
# CHECK: 18: jmp
jmp bar
-# CHECK: 1d: nop
-# CHECK: 1e: nop
-# CHECK: 1f: nop
+# CHECK: 1d: nopl (%rax)
# CHECK: 20: int3
.p2align 5
int3