author | Alex Deucher <alexander.deucher@amd.com> | |
Tue, 12 Jul 2022 13:22:23 +0000 (09:22 -0400) | ||
committer | Alex Deucher <alexander.deucher@amd.com> | |
Wed, 13 Jul 2022 15:25:18 +0000 (11:25 -0400) |
drivers/gpu/drm/amd/include/asic_reg/clk/clk_11_0_1_offset.h | [changed mode: 0755->0644] | patch | blob | history |
drivers/gpu/drm/amd/include/asic_reg/clk/clk_11_0_1_sh_mask.h | [changed mode: 0755->0644] | patch | blob | history |
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_offset.h | [changed mode: 0755->0644] | patch | blob | history |
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_3_sh_mask.h | [changed mode: 0755->0644] | patch | blob | history |
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_2_0_3_offset.h | [changed mode: 0755->0644] | patch | blob | history |
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_2_0_3_sh_mask.h | [changed mode: 0755->0644] | patch | blob | history |