arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01]

Define "assigned-clocks" and "assigned-clock-rates" properties
for CAN[01] DT nodes, as required by the dt-bindings.

Fixes: eccc40002972c424 ("arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes")
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index f209457..0ef8f53 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1128,6 +1128,8 @@
                                 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
                                 <&can_clk>;
                        clock-names = "clkp1", "clkp2", "can_clk";
+                       assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
+                       assigned-clock-rates = <40000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 916>;
                        status = "disabled";
@@ -1142,6 +1144,8 @@
                                 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
                                 <&can_clk>;
                        clock-names = "clkp1", "clkp2", "can_clk";
+                       assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
+                       assigned-clock-rates = <40000000>;
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 915>;
                        status = "disabled";