PCI: tegra: Add support to enable slot regulators

Add support to get regulator information of 3.3V and 12V supplies of a PCIe
slot from the respective controller's device-tree node and enable those
supplies. This is required in platforms like p2972-0000 where the supplies
to x16 slot owned by C5 controller need to be enabled before attempting to
enumerate the devices.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 0b87028..f89f5ac 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -278,6 +278,8 @@ struct tegra_pcie_dw {
        u32 aspm_l0s_enter_lat;
 
        struct regulator *pex_ctl_supply;
+       struct regulator *slot_ctl_3v3;
+       struct regulator *slot_ctl_12v;
 
        unsigned int phy_count;
        struct phy **phys;
@@ -1055,6 +1057,73 @@ static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie)
        }
 }
 
+static int tegra_pcie_get_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+       pcie->slot_ctl_3v3 = devm_regulator_get_optional(pcie->dev, "vpcie3v3");
+       if (IS_ERR(pcie->slot_ctl_3v3)) {
+               if (PTR_ERR(pcie->slot_ctl_3v3) != -ENODEV)
+                       return PTR_ERR(pcie->slot_ctl_3v3);
+
+               pcie->slot_ctl_3v3 = NULL;
+       }
+
+       pcie->slot_ctl_12v = devm_regulator_get_optional(pcie->dev, "vpcie12v");
+       if (IS_ERR(pcie->slot_ctl_12v)) {
+               if (PTR_ERR(pcie->slot_ctl_12v) != -ENODEV)
+                       return PTR_ERR(pcie->slot_ctl_12v);
+
+               pcie->slot_ctl_12v = NULL;
+       }
+
+       return 0;
+}
+
+static int tegra_pcie_enable_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+       int ret;
+
+       if (pcie->slot_ctl_3v3) {
+               ret = regulator_enable(pcie->slot_ctl_3v3);
+               if (ret < 0) {
+                       dev_err(pcie->dev,
+                               "Failed to enable 3.3V slot supply: %d\n", ret);
+                       return ret;
+               }
+       }
+
+       if (pcie->slot_ctl_12v) {
+               ret = regulator_enable(pcie->slot_ctl_12v);
+               if (ret < 0) {
+                       dev_err(pcie->dev,
+                               "Failed to enable 12V slot supply: %d\n", ret);
+                       goto fail_12v_enable;
+               }
+       }
+
+       /*
+        * According to PCI Express Card Electromechanical Specification
+        * Revision 1.1, Table-2.4, T_PVPERL (Power stable to PERST# inactive)
+        * should be a minimum of 100ms.
+        */
+       if (pcie->slot_ctl_3v3 || pcie->slot_ctl_12v)
+               msleep(100);
+
+       return 0;
+
+fail_12v_enable:
+       if (pcie->slot_ctl_3v3)
+               regulator_disable(pcie->slot_ctl_3v3);
+       return ret;
+}
+
+static void tegra_pcie_disable_slot_regulators(struct tegra_pcie_dw *pcie)
+{
+       if (pcie->slot_ctl_12v)
+               regulator_disable(pcie->slot_ctl_12v);
+       if (pcie->slot_ctl_3v3)
+               regulator_disable(pcie->slot_ctl_3v3);
+}
+
 static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
                                        bool en_hw_hot_rst)
 {
@@ -1068,6 +1137,10 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
                return ret;
        }
 
+       ret = tegra_pcie_enable_slot_regulators(pcie);
+       if (ret < 0)
+               goto fail_slot_reg_en;
+
        ret = regulator_enable(pcie->pex_ctl_supply);
        if (ret < 0) {
                dev_err(pcie->dev, "Failed to enable regulator: %d\n", ret);
@@ -1150,6 +1223,8 @@ fail_core_apb_rst:
 fail_core_clk:
        regulator_disable(pcie->pex_ctl_supply);
 fail_reg_en:
+       tegra_pcie_disable_slot_regulators(pcie);
+fail_slot_reg_en:
        tegra_pcie_bpmp_set_ctrl_state(pcie, false);
 
        return ret;
@@ -1182,6 +1257,8 @@ static int __deinit_controller(struct tegra_pcie_dw *pcie)
                return ret;
        }
 
+       tegra_pcie_disable_slot_regulators(pcie);
+
        ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false);
        if (ret) {
                dev_err(pcie->dev, "Failed to disable controller %d: %d\n",
@@ -1381,6 +1458,12 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
                return ret;
        }
 
+       ret = tegra_pcie_get_slot_regulators(pcie);
+       if (ret < 0) {
+               dev_err(dev, "Failed to get slot regulators: %d\n", ret);
+               return ret;
+       }
+
        pcie->pex_ctl_supply = devm_regulator_get(dev, "vddio-pex-ctl");
        if (IS_ERR(pcie->pex_ctl_supply)) {
                ret = PTR_ERR(pcie->pex_ctl_supply);