arm64: dts: renesas: rzg2l-smarc: Move out i2c3 and Audio codec from common dtsi

On RZ/G2L SoM module, the Audio codec is connected to i2c3 bus whereas on
RZ/G2LC, it is connected to i2c2 bus. So move out i2c3 and wm8978 nodes
from common dtsi to soc specific dtsi.

While at it add wm8978 node to RZ/G2LC SoC specific dtsi to fix the
build error.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
index d5254b1..dc39b05 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
@@ -26,12 +26,6 @@
        status = "disabled";
 };
 
-&i2c3 {
-       /delete-property/ pinctrl-0;
-       /delete-property/ pinctrl-names;
-       status = "disabled";
-};
-
 &spi1 {
        /delete-property/ pinctrl-0;
        /delete-property/ pinctrl-names;

diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
index 588117a..8dd1c69 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
@@ -26,7 +26,6 @@
                serial0 = &scif0;
                i2c0 = &i2c0;
                i2c1 = &i2c1;
-               i2c3 = &i2c3;
        };
 
        chosen {
@@ -131,20 +130,6 @@
        status = "okay";
 };
 
-&i2c3 {
-       pinctrl-0 = <&i2c3_pins>;
-       pinctrl-names = "default";
-       clock-frequency = <400000>;
-
-       status = "okay";
-
-       wm8978: codec@1a {
-               compatible = "wlf,wm8978";
-               #sound-dai-cells = <0>;
-               reg = <0x1a>;
-       };
-};
-
 &ohci0 {
        dr_mode = "otg";
        status = "okay";

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 33ddfd1..c934cd3 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -14,6 +14,21 @@
 / {
        aliases {
                serial1 = &scif2;
+               i2c3 = &i2c3;
+       };
+};
+
+&i2c3 {
+       pinctrl-0 = <&i2c3_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+
+       status = "okay";
+
+       wm8978: codec@1a {
+               compatible = "wlf,wm8978";
+               #sound-dai-cells = <0>;
+               reg = <0x1a>;
        };
 };
 

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index df7631f..55d3b73 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -43,6 +43,7 @@
 / {
        aliases {
                serial1 = &scif1;
+               i2c2 = &i2c2;
        };
 };
 
@@ -59,6 +60,16 @@
 };
 #endif
 
+&i2c2 {
+       status = "disabled";
+
+       wm8978: codec@1a {
+               compatible = "wlf,wm8978";
+               #sound-dai-cells = <0>;
+               reg = <0x1a>;
+       };
+};
+
 /*
  * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
  * SW1 should be at position 2->3 so that SER0_CTS# line is activated