TARGET_BUILTIN(__builtin_wasm_store32_lane, "vi*V4iIi", "n", "simd128")
TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
+TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
+
#undef BUILTIN
#undef TARGET_BUILTIN
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
return Builder.CreateCall(Callee, {Vec});
}
+ case WebAssembly::BI__builtin_wasm_eq_i64x2: {
+ Value *LHS = EmitScalarExpr(E->getArg(0));
+ Value *RHS = EmitScalarExpr(E->getArg(1));
+ Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_eq);
+ return Builder.CreateCall(Callee, {LHS, RHS});
+ }
case WebAssembly::BI__builtin_wasm_any_true_i8x16:
case WebAssembly::BI__builtin_wasm_any_true_i16x8:
case WebAssembly::BI__builtin_wasm_any_true_i32x4:
// WEBASSEMBLY-NEXT: ret
}
+i64x2 eq_i64x2(i64x2 x, i64x2 y) {
+ return __builtin_wasm_eq_i64x2(x, y);
+ // WEBASSEMBLY: call <2 x i64> @llvm.wasm.eq(<2 x i64> %x, <2 x i64> %y)
+ // WEBASSEMBLY-NEXT: ret
+}
+
int any_true_i8x16(i8x16 x) {
return __builtin_wasm_any_true_i8x16(x);
// WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
[IntrNoMem, IntrSpeculatable]>;
+// TODO: Remove this intrinsic and the associated builtin if i64x2.eq gets
+// merged to the proposal.
+def int_wasm_eq :
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem, IntrSpeculatable]>;
+
//===----------------------------------------------------------------------===//
// Thread-local storage intrinsics
//===----------------------------------------------------------------------===//
def : Pat<(v2i64 (nodes[0] (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
(v2i64 (nodes[1] (v2f64 V128:$lhs), (v2f64 V128:$rhs)))>;
+// Prototype i64x2.eq
+defm EQ_v2i64 :
+ SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins),
+ [(set (v2i64 V128:$dst),
+ (int_wasm_eq (v2i64 V128:$lhs), (v2i64 V128:$rhs))
+ )],
+ "i64x2.eq\t$dst, $lhs, $rhs", "i64x2.eq", 192>;
+
//===----------------------------------------------------------------------===//
// Bitwise operations
; ==============================================================================
; 2 x i64
; ==============================================================================
+; CHECK-LABEL: eq_v2i64:
+; SIMD128-NEXT: .functype eq_v2i64 (v128, v128) -> (v128){{$}}
+; SIMD128-NEXT: i64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <2 x i64> @llvm.wasm.eq(<2 x i64>, <2 x i64>)
+define <2 x i64> @eq_v2i64(<2 x i64> %x, <2 x i64> %y) {
+ %a = call <2 x i64> @llvm.wasm.eq(<2 x i64> %x, <2 x i64> %y)
+ ret <2 x i64> %a
+}
+
; CHECK-LABEL: widen_low_s_v2i64:
; SIMD128-NEXT: .functype widen_low_s_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.widen_low_i32x4_s $push[[R:[0-9]+]]=, $0{{$}}
# CHECK: i32x4.dot_i16x8_s # encoding: [0xfd,0xba,0x01]
i32x4.dot_i16x8_s
+ # CHECK: i64x2.eq # encoding: [0xfd,0xc0,0x01]
+ i64x2.eq
+
# CHECK: i64x2.neg # encoding: [0xfd,0xc1,0x01]
i64x2.neg