Convert CONFIG_SYS_FSL_ERRATUM_A010315 to Kconfig option
authorYork Sun <york.sun@nxp.com>
Mon, 26 Sep 2016 15:09:27 +0000 (08:09 -0700)
committerYork Sun <york.sun@nxp.com>
Mon, 26 Sep 2016 15:53:07 +0000 (08:53 -0700)
Move this option to Kconfig and clean up existing uses.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
arch/arm/Kconfig
arch/arm/cpu/armv7/ls102xa/Kconfig [new file with mode: 0644]
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/include/asm/arch-fsl-layerscape/config.h
arch/arm/include/asm/arch-ls102xa/config.h

index c974db4..1bc45ed 100644 (file)
@@ -820,16 +820,19 @@ config TARGET_LS1021AQDS
        bool "Support ls1021aqds"
        select CPU_V7
        select SUPPORT_SPL
+       select ARCH_LS1021A
        select ARCH_SUPPORT_PSCI
 
 config TARGET_LS1021ATWR
        bool "Support ls1021atwr"
        select CPU_V7
        select SUPPORT_SPL
+       select ARCH_LS1021A
        select ARCH_SUPPORT_PSCI
 
 config TARGET_LS1043AQDS
        bool "Support ls1043aqds"
+       select ARCH_LS1043A
        select ARM64
        select ARMV8_MULTIENTRY
        select SUPPORT_SPL
@@ -838,6 +841,7 @@ config TARGET_LS1043AQDS
 
 config TARGET_LS1043ARDB
        bool "Support ls1043ardb"
+       select ARCH_LS1043A
        select ARM64
        select ARMV8_MULTIENTRY
        select SUPPORT_SPL
@@ -948,6 +952,8 @@ source "arch/arm/mach-kirkwood/Kconfig"
 
 source "arch/arm/mach-mvebu/Kconfig"
 
+source "arch/arm/cpu/armv7/ls102xa/Kconfig"
+
 source "arch/arm/cpu/armv7/mx7/Kconfig"
 
 source "arch/arm/cpu/armv7/mx6/Kconfig"
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
new file mode 100644 (file)
index 0000000..e88a05e
--- /dev/null
@@ -0,0 +1,3 @@
+config ARCH_LS1021A
+       bool "Freescale Layerscape LS1021A SoC"
+       select SYS_FSL_ERRATUM_A010315
index a823d39..f8057ba 100644 (file)
@@ -1,9 +1,17 @@
 config ARCH_LS1012A
        bool "Freescale Layerscape LS1012A SoC"
        select SYS_FSL_MMDC
+       select SYS_FSL_ERRATUM_A010315
+
+config ARCH_LS1043A
+       bool "Freescale Layerscape LS1043A SoC"
+       select SYS_FSL_ERRATUM_A010315
 
 config ARCH_LS1046A
        bool "Freescale Layerscape LS1046A SoC"
 
 config SYS_FSL_MMDC
        bool "Freescale Multi Mode DDR Controller"
+
+config SYS_FSL_ERRATUM_A010315
+       bool "Workaround for PCIe erratum A010315"
index a7fda18..a5c6c4c 100644 (file)
 
 #define CONFIG_SYS_FSL_SRDS_1
 
-#define CONFIG_SYS_FSL_ERRATUM_A010315
 /* SoC related */
 #ifdef CONFIG_LS1043A
 #define CONFIG_MAX_CPUS                                4
index f2ce793..46de784 100644 (file)
 #define CONFIG_SYS_FSL_ERRATUM_A008378
 #define CONFIG_SYS_FSL_ERRATUM_A009663
 #define CONFIG_SYS_FSL_ERRATUM_A009942
-#define CONFIG_SYS_FSL_ERRATUM_A010315
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 #else
 #error SoC not defined