mt76: mt7915: add debugfs knob for RF registers read/write
authorShayne Chen <shayne.chen@mediatek.com>
Mon, 18 Apr 2022 08:03:30 +0000 (16:03 +0800)
committerFelix Fietkau <nbd@nbd.name>
Fri, 13 May 2022 07:39:35 +0000 (09:39 +0200)
Add RF registers read/write support for debugging RF issues, which
should be processed by mcu commands.
The index of rf registers use the generic regidx, and are combined
with two parts: WF selection [31:28] and offset [27:0].

Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Peter Chiu <chui-hao.chiu@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c
drivers/net/wireless/mediatek/mt76/mt7915/mcu.c
drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h

index e0b7f1e..1628840 100644 (file)
@@ -867,6 +867,36 @@ mt7915_twt_stats(struct seq_file *s, void *data)
        return 0;
 }
 
+/* The index of RF registers use the generic regidx, combined with two parts:
+ * WF selection [31:28] and offset [27:0].
+ */
+static int
+mt7915_rf_regval_get(void *data, u64 *val)
+{
+       struct mt7915_dev *dev = data;
+       u32 regval;
+       int ret;
+
+       ret = mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, &regval, false);
+       if (ret)
+               return ret;
+
+       *val = le32_to_cpu(regval);
+
+       return 0;
+}
+
+static int
+mt7915_rf_regval_set(void *data, u64 val)
+{
+       struct mt7915_dev *dev = data;
+
+       return mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, (u32 *)&val, true);
+}
+
+DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7915_rf_regval_get,
+                        mt7915_rf_regval_set, "0x%08llx\n");
+
 int mt7915_init_debugfs(struct mt7915_phy *phy)
 {
        struct mt7915_dev *dev = phy->dev;
@@ -898,6 +928,8 @@ int mt7915_init_debugfs(struct mt7915_phy *phy)
        debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir,
                                    mt7915_twt_stats);
        debugfs_create_file("ser_trigger", 0200, dir, dev, &fops_ser_trigger);
+       debugfs_create_file("rf_regval", 0600, dir, dev, &fops_rf_regval);
+
        if (!dev->dbdc_support || phy->band_idx) {
                debugfs_create_u32("dfs_hw_pattern", 0400, dir,
                                   &dev->hw_pattern);
index 98a3b22..4faa7b8 100644 (file)
@@ -3661,3 +3661,32 @@ int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
        return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),
                                 &req, sizeof(req), true);
 }
+
+int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)
+{
+       struct {
+               __le32 idx;
+               __le32 ofs;
+               __le32 data;
+       } __packed req = {
+               .idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 28))),
+               .ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(27, 0))),
+               .data = set ? cpu_to_le32(*val) : 0,
+       };
+       struct sk_buff *skb;
+       int ret;
+
+       if (set)
+               return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),
+                                        &req, sizeof(req), false);
+
+       ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),
+                                       &req, sizeof(req), true, &skb);
+       if (ret)
+               return ret;
+
+       *val = le32_to_cpu(*(__le32 *)(skb->data + 8));
+       dev_kfree_skb(skb);
+
+       return 0;
+}
index 419ff08..6c590ef 100644 (file)
@@ -506,6 +506,7 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
                           struct ieee80211_sta *sta, struct rate_info *rate);
 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
                                     struct cfg80211_chan_def *chandef);
+int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);