media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
authorEmil Velikov <emil.velikov@collabora.com>
Thu, 1 Apr 2021 14:43:28 +0000 (16:43 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Wed, 19 May 2021 07:51:39 +0000 (09:51 +0200)
Use the register directly over the existing SWREG().

Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c

index 6386a39..0fd3068 100644 (file)
@@ -10,6 +10,7 @@
 #include <media/v4l2-mem2mem.h>
 #include "hantro.h"
 #include "hantro_hw.h"
+#include "hantro_g1_regs.h"
 
 #define G1_SWREG(nr)                   ((nr) * 4)
 
@@ -20,7 +21,6 @@
 #define G1_REG_REFER2_BASE             G1_SWREG(16)
 #define G1_REG_REFER3_BASE             G1_SWREG(17)
 #define G1_REG_QTABLE_BASE             G1_SWREG(40)
-#define G1_REG_DEC_E(v)                        ((v) ? BIT(0) : 0)
 
 #define G1_REG_DEC_AXI_RD_ID(v)                (((v) << 24) & GENMASK(31, 24))
 #define G1_REG_DEC_TIMEOUT_E(v)                ((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
 
        hantro_end_prepare_run(ctx);
 
-       reg = G1_REG_DEC_E(1);
-       vdpu_write(vpu, reg, G1_SWREG(1));
+       vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }