ARM i.MX6q: Link system reset controller (SRC) to IPU in DT
authorPhilipp Zabel <p.zabel@pengutronix.de>
Thu, 28 Mar 2013 16:35:20 +0000 (17:35 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Tue, 9 Apr 2013 14:52:57 +0000 (22:52 +0800)
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6q.dtsi
arch/arm/boot/dts/imx6qdl.dtsi

index 83bc61c..21e6758 100644 (file)
                        interrupts = <0 8 0x4 0 7 0x4>;
                        clocks = <&clks 133>, <&clks 134>, <&clks 137>;
                        clock-names = "bus", "di0", "di1";
+                       resets = <&src 4>;
                };
        };
 };
index 804c0ec..8b6dfd1 100644 (file)
                                compatible = "fsl,imx6q-src";
                                reg = <0x020d8000 0x4000>;
                                interrupts = <0 91 0x04 0 96 0x04>;
+                               #reset-cells = <1>;
                        };
 
                        gpc: gpc@020dc000 {
                        interrupts = <0 6 0x4 0 5 0x4>;
                        clocks = <&clks 130>, <&clks 131>, <&clks 132>;
                        clock-names = "bus", "di0", "di1";
+                       resets = <&src 2>;
                };
        };
 };