Remove instances of phy_read/write

There were a few files which were already using phy_read and phy_write
for their PHY function names.  It's only a few places, and the name
seems most appropriate for the high-level abstraction, so let's
rename the other versions to something more specific.

Also, uec_phy.c had a marvell_init function which I renamed to not
conflict with the one in marvell.c

Lastly, uec_phy.c was putting a space between the phy writing
function names, and the open paren, so I fixed that

Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>

diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 709f67a..b5c5573 100644 (file)
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -110,8 +110,8 @@ static board_info_t dm9000_info;
 
 /* function declaration ------------------------------------- */
 static int dm9000_probe(void);
-static u16 phy_read(int);
-static void phy_write(int, u16);
+static u16 dm9000_phy_read(int);
+static void dm9000_phy_write(int, u16);
 static u8 DM9000_ior(int);
 static void DM9000_iow(int reg, u8 value);
 
@@ -361,7 +361,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
        DM9000_iow(DM9000_IMR, IMR_PAR);
 
        i = 0;
-       while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
+       while (!(dm9000_phy_read(1) & 0x20)) {  /* autonegation complete bit */
                udelay(1000);
                i++;
                if (i == 10000) {
@@ -371,7 +371,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
        }
 
        /* see what we've got */
-       lnk = phy_read(17) >> 12;
+       lnk = dm9000_phy_read(17) >> 12;
        printf("operating at ");
        switch (lnk) {
        case 1:
@@ -445,7 +445,7 @@ static void dm9000_halt(struct eth_device *netdev)
        DM9000_DBG("%s\n", __func__);
 
        /* RESET devie */
-       phy_write(0, 0x8000);   /* PHY RESET */
+       dm9000_phy_write(0, 0x8000);    /* PHY RESET */
        DM9000_iow(DM9000_GPR, 0x01);   /* Power-Down PHY */
        DM9000_iow(DM9000_IMR, 0x80);   /* Disable all interrupt */
        DM9000_iow(DM9000_RCR, 0x00);   /* Disable RX */
@@ -581,7 +581,7 @@ DM9000_iow(int reg, u8 value)
    Read a word from phyxcer
 */
 static u16
-phy_read(int reg)
+dm9000_phy_read(int reg)
 {
        u16 val;
 
@@ -593,7 +593,7 @@ phy_read(int reg)
        val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);
 
        /* The read data keeps on REG_0D & REG_0E */
-       DM9000_DBG("phy_read(0x%x): 0x%x\n", reg, val);
+       DM9000_DBG("dm9000_phy_read(0x%x): 0x%x\n", reg, val);
        return val;
 }
 
@@ -601,7 +601,7 @@ phy_read(int reg)
    Write a word to phyxcer
 */
 static void
-phy_write(int reg, u16 value)
+dm9000_phy_write(int reg, u16 value)
 {
 
        /* Fill the phyxcer register into REG_0C */
@@ -613,7 +613,7 @@ phy_write(int reg, u16 value)
        DM9000_iow(DM9000_EPCR, 0xa);   /* Issue phyxcer write command */
        udelay(500);                    /* Wait write complete */
        DM9000_iow(DM9000_EPCR, 0x0);   /* Clear phyxcer write command */
-       DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value);
+       DM9000_DBG("dm9000_phy_write(reg:0x%x, value:0x%x)\n", reg, value);
 }
 
 int dm9000_initialize(bd_t *bis)

diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 6c161b6..d55cacd 100644 (file)
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -314,7 +314,7 @@ static void enc_release_bus(enc_dev_t *enc)
 /*
  * Read PHY register
  */
-static u16 phy_read(enc_dev_t *enc, const u8 addr)
+static u16 enc_phy_read(enc_dev_t *enc, const u8 addr)
 {
        uint64_t etime;
        u8 status;
@@ -339,7 +339,7 @@ static u16 phy_read(enc_dev_t *enc, const u8 addr)
 /*
  * Write PHY register
  */
-static void phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
+static void enc_phy_write(enc_dev_t *enc, const u8 addr, const u16 data)
 {
        uint64_t etime;
        u8 status;
@@ -374,7 +374,7 @@ static int enc_phy_link_wait(enc_dev_t *enc)
 
 #ifdef CONFIG_ENC_SILENTLINK
        /* check if we have a link, then just return */
-       status = phy_read(enc, PHY_REG_PHSTAT1);
+       status = enc_phy_read(enc, PHY_REG_PHSTAT1);
        if (status & ENC_PHSTAT1_LLSTAT)
                return 0;
 #endif
@@ -382,10 +382,10 @@ static int enc_phy_link_wait(enc_dev_t *enc)
        /* wait for link with 1 second timeout */
        etime = get_ticks() + get_tbclk();
        while (get_ticks() <= etime) {
-               status = phy_read(enc, PHY_REG_PHSTAT1);
+               status = enc_phy_read(enc, PHY_REG_PHSTAT1);
                if (status & ENC_PHSTAT1_LLSTAT) {
                        /* now we have a link */
-                       status = phy_read(enc, PHY_REG_PHSTAT2);
+                       status = enc_phy_read(enc, PHY_REG_PHSTAT2);
                        duplex = (status & ENC_PHSTAT2_DPXSTAT) ? 1 : 0;
                        printf("%s: link up, 10Mbps %s-duplex\n",
                                enc->dev->name, duplex ? "full" : "half");
@@ -678,8 +678,8 @@ static int enc_setup(enc_dev_t *enc)
        enc->bank = 0xff;       /* invalidate current bank in enc28j60 */
 
        /* verify PHY identification */
-       phid1 = phy_read(enc, PHY_REG_PHID1);
-       phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
+       phid1 = enc_phy_read(enc, PHY_REG_PHID1);
+       phid2 = enc_phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
        if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) {
                printf("%s: failed to identify PHY. Found %04x:%04x\n",
                        enc->dev->name, phid1, phid2);
@@ -694,7 +694,7 @@ static int enc_setup(enc_dev_t *enc)
         * Prevent automatic loopback of data beeing transmitted by setting
         * ENC_PHCON2_HDLDIS
         */
-       phy_write(enc, PHY_REG_PHCON2, (1<<8));
+       enc_phy_write(enc, PHY_REG_PHCON2, (1<<8));
 
        /*
         * LEDs configuration
@@ -702,10 +702,10 @@ static int enc_setup(enc_dev_t *enc)
         * LEDB: LBCFG = 0111 -> display TX & RX activity
         * STRCH = 1 -> LED pulses
         */
-       phy_write(enc, PHY_REG_PHLCON, 0x0472);
+       enc_phy_write(enc, PHY_REG_PHLCON, 0x0472);
 
        /* Reset PDPXMD-bit => half duplex */
-       phy_write(enc, PHY_REG_PHCON1, 0);
+       enc_phy_write(enc, PHY_REG_PHCON1, 0);
 
 #ifdef CONFIG_USE_IRQ
        /* enable interrupts */
@@ -771,7 +771,7 @@ int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
                enc_release_bus(enc);
                return -1;
        }
-       *value = phy_read(enc, reg);
+       *value = enc_phy_read(enc, reg);
        enc_release_bus(enc);
        return 0;
 }
@@ -796,7 +796,7 @@ int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
                enc_release_bus(enc);
                return -1;
        }
-       phy_write(enc, reg, value);
+       enc_phy_write(enc, reg, value);
        enc_release_bus(enc);
        return 0;
 }

diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c
index a4624e1..5933bdd 100644 (file)
--- a/drivers/net/uli526x.c
+++ b/drivers/net/uli526x.c
@@ -175,9 +175,9 @@ static u16 read_srom_word(long, int);
 static void uli526x_descriptor_init(struct uli526x_board_info *, unsigned long);
 static void allocate_rx_buffer(struct uli526x_board_info *);
 static void update_cr6(u32, unsigned long);
-static u16 phy_read(unsigned long, u8, u8, u32);
+static u16 uli_phy_read(unsigned long, u8, u8, u32);
 static u16 phy_readby_cr10(unsigned long, u8, u8);
-static void phy_write(unsigned long, u8, u8, u16, u32);
+static void uli_phy_write(unsigned long, u8, u8, u16, u32);
 static void phy_writeby_cr10(unsigned long, u8, u8, u16);
 static void phy_write_1bit(unsigned long, u32, u32);
 static u16 phy_read_1bit(unsigned long, u32);
@@ -349,7 +349,7 @@ static void uli526x_disable(struct eth_device *dev)
                /* Reset & stop ULI526X board */
                outl(ULI526X_RESET, db->ioaddr + DCR0);
                udelay(5);
-               phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);
+               uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);
 
                /* reset the board */
                db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */
@@ -385,7 +385,7 @@ static void uli526x_init(struct eth_device *dev)
        db->tx_packet_cnt = 0;
        for (phy_tmp = 0; phy_tmp < 32; phy_tmp++) {
                /* peer add */
-               phy_value = phy_read(db->ioaddr, phy_tmp, 3, db->chip_id);
+               phy_value = uli_phy_read(db->ioaddr, phy_tmp, 3, db->chip_id);
                if (phy_value != 0xffff && phy_value != 0) {
                        db->phy_addr = phy_tmp;
                        break;
@@ -404,10 +404,10 @@ static void uli526x_init(struct eth_device *dev)
 
        if (!(inl(db->ioaddr + DCR12) & 0x8)) {
                /* Phyxcer capability setting */
-               phy_reg_reset = phy_read(db->ioaddr,
+               phy_reg_reset = uli_phy_read(db->ioaddr,
                        db->phy_addr, 0, db->chip_id);
                phy_reg_reset = (phy_reg_reset | 0x8000);
-               phy_write(db->ioaddr, db->phy_addr, 0,
+               uli_phy_write(db->ioaddr, db->phy_addr, 0,
                        phy_reg_reset, db->chip_id);
                udelay(500);
 
@@ -781,7 +781,8 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)
        u16 phy_reg;
 
        /* Phyxcer capability setting */
-       phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0;
+       phy_reg = uli_phy_read(db->ioaddr,
+                       db->phy_addr, 4, db->chip_id) & ~0x01e0;
 
        if (db->media_mode & ULI526X_AUTO) {
                /* AUTO Mode */
@@ -802,10 +803,10 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)
                phy_reg |= db->PHY_reg4;
                db->media_mode |= ULI526X_AUTO;
        }
-       phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id);
+       uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id);
 
        /* Restart Auto-Negotiation */
-       phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id);
+       uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id);
        udelay(50);
 }
 
@@ -813,7 +814,7 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)
  *     Write a word to Phy register
  */
 
-static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
+static void uli_phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
        u16 phy_data, u32 chip_id)
 {
        u16 i;
@@ -862,7 +863,8 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
  *     Read a word data from phy register
  */
 
-static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)
+static u16 uli_phy_read(unsigned long iobase, u8 phy_addr, u8 offset,
+                       u32 chip_id)
 {
        int i;
        u16 phy_data;

diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 811e3fc..cd80f83 100644 (file)
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -67,9 +67,6 @@ static uec_info_t uec_info[] = {
 
 static struct eth_device *devlist[MAXCONTROLLERS];
 
-u16 phy_read (struct uec_mii_info *mii_info, u16 regnum);
-void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val);
-
 static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)
 {
        uec_t           *uec_regs;

diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 55c2622..c83ca4b 100644 (file)
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -121,8 +121,8 @@ static int gbit_config_aneg (struct uec_mii_info *mii_info);
 static int genmii_config_aneg (struct uec_mii_info *mii_info);
 static int genmii_update_link (struct uec_mii_info *mii_info);
 static int genmii_read_status (struct uec_mii_info *mii_info);
-u16 phy_read (struct uec_mii_info *mii_info, u16 regnum);
-void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val);
+u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum);
+void uec_phy_write(struct uec_mii_info *mii_info, u16 regnum, u16 val);
 
 /* Write value to the PHY for this device to the register at regnum, */
 /* waiting until the write is done before it returns.  All PHY */
@@ -242,7 +242,7 @@ static void config_genmii_advert (struct uec_mii_info *mii_info)
        advertise = mii_info->advertising;
 
        /* Setup standard advertisement */
-       adv = phy_read (mii_info, MII_ADVERTISE);
+       adv = uec_phy_read(mii_info, MII_ADVERTISE);
        adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
        if (advertise & ADVERTISED_10baseT_Half)
                adv |= ADVERTISE_10HALF;
@@ -252,7 +252,7 @@ static void config_genmii_advert (struct uec_mii_info *mii_info)
                adv |= ADVERTISE_100HALF;
        if (advertise & ADVERTISED_100baseT_Full)
                adv |= ADVERTISE_100FULL;
-       phy_write (mii_info, MII_ADVERTISE, adv);
+       uec_phy_write(mii_info, MII_ADVERTISE, adv);
 }
 
 static void genmii_setup_forced (struct uec_mii_info *mii_info)
@@ -260,7 +260,7 @@ static void genmii_setup_forced (struct uec_mii_info *mii_info)
        u16 ctrl;
        u32 features = mii_info->phyinfo->features;
 
-       ctrl = phy_read (mii_info, MII_BMCR);
+       ctrl = uec_phy_read(mii_info, MII_BMCR);
 
        ctrl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 |
                  BMCR_SPEED1000 | BMCR_ANENABLE);
@@ -290,7 +290,7 @@ static void genmii_setup_forced (struct uec_mii_info *mii_info)
                break;
        }
 
-       phy_write (mii_info, MII_BMCR, ctrl);
+       uec_phy_write(mii_info, MII_BMCR, ctrl);
 }
 
 /* Enable and Restart Autonegotiation */
@@ -298,9 +298,9 @@ static void genmii_restart_aneg (struct uec_mii_info *mii_info)
 {
        u16 ctl;
 
-       ctl = phy_read (mii_info, MII_BMCR);
+       ctl = uec_phy_read(mii_info, MII_BMCR);
        ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
-       phy_write (mii_info, MII_BMCR, ctl);
+       uec_phy_write(mii_info, MII_BMCR, ctl);
 }
 
 static int gbit_config_aneg (struct uec_mii_info *mii_info)
@@ -313,14 +313,14 @@ static int gbit_config_aneg (struct uec_mii_info *mii_info)
                config_genmii_advert (mii_info);
                advertise = mii_info->advertising;
 
-               adv = phy_read (mii_info, MII_CTRL1000);
+               adv = uec_phy_read(mii_info, MII_CTRL1000);
                adv &= ~(ADVERTISE_1000FULL |
                         ADVERTISE_1000HALF);
                if (advertise & SUPPORTED_1000baseT_Half)
                        adv |= ADVERTISE_1000HALF;
                if (advertise & SUPPORTED_1000baseT_Full)
                        adv |= ADVERTISE_1000FULL;
-               phy_write (mii_info, MII_CTRL1000, adv);
+               uec_phy_write(mii_info, MII_CTRL1000, adv);
 
                /* Start/Restart aneg */
                genmii_restart_aneg (mii_info);
@@ -335,13 +335,13 @@ static int marvell_config_aneg (struct uec_mii_info *mii_info)
        /* The Marvell PHY has an errata which requires
         * that certain registers get written in order
         * to restart autonegotiation */
-       phy_write (mii_info, MII_BMCR, BMCR_RESET);
+       uec_phy_write(mii_info, MII_BMCR, BMCR_RESET);
 
-       phy_write (mii_info, 0x1d, 0x1f);
-       phy_write (mii_info, 0x1e, 0x200c);
-       phy_write (mii_info, 0x1d, 0x5);
-       phy_write (mii_info, 0x1e, 0);
-       phy_write (mii_info, 0x1e, 0x100);
+       uec_phy_write(mii_info, 0x1d, 0x1f);
+       uec_phy_write(mii_info, 0x1e, 0x200c);
+       uec_phy_write(mii_info, 0x1d, 0x5);
+       uec_phy_write(mii_info, 0x1e, 0);
+       uec_phy_write(mii_info, 0x1e, 0x100);
 
        gbit_config_aneg (mii_info);
 
@@ -373,13 +373,13 @@ static int genmii_update_link (struct uec_mii_info *mii_info)
        u16 status;
 
        /* Status is read once to clear old link state */
-       phy_read (mii_info, MII_BMSR);
+       uec_phy_read(mii_info, MII_BMSR);
 
        /*
         * Wait if the link is up, and autonegotiation is in progress
         * (ie - we're capable and it's not done)
         */
-       status = phy_read(mii_info, MII_BMSR);
+       status = uec_phy_read(mii_info, MII_BMSR);
        if ((status & BMSR_LSTATUS) && (status & BMSR_ANEGCAPABLE)
            && !(status & BMSR_ANEGCOMPLETE)) {
                int i = 0;
@@ -395,7 +395,7 @@ static int genmii_update_link (struct uec_mii_info *mii_info)
 
                        i++;
                        udelay(1000);   /* 1 ms */
-                       status = phy_read(mii_info, MII_BMSR);
+                       status = uec_phy_read(mii_info, MII_BMSR);
                }
                mii_info->link = 1;
        } else {
@@ -420,7 +420,7 @@ static int genmii_read_status (struct uec_mii_info *mii_info)
                return err;
 
        if (mii_info->autoneg) {
-               status = phy_read(mii_info, MII_STAT1000);
+               status = uec_phy_read(mii_info, MII_STAT1000);
 
                if (status & (LPA_1000FULL | LPA_1000HALF)) {
                        mii_info->speed = SPEED_1000;
@@ -429,7 +429,7 @@ static int genmii_read_status (struct uec_mii_info *mii_info)
                        else
                                mii_info->duplex = DUPLEX_HALF;
                } else {
-                       status = phy_read(mii_info, MII_LPA);
+                       status = uec_phy_read(mii_info, MII_LPA);
 
                        if (status & (LPA_10FULL | LPA_100FULL))
                                mii_info->duplex = DUPLEX_FULL;
@@ -463,25 +463,25 @@ static int bcm_init(struct uec_mii_info *mii_info)
 
                /* Wait for aneg to complete. */
                do
-                       val = phy_read(mii_info, MII_BMSR);
+                       val = uec_phy_read(mii_info, MII_BMSR);
                while (--cnt && !(val & BMSR_ANEGCOMPLETE));
 
                /* Set RDX clk delay. */
-               phy_write(mii_info, 0x18, 0x7 | (7 << 12));
+               uec_phy_write(mii_info, 0x18, 0x7 | (7 << 12));
 
-               val = phy_read(mii_info, 0x18);
+               val = uec_phy_read(mii_info, 0x18);
                /* Set RDX-RXC skew. */
                val |= (1 << 8);
                val |= (7 | (7 << 12));
                /* Write bits 14:0. */
                val |= (1 << 15);
-               phy_write(mii_info, 0x18, val);
+               uec_phy_write(mii_info, 0x18, val);
        }
 
         return 0;
 }
 
-static int marvell_init(struct uec_mii_info *mii_info)
+static int uec_marvell_init(struct uec_mii_info *mii_info)
 {
        struct eth_device *edev = mii_info->dev;
        uec_private_t *uec = edev->priv;
@@ -494,7 +494,7 @@ static int marvell_init(struct uec_mii_info *mii_info)
            iface == RGMII_TXID)) {
                int temp;
 
-               temp = phy_read(mii_info, MII_M1111_PHY_EXT_CR);
+               temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_CR);
                if (iface == RGMII_ID) {
                        temp |= MII_M1111_RX_DELAY | MII_M1111_TX_DELAY;
                } else if (iface == RGMII_RXID) {
@@ -504,14 +504,14 @@ static int marvell_init(struct uec_mii_info *mii_info)
                        temp &= ~MII_M1111_RX_DELAY;
                        temp |= MII_M1111_TX_DELAY;
                }
-               phy_write(mii_info, MII_M1111_PHY_EXT_CR, temp);
+               uec_phy_write(mii_info, MII_M1111_PHY_EXT_CR, temp);
 
-               temp = phy_read(mii_info, MII_M1111_PHY_EXT_SR);
+               temp = uec_phy_read(mii_info, MII_M1111_PHY_EXT_SR);
                temp &= ~MII_M1111_HWCFG_MODE_MASK;
                temp |= MII_M1111_HWCFG_MODE_RGMII;
-               phy_write(mii_info, MII_M1111_PHY_EXT_SR, temp);
+               uec_phy_write(mii_info, MII_M1111_PHY_EXT_SR, temp);
 
-               phy_write(mii_info, MII_BMCR, BMCR_RESET);
+               uec_phy_write(mii_info, MII_BMCR, BMCR_RESET);
        }
 
        return 0;
@@ -534,7 +534,7 @@ static int marvell_read_status (struct uec_mii_info *mii_info)
        if (mii_info->autoneg && mii_info->link) {
                int speed;
 
-               status = phy_read (mii_info, MII_M1011_PHY_SPEC_STATUS);
+               status = uec_phy_read(mii_info, MII_M1011_PHY_SPEC_STATUS);
 
                /* Get the duplexity */
                if (status & MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX)
@@ -564,7 +564,7 @@ static int marvell_read_status (struct uec_mii_info *mii_info)
 static int marvell_ack_interrupt (struct uec_mii_info *mii_info)
 {
        /* Clear the interrupts by reading the reg */
-       phy_read (mii_info, MII_M1011_IEVENT);
+       uec_phy_read(mii_info, MII_M1011_IEVENT);
 
        return 0;
 }
@@ -572,9 +572,10 @@ static int marvell_ack_interrupt (struct uec_mii_info *mii_info)
 static int marvell_config_intr (struct uec_mii_info *mii_info)
 {
        if (mii_info->interrupts == MII_INTERRUPT_ENABLED)
-               phy_write (mii_info, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
+               uec_phy_write(mii_info, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
        else
-               phy_write (mii_info, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
+               uec_phy_write(mii_info, MII_M1011_IMASK,
+                               MII_M1011_IMASK_CLEAR);
 
        return 0;
 }
@@ -582,13 +583,13 @@ static int marvell_config_intr (struct uec_mii_info *mii_info)
 static int dm9161_init (struct uec_mii_info *mii_info)
 {
        /* Reset the PHY */
-       phy_write (mii_info, MII_BMCR, phy_read (mii_info, MII_BMCR) |
+       uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) |
                   BMCR_RESET);
        /* PHY and MAC connect */
-       phy_write (mii_info, MII_BMCR, phy_read (mii_info, MII_BMCR) &
+       uec_phy_write(mii_info, MII_BMCR, uec_phy_read(mii_info, MII_BMCR) &
                   ~BMCR_ISOLATE);
 
-       phy_write (mii_info, MII_DM9161_SCR, MII_DM9161_SCR_INIT);
+       uec_phy_write(mii_info, MII_DM9161_SCR, MII_DM9161_SCR_INIT);
 
        config_genmii_advert (mii_info);
        /* Start/restart aneg */
@@ -614,7 +615,7 @@ static int dm9161_read_status (struct uec_mii_info *mii_info)
        /* If the link is up, read the speed and duplex
           If we aren't autonegotiating assume speeds are as set */
        if (mii_info->autoneg && mii_info->link) {
-               status = phy_read (mii_info, MII_DM9161_SCSR);
+               status = uec_phy_read(mii_info, MII_DM9161_SCSR);
                if (status & (MII_DM9161_SCSR_100F | MII_DM9161_SCSR_100H))
                        mii_info->speed = SPEED_100;
                else
@@ -632,7 +633,7 @@ static int dm9161_read_status (struct uec_mii_info *mii_info)
 static int dm9161_ack_interrupt (struct uec_mii_info *mii_info)
 {
        /* Clear the interrupt by reading the reg */
-       phy_read (mii_info, MII_DM9161_INTR);
+       uec_phy_read(mii_info, MII_DM9161_INTR);
 
        return 0;
 }
@@ -640,9 +641,9 @@ static int dm9161_ack_interrupt (struct uec_mii_info *mii_info)
 static int dm9161_config_intr (struct uec_mii_info *mii_info)
 {
        if (mii_info->interrupts == MII_INTERRUPT_ENABLED)
-               phy_write (mii_info, MII_DM9161_INTR, MII_DM9161_INTR_INIT);
+               uec_phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_INIT);
        else
-               phy_write (mii_info, MII_DM9161_INTR, MII_DM9161_INTR_STOP);
+               uec_phy_write(mii_info, MII_DM9161_INTR, MII_DM9161_INTR_STOP);
 
        return 0;
 }
@@ -696,7 +697,7 @@ static int smsc_read_status (struct uec_mii_info *mii_info)
        if (mii_info->autoneg && mii_info->link) {
                int     val;
 
-               status = phy_read (mii_info, 0x1f);
+               status = uec_phy_read(mii_info, 0x1f);
                val = (status & 0x1c) >> 2;
 
                switch (val) {
@@ -751,7 +752,7 @@ static struct phy_info phy_info_marvell = {
        .phy_id_mask = 0xffffff00,
        .name = "Marvell 88E11x1",
        .features = MII_GBIT_FEATURES,
-       .init = &marvell_init,
+       .init = &uec_marvell_init,
        .config_aneg = &marvell_config_aneg,
        .read_status = &marvell_read_status,
        .ack_interrupt = &marvell_ack_interrupt,
@@ -804,12 +805,12 @@ static struct phy_info *phy_info[] = {
        NULL
 };
 
-u16 phy_read (struct uec_mii_info *mii_info, u16 regnum)
+u16 uec_phy_read(struct uec_mii_info *mii_info, u16 regnum)
 {
        return mii_info->mdio_read (mii_info->dev, mii_info->mii_id, regnum);
 }
 
-void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val)
+void uec_phy_write(struct uec_mii_info *mii_info, u16 regnum, u16 val)
 {
        mii_info->mdio_write (mii_info->dev, mii_info->mii_id, regnum, val);
 }
@@ -825,11 +826,11 @@ struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info)
        struct phy_info *theInfo = NULL;
 
        /* Grab the bits from PHYIR1, and put them in the upper half */
-       phy_reg = phy_read (mii_info, MII_PHYSID1);
+       phy_reg = uec_phy_read(mii_info, MII_PHYSID1);
        phy_ID = (phy_reg & 0xffff) << 16;
 
        /* Grab the bits from PHYIR2, and put them in the lower half */
-       phy_reg = phy_read (mii_info, MII_PHYSID2);
+       phy_reg = uec_phy_read(mii_info, MII_PHYSID2);
        phy_ID |= (phy_reg & 0xffff);
 
        /* loop through all the known PHY types, and find one that */
@@ -869,39 +870,39 @@ void marvell_phy_interface_mode (struct eth_device *dev,
 
        if (type == RGMII) {
                if (speed == 100) {
-                       phy_write (mii_info, 0x00, 0x9140);
-                       phy_write (mii_info, 0x1d, 0x001f);
-                       phy_write (mii_info, 0x1e, 0x200c);
-                       phy_write (mii_info, 0x1d, 0x0005);
-                       phy_write (mii_info, 0x1e, 0x0000);
-                       phy_write (mii_info, 0x1e, 0x0100);
-                       phy_write (mii_info, 0x09, 0x0e00);
-                       phy_write (mii_info, 0x04, 0x01e1);
-                       phy_write (mii_info, 0x00, 0x9140);
-                       phy_write (mii_info, 0x00, 0x1000);
+                       uec_phy_write(mii_info, 0x00, 0x9140);
+                       uec_phy_write(mii_info, 0x1d, 0x001f);
+                       uec_phy_write(mii_info, 0x1e, 0x200c);
+                       uec_phy_write(mii_info, 0x1d, 0x0005);
+                       uec_phy_write(mii_info, 0x1e, 0x0000);
+                       uec_phy_write(mii_info, 0x1e, 0x0100);
+                       uec_phy_write(mii_info, 0x09, 0x0e00);
+                       uec_phy_write(mii_info, 0x04, 0x01e1);
+                       uec_phy_write(mii_info, 0x00, 0x9140);
+                       uec_phy_write(mii_info, 0x00, 0x1000);
                        udelay (100000);
-                       phy_write (mii_info, 0x00, 0x2900);
-                       phy_write (mii_info, 0x14, 0x0cd2);
-                       phy_write (mii_info, 0x00, 0xa100);
-                       phy_write (mii_info, 0x09, 0x0000);
-                       phy_write (mii_info, 0x1b, 0x800b);
-                       phy_write (mii_info, 0x04, 0x05e1);
-                       phy_write (mii_info, 0x00, 0xa100);
-                       phy_write (mii_info, 0x00, 0x2100);
+                       uec_phy_write(mii_info, 0x00, 0x2900);
+                       uec_phy_write(mii_info, 0x14, 0x0cd2);
+                       uec_phy_write(mii_info, 0x00, 0xa100);
+                       uec_phy_write(mii_info, 0x09, 0x0000);
+                       uec_phy_write(mii_info, 0x1b, 0x800b);
+                       uec_phy_write(mii_info, 0x04, 0x05e1);
+                       uec_phy_write(mii_info, 0x00, 0xa100);
+                       uec_phy_write(mii_info, 0x00, 0x2100);
                        udelay (1000000);
                } else if (speed == 10) {
-                       phy_write (mii_info, 0x14, 0x8e40);
-                       phy_write (mii_info, 0x1b, 0x800b);
-                       phy_write (mii_info, 0x14, 0x0c82);
-                       phy_write (mii_info, 0x00, 0x8100);
+                       uec_phy_write(mii_info, 0x14, 0x8e40);
+                       uec_phy_write(mii_info, 0x1b, 0x800b);
+                       uec_phy_write(mii_info, 0x14, 0x0c82);
+                       uec_phy_write(mii_info, 0x00, 0x8100);
                        udelay (1000000);
                }
        }
 
        /* handle 88e1111 rev.B2 erratum 5.6 */
        if (mii_info->autoneg) {
-               status = phy_read (mii_info, MII_BMCR);
-               phy_write (mii_info, MII_BMCR, status | BMCR_ANENABLE);
+               status = uec_phy_read(mii_info, MII_BMCR);
+               uec_phy_write(mii_info, MII_BMCR, status | BMCR_ANENABLE);
        }
        /* now the B2 will correctly report autoneg completion status */
 }