a9eb626 dtv_demod: Prevent NULL pointer crash caused by tuner attach failure [1/1]
d27b145 dtv_demod: TL1 dtmb suspend hangup issue [1/1]
27c05dd dtv_demod: tl1,dvbc, new method for fast channel searching [1/1]
fa80091 dtv_demod: txlx atsc-t loses lock when play video for a long time [1/1]
43db0c5 build: fix build err [1/1]
d4abd67 dtv_demod: TXLX ISDB-T can't search channel [1/1]
70f2c39 dtv_demod: TL1 dvbc search time more than 3 min [1/1]
16d4727 dtv_demod: TL1 dtmb cma allocate fail after dtmb->dvbc->dtmb by cmd [1/1]
b5aa9de media_module: h264/mpeg2/h265 [2/2]
3d6a5ed ppmgr: use light reg for video decoder local reset [1/1]
ppmgr: use light reg for video decoder local reset [1/1]
PD#SWPL-5014
Problem:
ppmgr provider error sometimes in long time run under poor signal
Solution:
use light reg for video decoder local reset
Verify:
X301
Change-Id: I1500c9ddfdce76b3e9cb2b24a35cdee765f82d5f
Signed-off-by: Hui Zhang <hui.zhang@amlogic.com>
media_module: h264/mpeg2/h265 [2/2]
PD#SWPL-3654
Problem:
provide aspect_ratio information by AMSTREAM_IOC_VDECSTAT
Solution:
add ration_control information in vdec_status function for
h264/mh264/vh265/mpeg12/mmpeg12, and normalized it for
aspect_ratio in AMSTREAM_IOC_VDECSTAT message.
Verify:
Verified U212
Change-Id: Icd9270eb8f2ce2f6f7455ec28780d26ac6c56348
Signed-off-by: Rong Zhang <rong.zhang@amlogic.com>
dtv_demod: TL1 dtmb cma allocate fail after dtmb->dvbc->dtmb by cmd [1/1]
PD#TV-1748
Problem:
[Hisense-T962X2-P-customer-DTV]:Failed to lock frequency in dtmb system
Solution:
leave the last mode before enter current mode to release the resources
Verify:
verified by t962x2_x301
Change-Id: Ibd7e1d4c67f5a5ad2191e0031fdd0b81812c8606
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
dtv_demod: TL1 dvbc search time more than 3 min [1/1]
PD#SWPL-3555
Problem:
{DVB-C}Hisense needs less than 3 minutes for dvb-c search.(5/5，None)
Solution:
1.use demod internal state machine to optimize time
2.remove j.83b filter setting in dvbc mode for tl1 & txlx
Verify:
verified by t962x2_x301&t962x_r311
Change-Id: Ic922e3da727179e2e35a0fc80e52ac7242c54129
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
dtv_demod: TXLX ISDB-T can't search channel [1/1]
PD#SWPL-3987
Problem:
[Einstein]use ISDB-T cannot search any channel
Solution:
release cma memory at leave_mode for ISDB-t&DVB-T
Verify:
verified by t962x_r311
Change-Id: I9b79687a4d5270932ab30afaa3e7d2817e900149
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
build: fix build err [1/1]
PD#SWPL-4150
Problem:
When switch to the toolchain shipped with android P, multipile
"-Werror=maybe-uninitialized" error occurs, and the code fail
to be compiled
Solution:
Initialize variables if necessary
Verify:
Locally on Ampere
Change-Id: I280de648914565656831e211539bf41a7dee2b4a
Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
dtv_demod: txlx atsc-t loses lock when play video for a long time [1/1]
PD#SWPL-3418
Problem:
[Einstein]when AC off/on,enter live TV ,
TV display blank screen and no signal about 5S
Solution:
use post-eq to track(0x912=0x50)
Verify:
verified by t962x_r311
Change-Id: I924c55a8f1c92328e4371cb730e1b03bd720457f
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
dtv_demod: tl1,dvbc, new method for fast channel searching [1/1]
PD#TV-2154
Problem:
[Hisense-T962X2-P-customer-DTV]:DVBC QAM is set to auto to search channels
Solution:
add new searching method
note:
use "demod_dvbc_speedup_en" to mark the new method
it's disabled as default, can be enabled if needed
we can make it always enabled after all testing are passed
enable: echo fast_search on > /sys/kernel/debug/demod/dvbc_channel_fast
Verify:
verified by t962x2_x301
Change-Id: Icaaab9f27eb058a062d7048c6ca9fa2e3bff008e
Signed-off-by: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
dtv_demod: TL1 dtmb suspend hangup issue [1/1]
PD#SWPL-5202
Problem:
cma memory is not released when suspend
Solution:
provide suspend interface to release cma memory
Verify:
verified by t962x2_x301
Change-Id: I1d808a8a6119a2f385961c4c5bded5ab71c9c9d1
Signed-off-by: zhiwei.yuan <zhiwei.yuan@amlogic.com>
dtv_demod: Prevent NULL pointer crash caused by tuner attach failure [1/1]
PD#TV-1539
Problem:
Prevent NULL pointer crash caused by tuner attach failure.
Solution:
Prevent NULL pointer crash caused by tuner attach failure.
Verify:
verified by x301
Change-Id: I57cf32947775626467eb952dd2298ae9ec84601d
Signed-off-by: nengwen.chen <nengwen.chen@amlogic.com>
dtv_demod: add AGC control for board t309 [1/1]
PD#SWPL-5175
Problem:
r842 agc control need be controlled by demod
Solution:
add agc control function
Verify:
verified by t962x2_x301 t962x2_t309
Change-Id: If712e22276b97c457e2e2ed1c79bdf3673813dff
Signed-off-by: zhiwei.yuan <zhiwei.yuan@amlogic.com>
AMLOGIC DTV DEMOD DRIVER
M: Zhiwei Yuan <zhiwei.yuan@amlogic.com>
F: drivers/amlogic/media/dtv_demod/include/addr_atsc*.h
+F: drivers/amlogic/media/dtv_demod/include/demod_dbg.h
+F: drivers/amlogic/media/dtv_demod/demod_dbg.c
AMLOGIC DEFENDKEY DRIVER
M: Zhongfu Luo <zhongfu.luo@amlogic.com>
int ret;
int i;
ssize_t size = 0;
- struct canvas_info info;
+ struct canvas_info info = {NULL, 0, NULL, 0};
struct canvas_s canvas;
if (jiffies - pool->last_cat_map > 5 * HZ) {
}
}
EXPORT_SYMBOL(vf_unreg_provider);
+void vf_light_reg_provider(struct vframe_provider_s *prov)
+{
+ struct vframe_provider_s *p = NULL;
+ struct vframe_receiver_s *receiver = NULL;
+ int i;
+
+ for (i = 0; i < MAX_PROVIDER_NUM; i++) {
+ p = provider_table[i];
+ if (p && !strcmp(p->name, prov->name)) {
+ if (vfm_debug_flag & 1)
+ pr_err("%s:%s\n", __func__, prov->name);
+ receiver = vf_get_receiver(prov->name);
+ if (receiver && receiver->ops
+ && receiver->ops->event_cb) {
+ receiver->ops->event_cb(
+ VFRAME_EVENT_PROVIDER_REG,
+ (void *)prov->name,
+ receiver->op_arg);
+ } else{
+ pr_err("%s Error to notify receiver\n",
+ __func__);
+ }
+ break;
+ }
+ }
+}
+EXPORT_SYMBOL(vf_light_reg_provider);
void vf_light_unreg_provider(struct vframe_provider_s *prov)
{
dtvdemod-objs := demod_func.o dvbc_func.o i2c_func.o tuner_func.o atsc_func.o dvbc_v2.o dvbc_v3.o dtmb_func.o dvbt_v2.o#dvbt_func.o
-dtvdemod-objs += amlfrontend.o
+dtvdemod-objs += amlfrontend.o demod_dbg.o
dtvdemod-objs += aml_demod.o
/* #include <mach/am_regs.h> */
#include <linux/device.h>
#include <linux/cdev.h>
-#include <linux/debugfs.h>
/* #include <asm/fiq.h> */
#include <linux/uaccess.h>
#include <linux/dvb/aml_demod.h>
#include "demod_func.h"
+#include "demod_dbg.h"
#include <linux/slab.h>
#ifdef CONFIG_COMPAT
#include <linux/compat.h>
#endif
+
/*#include "sdio/sdio_init.h"*/
#define DRIVER_NAME "aml_demod"
#define MODULE_NAME "aml_demod"
dvbfe = aml_get_fe();/*get_si2177_tuner();*/
#if 0
if (dvbfe != NULL)
+ if (dvbfe->ops.tuner_ops.get_strength)
strength = dvbfe->ops.tuner_ops.get_strength(dvbfe);
#else
strength = tuner_get_ch_power2();
#if 0 /*ary temp for my_tool:*/
if (dvbfe != NULL) {
pr_dbg("calling tuner ops\n");
- dvbfe->ops.tuner_ops.set_params(dvbfe);
+ if (dvbfe->ops.tuner_ops.set_params)
+ dvbfe->ops.tuner_ops.set_params(dvbfe);
}
#endif
break;
#endif
};
-#if 0
-static int aml_demod_dbg_open(struct inode *inode, struct file *file)
-{
- pr_dbg("Amlogic Demod debug Open\n");
- return 0;
-}
-
-static int aml_demod_dbg_release(struct inode *inode, struct file *file)
-{
- pr_dbg("Amlogic Demod debug Release\n");
- return 0;
-}
-
-static unsigned int addr_for_read;
-static unsigned int register_val;
-static unsigned int symb_rate;
-static unsigned int ch_freq;
-static unsigned int modulation;
-static char *dbg_name[] = {
- "demod top r/w",
- "dvbc r/w",
- "atsc r/w",
- "dtmb r/w",
- "front r/w",
- "isdbt r/w",
- "dvbc init",
- "atsc init",
- "dtmb init",
-};
-
-unsigned int get_symbol_rate(void)
-{// / 1000
- return symb_rate;
-}
-
-unsigned int get_ch_freq(void)
-{// / 1000
- return ch_freq;
-}
-
-unsigned int get_modu(void)
-{
- return modulation;
-}
-
-/*
- *TVFE_VAFE_CTRL0 0x000d0710
- *TVFE_VAFE_CTRL1 0x00003000
- *TVFE_VAFE_CTRL2 0x1fe09e31
- *HHI_DADC_CNTL 0x0030303c
- *HHI_DADC_CNTL2 0x00003480
- *HHI_DADC_CNTL3 0x08700b83
- *HHI_VDAC_CNTL1 0x0000000
-
- *ADC_PLL_CNTL0 0X012004e0
- *ADC_PLL_CNTL0 0X312004e0
- *ADC_PLL_CNTL1 0X05400000
- *ADC_PLL_CNTL2 0xe1800000
- *ADC_PLL_CNTL3 0x48681c00
- *ADC_PLL_CNTL4 0x88770290
- *ADC_PLL_CNTL5 0x39272000
- *ADC_PLL_CNTL6 0x56540000
- *ADC_PLL_CNTL0 0X111104e0
- */
-static void aml_demod_adc_init(void)
-{
- PR_INFO("%s\n", __func__);
- demod_init_mutex();
- demod_power_switch(PWR_ON);
- //TVFE_VAFE_CTRL0
- demod_set_tvfe_reg(0x000d0710, 0xff654ec0);
- //TVFE_VAFE_CTRL1
- demod_set_tvfe_reg(0x00003000, 0xff654ec4);
- //TVFE_VAFE_CTRL2
- demod_set_tvfe_reg(0x1fe09e31, 0xff654ec8);
- //HHI_DADC_CNTL
- dd_tvafe_hiu_reg_write(0x9c, 0x0030303c);
- //HHI_DADC_CNTL2
- dd_tvafe_hiu_reg_write(0xa0, 0x00003480);
- //HHI_DADC_CNTL3
- //dd_tvafe_hiu_reg_write(0xa8, 0x08700b83);
- dd_tvafe_hiu_reg_write(0xa8, 0x08300b83);
- //HHI_VDAC_CNTL1
- dd_tvafe_hiu_reg_write(0x2f0, 0x0000000);
- //ADC_PLL_CNTL0
- dd_tvafe_hiu_reg_write(0x2c0, 0X012004e0);
- dd_tvafe_hiu_reg_write(0x2c0, 0X312004e0);
- //ADC_PLL_CNTL1
- dd_tvafe_hiu_reg_write(0x2c4, 0X05400000);
- //ADC_PLL_CNTL2
- //dd_tvafe_hiu_reg_write(0x2c8, 0xe1800000);
- dd_tvafe_hiu_reg_write(0x2c8, 0xE0800000);//shijie modify, crystal 24M
- //dd_tvafe_hiu_reg_write(0x2c8, 0xe9800000);
- //ADC_PLL_CNTL3
- dd_tvafe_hiu_reg_write(0x2cc, 0x48681c00);
- //ADC_PLL_CNTL4
- dd_tvafe_hiu_reg_write(0x2d0, 0x88770290);
- //ADC_PLL_CNTL5
- dd_tvafe_hiu_reg_write(0x2d4, 0x39272000);
- //ADC_PLL_CNTL6
- dd_tvafe_hiu_reg_write(0x2d8, 0x56540000);
- //ADC_PLL_CNTL0
- dd_tvafe_hiu_reg_write(0x2c0, 0X111104e0);
- //zou weihua
- dd_tvafe_hiu_reg_write(0x3cc, 0x00800000);
- //shijie
- dd_tvafe_hiu_reg_write(0x1d0, 0x501);//0x705
- //shixi, switch to demod mode, enable pclk
- //demod_write_reg(DEMOD_TOP_REG0, 0x11);
- dtvpll_init_flag(1);
-}
-
-static ssize_t aml_demod_dbg_show(struct file *file, char __user *userbuf,
- size_t count, loff_t *ppos)
-{
- char buf[80];
- ssize_t len = 0;
-
- #if 1
- len = snprintf(buf, sizeof(buf), "%s :0x%x = %i\n",
- dbg_name[addr_for_read >> 28], addr_for_read & 0xff,
- register_val);
- #else
- len = snprintf(buf, sizeof(buf), "%s\n", __func__);
- #endif
- //demod_read_reg(DEMOD_TOP_REGC);
- //dtmb_read_reg(0);
- //dd_tvafe_hiu_reg_write(0x9c, 0x0030303c);
- PR_INFO("%s\n", __func__);
- //PR_INFO("0xec0 = 0x%x\n", dd_tvafe_hiu_reg_read(0x9c));
- //dvbt_read_reg(0x38);
-
- return simple_read_from_buffer(userbuf, count, ppos, buf, len);
-}
-
-/*echo dbg_md [0xaddr] [val] > /sys/kernel/debug/demod/xxxx*/
-static ssize_t aml_demod_dbg_store(struct file *file,
- const char __user *userbuf, size_t count, loff_t *ppos)
-{
- char buf[80];
- unsigned int reg, val, dbg_md;
- int ret;
-
- count = min_t(size_t, count, (sizeof(buf)-1));
- if (copy_from_user(buf, userbuf, count))
- return -EFAULT;
-
- buf[count] = 0;
-
- ret = sscanf(buf, "%d %x %i", &dbg_md, ®, &val);
- aml_demod_adc_init();
-
- switch (ret) {
- case 1://cmd
- switch (dbg_md) {
- case AML_DBG_DVBC_INIT:
- Gxtv_Demod_Dvbc_v4_Init();
- break;
- case AML_DBG_ATSC_INIT:
- demod_set_sys_atsc_v4();
- break;
- case AML_DBG_DTMB_INIT:
- break;
- default:
- break;
- }
-
- PR_INFO("%s\n", dbg_name[dbg_md]);
- break;
- case 2://read register, set param
- switch (dbg_md) {
- case AML_DBG_DEMOD_TOP_RW:
- addr_for_read = (AML_DBG_DEMOD_TOP_RW << 28) | reg;
- register_val = demod_read_reg(reg);
- break;
- case AML_DBG_DVBC_RW:
- addr_for_read = (AML_DBG_DVBC_RW << 28) | reg;
- register_val = dvbc_read_reg(reg);
- break;
- case AML_DBG_ATSC_RW:
- addr_for_read = (AML_DBG_ATSC_RW << 28) | reg;
- register_val = atsc_read_reg_v4(reg);
- break;
- case AML_DBG_DTMB_RW:
- addr_for_read = (AML_DBG_DTMB_RW << 28) | reg;
- register_val = dtmb_read_reg(reg);
- break;
- case AML_DBG_FRONT_RW:
- addr_for_read = (AML_DBG_FRONT_RW << 28) | reg;
- register_val = front_read_reg_v4(reg);
- break;
- case AML_DBG_ISDBT_RW:
- addr_for_read = (AML_DBG_ISDBT_RW << 28) | reg;
- register_val = isdbt_read_reg_v4(reg);
- break;
- case AML_DBG_DEMOD_SYMB_RATE:
- symb_rate = reg;
- break;
- case AML_DBG_DEMOD_CH_FREQ:
- ch_freq = reg;
- break;
- case AML_DBG_DEMOD_MODUL:
- modulation = reg;
- break;
- default:
- break;
- }
-
- PR_INFO("%s reg:0x%x\n", dbg_name[dbg_md], reg);
- break;
- case 3://write register
- switch (dbg_md) {
- case AML_DBG_DEMOD_TOP_RW:
- demod_write_reg(reg, val);
- break;
- case AML_DBG_DVBC_RW:
- dvbc_write_reg(reg, val);
- break;
- case AML_DBG_ATSC_RW:
- atsc_write_reg_v4(reg, val);
- break;
- case AML_DBG_DTMB_RW:
- dtmb_write_reg(reg, val);
- break;
- case AML_DBG_FRONT_RW:
- front_write_reg_v4(reg, val);
- break;
- case AML_DBG_ISDBT_RW:
- isdbt_write_reg_v4(reg, val);
- break;
- default:
- break;
- }
-
- PR_INFO("%s reg:0x%x,val=%d\n", dbg_name[dbg_md], reg, val);
- break;
- default:
- return -EINVAL;
- }
-
- return count;
-}
-
-static const struct file_operations aml_demod_dvbc_dbg_fops = {
- .owner = THIS_MODULE,
- .open = aml_demod_dbg_open,
- .release = aml_demod_dbg_release,
- //.unlocked_ioctl = aml_demod_ioctl,
- .read = aml_demod_dbg_show,
- .write = aml_demod_dbg_store,
-};
-
-static void aml_demod_dbg_init(void)
-{
- struct dentry *root_entry = dtvdd_devp->demod_root;
- struct dentry *entry;
-
- PR_INFO("%s\n", __func__);
-
- root_entry = debugfs_create_dir("frontend", NULL);
- if (!root_entry) {
- PR_INFO("Can't create debugfs dir frontend.\n");
- return;
- }
-
- entry = debugfs_create_file("demod", S_IFREG | 0644, root_entry, NULL,
- &aml_demod_dvbc_dbg_fops);
- if (!entry) {
- PR_INFO("Can't create debugfs file demod.\n");
- return;
- }
-}
-
-static void aml_demod_dbg_exit(void)
-{
- struct dentry *root_entry = dtvdd_devp->demod_root;
-
- if (dtvdd_devp && root_entry)
- debugfs_remove_recursive(root_entry);
-}
-#endif
-
static int aml_demod_ui_open(struct inode *inode, struct file *file)
{
pr_dbg("Amlogic aml_demod_ui_open Open\n");
sdio_init();
#endif
aml_demod_ui_init();
- //aml_demod_dbg_init();
+ aml_demod_dbg_init();
return 0;
class_unregister(&aml_demod_class);
aml_demod_exit_ui();
- //aml_demod_dbg_exit();
+ aml_demod_dbg_exit();
}
#ifndef CONFIG_AM_DEMOD_DVBAPI
#include <linux/dvb/aml_demod.h>
#include "demod_func.h"
-#include "depend.h" /**/
-
-#include "amlfrontend.h"
-
/*dma_get_cma_size_int_byte*/
#include <linux/amlogic/media/codec_mm/codec_mm.h>
#include <linux/dma-contiguous.h>
MODULE_PARM_DESC(std_lock_timeout, "\n\t\t atsc-c std lock timeout");
static unsigned int std_lock_timeout = 1000;
module_param(std_lock_timeout, int, 0644);
-/*0.001for field,0.002 for performance*/
-static char *demod_version = "V0.03";
+
+/*0.001for field,0.002 for performance
+ *0.04: new method of tl1 dvbc channel fast search(Hisense project)
+ */
+static char *demod_version = "V0.04";
int aml_demod_debug = DBG_INFO;
+/*use this flag to mark the new method for dvbc channel fast search
+ *it's disabled as default, can be enabled if needed
+ *we can make it always enabled after all testing are passed
+ */
+static unsigned int demod_dvbc_speedup_en;
+
#if 0
#define PR_DBG(fmt, args ...) \
"DVBC_ANNEX_C",
"ANALOG", /*19*/
};
-void dbg_delsys(unsigned char id)
-{
- if (id <= END_SYS_DELIVERY)
- PR_INFO("%s:%s:\n", __func__, name_fe_delivery_system[id]);
- else
- PR_INFO("%s:%d\n", __func__, id);
-}
+static const char * const name_fe_n_mode[] = {
+ "AM_FE_UNKNOWN_N",
+ "AM_FE_QPSK_N",
+ "AM_FE_QAM_N",
+ "AM_FE_OFDM_N",
+ "AM_FE_ATSC_N",
+ "AM_FE_DTMB_N",
+ "AM_FE_ISDBT_N",
+ "AM_FE_NUM",
+};
+
static void dtvdemod_vdac_enable(bool on);
static void dtvdemod_set_agc_pinmux(int on);
-
-
static int Gxtv_Demod_Dvbc_Init(/*struct aml_fe_dev *dev, */int mode);
static ssize_t dvbc_auto_sym_show(struct class *cls,
struct class_attribute *attr, char *buf)
static unsigned int dtmb_mode;
static unsigned int atsc_mode_para;
-static unsigned int demod_mode_para;
+static enum demod_md demod_mode_para;
enum {
ATSC_READ_FREQ = 4,
};
-enum {
- UNKNOWN = 0,
- AML_DVBC,
- AML_DTMB,
- AML_DVBT,
- AML_ATSC,
- AML_J83B,
- AML_ISDBT,
- AML_DVBT2
-};
-
-
-
-
+enum demod_md demod_get_current_mode(void)
+{
+ return demod_mode_para;
+}
int convert_snr(int in_snr)
{
struct aml_demod_sts demod_sts;
struct aml_demod_sta demod_sta;
int strenth;
-
- int ilock;
+ int ilock = 0;
/*check tuner*/
if (!timer_tuner_not_enough()) {
strenth = tuner_get_ch_power2();
+
+ /*agc control,fine tune strength*/
+ if (is_ic_ver(IC_VER_TL1) && (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4)
+ == 0)) {
+ strenth += 22;
+
+ if (strenth <= -80)
+ strenth = dvbc_get_power_strength(
+ qam_read_reg(0x27) & 0x7ff, strenth);
+ }
+
if (strenth < -87) {
*status = FE_TIMEDOUT;
return 0;
}
}
+
/*demod_sts.ch_sts = qam_read_reg(0x6);*/
demod_sts.ch_sts = dvbc_get_ch_sts();
dvbc_status(&demod_sta, /*&demod_i2c,*/ &demod_sts);
+
if (demod_sts.ch_sts & 0x1) {
ilock = 1;
*status =
timer_disable(D_TIMER_DETECT);
}
}
+
if (last_lock != ilock) {
PR_DBG("%s.\n",
ilock ? "!! >> LOCK << !!" : "!! >> UNLOCK << !!");
return 0;
}
+static int demod_dvbc_speed_up(enum fe_status *status)
+{
+ unsigned int cnt, i, sts, check_ok = 0;
+ struct aml_demod_sts demod_sts;
+ const int dvbc_count = 5;
+ int ilock = 0;
+
+ if (*status == 0) {
+ for (cnt = 0; cnt < 10; cnt++) {
+ demod_sts.ch_sts = dvbc_get_ch_sts();
+
+ if (demod_sts.ch_sts & 0x1) {
+ /*have signal*/
+ *status =
+ FE_HAS_LOCK | FE_HAS_SIGNAL |
+ FE_HAS_CARRIER |
+ FE_HAS_VITERBI | FE_HAS_SYNC;
+ ilock = 1;
+ check_ok = 1;
+ } else {
+ for (i = 0; i < dvbc_count; i++) {
+ msleep(25);
+ sts = dvbc_get_status();
+
+ if (sts >= 0x3)
+ break;
+ }
+
+ PR_DBG("[rsj]dvbc_status is 0x%x\n", sts);
+
+ if (sts < 0x3) {
+ *status = FE_TIMEDOUT;
+ ilock = 0;
+ check_ok = 1;
+ timer_disable(D_TIMER_DETECT);
+ }
+ }
+
+ if (check_ok == 1)
+ break;
+
+ msleep(20);
+ }
+ }
+
+ if (last_lock != ilock) {
+ PR_DBG("%s : %s.\n", __func__,
+ ilock ? "!! >> LOCK << !!" : "!! >> UNLOCK << !!");
+ last_lock = ilock;
+ }
+
+ return 0;
+}
+
static int gxtv_demod_dvbc_read_ber(struct dvb_frontend *fe, u32 *ber)
{
/*struct aml_fe_dev *dev = afe->dtv_demod;*/
static int gxtv_demod_dvbc_read_signal_strength
(struct dvb_frontend *fe, u16 *strength)
{
+ int tuner_sr;
#if 0
tn_strength = fe->ops.tuner_ops.get_strength(fe);
*strength = 256 - tn_strength;
#else
- *strength = tuner_get_ch_power3();
+ if (is_ic_ver(IC_VER_TL1) &&
+ (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4) == 0)) {
+ tuner_sr = tuner_get_ch_power2();
+ tuner_sr += 22;
+
+ if (tuner_sr <= -80)
+ tuner_sr = dvbc_get_power_strength(
+ qam_read_reg(0x27) & 0x7ff, tuner_sr);
+
+ if (tuner_sr < -100)
+ *strength = 0;
+ else
+ *strength = tuner_sr + 100;
+ } else
+ *strength = tuner_get_ch_power3();
#endif
return 0;
}
/*extern int aml_fe_analog_set_frontend(struct dvb_frontend *fe);*/
-
static int gxtv_demod_dvbc_set_frontend(struct dvb_frontend *fe)
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
PR_INFO("%s\n", __func__);
/*timer_set_max(D_TIMER_DETECT, 4000);*/
/*timer_begain(D_TIMER_DETECT);*/
-
memset(¶m, 0, sizeof(param));
param.ch_freq = c->frequency / 1000;
param.mode = amdemod_qam(c->modulation);
}
static int gxtv_demod_dvbc_get_frontend(struct dvb_frontend *fe)
-{ /*these content will be writed into eeprom .*/
+{
+ #if 0
+ /*these content will be writed into eeprom .*/
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
u32 qam_mode;
qam_mode = dvbc_get_qam_mode();
c->modulation = qam_mode + 1;
PR_DBG("[mode] is %d\n", c->modulation);
+ #endif
return 0;
}
return 0;
}
-#if 0
-/*TL1*/
-void Gxtv_Demod_Dvbc_v4_Init(void)
-{
- //struct dtv_frontend_properties *c = &fe->dtv_property_cache;
- struct aml_demod_dvbc dvbc;
- int nco_rate;
- int tmp;
-
- //printf("frequency point is(KHz):");
- //scanf("%d", &tmp);
- //dvbc.ch_freq = tmp;
- //dvbc.ch_freq = 474000;
- dvbc.ch_freq = 474000;
- //dvbc.mode = tmp;
- dvbc.mode = 4;// 0=16QAM, 1=32QAM, 2 = 64QAM, 3 = 128QAM, 4 = 256QAM
- //dvbc.symb_rate = tmp;
- dvbc.symb_rate = 5360;//6875;5056(J.83b 64QAM),5360(J.83b 256QAM)
- //ioctl(fd, AML_DEMOD_DVBC_SET_CH, &dvbc);
- dvbc.dat0 = 24000;
- nco_rate = (24*256)/250+2;
-
- //app_apb_write_reg(0xf00*4,0x88);
- demod_write_reg(DEMOD_TOP_REG0, 0x88);
- //app_apb_write_reg(0xf08*4,0x201);
- demod_write_reg(DEMOD_TOP_REG8, 0x201);
- //app_apb_write_reg(0xf0c*4,0x11); //open write enable
- demod_write_reg(DEMOD_TOP_REGC, 0x11);
- //app_apb_write_reg(0xe20,
- //((app_apb_read_reg(0xe20) &~ 0xff) | (nco_rate & 0xff)));
- //app_apb_write_reg(0xe20, (app_apb_read_reg(0xe20) | (1 << 8)));
- front_write_reg_v4(0x20,
- ((front_read_reg_v4(0x20) & ~0xff) | (nco_rate & 0xff)));
- front_write_reg_v4(0x20, (front_read_reg_v4(0x20) | (1 << 8)));
-
- //dvbc_reg_initial_tmp(&dvbc);
- dvbc_reg_initial_tmp_v4(&dvbc);
-
- //printf("set J.83B(1) OR DVBC(2)");
- tmp = 2;
- if (tmp == 1) {
- //app_apb_write_reg(reg_reset,0x10f33);
- qam_write_reg(0x7, 0x10f33);
- //set_j83b_filter_reg();
- set_j83b_filter_reg_v4();
- } else {
- //app_apb_write_reg(reg_reset,0xf33);
- qam_write_reg(0x7, 0xf33);
- }
-
- #if 0
- printf("select 0~3 mode:");
- scanf("%d", &tmp);
- if (tmp == 0) {
- //set_dvbc_reg_1();
- set_dvbc_reg_1_v4();
- //set_dvbc_reg_2();
- set_dvbc_reg_2_v4();
- } else if (tmp == 1) {
- //set_dvbc_reg_1();
- set_dvbc_reg_1_v4();
- //set_j83b_reg_2();
- set_j83b_reg_2_v4();
- } else if (tmp == 2) {
- //set_j83b_reg_1();
- set_j83b_reg_1_v4();
- //set_dvbc_reg_2();
- set_dvbc_reg_2_v4();
- } else if (tmp == 3) {
- //set_j83b_reg_1();
- set_j83b_reg_1_v4();
- //set_j83b_reg_2();
- set_j83b_reg_2_v4();
- }
- #endif
-
- #if 0
- app_apb_write_reg(0x48, 0x50e1000);
- app_apb_write_reg(0xc0, 0x41f2f69);
- #else
- qam_write_reg(0x12, 0x50e1000);
- qam_write_reg(0x30, 0x41f2f69);
- #endif
-}
-
-int uart_error_confirm(int a_0, int a_1)
-{
- int flag_out_of_range;
- int flag_error;
- int flag_zero;
- int flag_sta_check;
- int st[2];
- int out;
-
- st[0] = a_0&0xf;
- st[1] = (a_0>>4)&0xf;
- if (st[1] == 0)
- flag_sta_check = ((st[0] == 1) || (st[0] == 2)) ? 0 : 1;
- if (st[1] == 1)
- flag_sta_check = ((st[0] == 2) || (st[0] == 3)) ? 0 : 1;
- if (st[1] == 2)
- flag_sta_check = (st[0] == 3) ? 0 : 1;
- if (st[1] == 3)
- flag_sta_check = (st[0] == 4) ? 0 : 1;
- if (st[1] == 4)
- flag_sta_check = (st[0] == 6) ? 0 : 1;
- if (st[1] == 6)
- flag_sta_check = ((st[0] == 4) || (st[0] == 5)) ? 0 : 1;
-
- flag_zero = (a_0 == 0) ? 1 : 0;
- flag_out_of_range = ((a_0 & 0xf) > 6) ? 1 : 0;
- flag_error = (((a_0 >> 4) & 0x0fffffff) == (a_1 & 0x0fffffff)) ? 0 : 1;
- out = ((flag_out_of_range == 1) || (flag_error == 1)
- || (flag_zero == 1)) ? 1 : 0;
- return out;
-}
-
-void print_dvbc_result(void)
-{
- //int timer1,
- int time;
- int i, tmp;
- //float ftmp;
- //struct aml_demod_sts sts;
- int status[2], uart_error;
- int record = 6, cnt = 0, cur_res = 0;
-
- //timer1 = read_time_usecond();
- status[0] = status[1] = 0;
- time = 1;
- i = 0;
- while (i < time) {
- status[0] = qam_read_reg(0x31);
- //if((status[0]&0xf) == 5){
- // timer2=read_time_usecond();
- // printf("\n\n\n\n[sync timer]%d\n",timer2-timer1);
- // break;
- //}
- uart_error = uart_error_confirm(status[0], status[1]);
- usleep_range(10000, 10001);
- status[1] = status[0];
- i = i + 1;
-
- //lg add state cnt
- cur_res = status[1] & 0xf;
- if (cur_res != 6) {
- record = cur_res;
- } else {
- if (record != cur_res)
- cnt++;
- record = cur_res;
- }
-
- // ioctl(fd, AML_DEMOD_DVBC_GET_CH, &sts);
- //tmp = sts.ch_sts;
- PR_INFO("sta %08x ulock_n %d ", qam_read_reg(0x6), cnt);
- //ftmp = sts.ch_snr;
- //ftmp /= 100.0;
- //ftmp=(app_apb_read_reg(0x174)&0xfff0)/16/32;
- //ftmp=(dvbc_read_reg(0x174)&0xfff0)/16/32;
- //PR_INFO("snr %5.2f dB ", ftmp);
- PR_INFO("eq status is %d ", qam_read_reg(0x5d)&0xf);
- PR_INFO("npn_det %d impdet %d imp_n %d ",
- qam_read_reg(0x58)>>20&0x1, qam_read_reg(0x58)>>16&0x3,
- qam_read_reg(0x58)&0xffff);
- // ftmp = sts.ch_ber;
- // ftmp /= 1e6;
- // printf("ber %.2e ", ftmp);
- // if(ber_avg == 0)
- // ber_avg = ftmp;
- // ber_avg = ber_avg + (ftmp-ber_avg)/32;
- // printf("beravg %.2e ", ber_avg);
- tmp = (qam_read_reg(0x33)&0xffff);
- //tmp = sts.ch_per;
- PR_INFO("per %d ", tmp);
- //ftmp=(dvbc_read_reg(0x34)&0xffff)/1e3;
- // ftmp = sts.symb_rate;
- //PR_INFO("srate %.3f ", ftmp);
- //ftmp = (dvbc_read_reg(0x28)&0x7fffff)/1e3;
- //PR_INFO("freqoff %.3f kHz ", ftmp);
- tmp = (qam_read_reg(0x27));
- //PR_INFO("power %ddb,gain %.3d ",
- //((tmp>>22) & 0x1ff)/16.0, tmp & 0x7ff);
- PR_INFO("lock sta %x\n", qam_read_reg(0x6));
- }
-}
-#endif
-
static void gxtv_demod_dvbt_release(struct dvb_frontend *fe)
{
static int gxtv_demod_atsc_read_signal_strength
(struct dvb_frontend *fe, u16 *strength)
{
+ int strenth;
+
+ strenth = tuner_get_ch_power(fe);
/* struct aml_fe *afe = fe->demodulator_priv;*/
/*struct aml_fe_dev *dev = afe->dtv_demod; */
+ if (is_ic_ver(IC_VER_TL1) && (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4) == 0)) {
+ if ((fe->dtv_property_cache.modulation <= QAM_AUTO) &&
+ (fe->dtv_property_cache.modulation != QPSK))
+ strenth += 18;
+ else {
+ strenth += 15;
+ if (strenth <= -80)
+ strenth = atsc_get_power_strength(
+ atsc_read_reg_v4(0x44) & 0xfff,
+ strenth);
+ }
+ if (strenth < -100)
+ *strength = 0;
+ else
+ *strength = strenth + 100;
+ } else
+ *strength = tuner_get_ch_power3();
- *strength = tuner_get_ch_power3();
- #if 0
- if (*strength < 0)
- *strength = 0;
- else if (*strength > 100)
- *strength = 100;
- #endif
if (*strength > 100)
*strength = 100;
union ATSC_DEMOD_REG_0X6A_BITS Val_0x6a;
union ATSC_CNTR_REG_0X20_BITS Val_0x20;
int nco_rate;
+ /*[0]: specturm inverse(1),normal(0); [1]:if_frequency*/
+ unsigned int tuner_freq[2] = {0};
memset(¶m_atsc, 0, sizeof(param_atsc));
memset(¶m_j83b, 0, sizeof(param_j83b));
if (atsc_flag != QAM_AUTO)
atsc_flag = QAM_AUTO;
/* demod_set_demod_reg(0x502, TXLX_ADC_REG6);*/
- if (!is_ic_ver(IC_VER_TL1))
- dd_tvafe_hiu_reg_write(D_HHI_DEMOD_CLK_CNTL, 0x502);
+ //sys_clk=167M
+ dd_tvafe_hiu_reg_write(D_HHI_DEMOD_CLK_CNTL, 0x502);
demod_set_mode_ts(Gxtv_Dvbc);
param_j83b.ch_freq = c->frequency / 1000;
((front_read_reg_v4(0x20) & ~0xff)
| (nco_rate & 0xff)));
front_write_reg_v4(0x2f, 0x5);//for timeshift mosaic
- dd_tvafe_hiu_reg_write(0x1d0, 0x502);//sys_clk=167M
}
dvbc_set_ch(&demod_status, /*&demod_i2c, */¶m_j83b);
set_j83b_filter_reg_v4();
qam_write_reg(0x12, 0x50e1000);
qam_write_reg(0x30, 0x41f2f69);
- //for timeshift mosaic issue
- //qam_write_reg(0x84, 0x2190000);
}
-
} else if (c->modulation > QAM_AUTO) {
if (is_ic_ver(IC_VER_TL1)) {
- //demod_set_sys_atsc_v4();
Val_0x6a.bits = atsc_read_reg_v4(ATSC_DEMOD_REG_0X6A);
Val_0x6a.b.peak_thd = 0x6;//Let CCFO Quality over 6
atsc_write_reg_v4(ATSC_DEMOD_REG_0X6A, Val_0x6a.bits);
atsc_write_reg_v4(ATSC_EQ_REG_0XA5, 0x8c);
+ if (fe->ops.tuner_ops.get_if_frequency)
+ fe->ops.tuner_ops.
+ get_if_frequency(fe, tuner_freq);
+
+ /*bit 2: invert specturm, for r842 tuner AGC control*/
+ if (tuner_freq[0] == 1)
+ atsc_write_reg_v4(ATSC_DEMOD_REG_0X56, 0x4);
+ else
+ atsc_write_reg_v4(ATSC_DEMOD_REG_0X56, 0x0);
+
if (demod_status.adc_freq == Adc_Clk_24M) {
atsc_write_reg_v4(ATSC_DEMOD_REG_0X54,
0x1aaaaa);
}
}
- if (is_ic_ver(IC_VER_TL1))
- return 0;
-
if ((auto_search_std == 1) && ((c->modulation <= QAM_AUTO)
&& (c->modulation != QPSK))) {
unsigned char s = 0;
msleep(dvb_tuner_delay);
strenth = tuner_get_ch_power(fe);
+
+ /*agc control,fine tune strength*/
+ if (is_ic_ver(IC_VER_TL1) && (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4) == 0)) {
+ strenth += 15;
+ if (strenth <= -80)
+ strenth = atsc_get_power_strength(
+ atsc_read_reg_v4(0x44) & 0xfff, strenth);
+ }
+
if (strenth < THRD_TUNER_STRENTH_ATSC) {
*status = FE_TIMEDOUT;
PR_ATSC("tuner:no signal!\n");
int cnt;
int check_ok;
+ j83b_status = 0;
+
/*tuner:*/
if (dvb_tuner_delay > 9)
msleep(dvb_tuner_delay);
strenth = tuner_get_ch_power(fe);
+
+ /*agc control,fine tune strength*/
+ if (is_ic_ver(IC_VER_TL1) && (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4) == 0))
+ strenth += 18;
+
if (strenth < THRD_TUNER_STRENTH_J83) {
*s = FE_TIMEDOUT;
PR_ATSC("tuner:no signal!j83\n");
for (cnt = 0; cnt < CNT_FIRST; cnt++) {
gxtv_demod_atsc_read_status(fe, &cs);
- if (is_ic_ver(IC_VER_TL1)) {
- *s = cs;
- return 0;
- }
-
if (cs != 0x1f) {
/*msleep(200);*/
PR_DBG("[j.83b] 1\n");
PR_DBG("+7+");
-
+ j83b_status = 0;
strenth = tuner_get_ch_power(fe);
if (strenth < THRD_TUNER_STRENTH_J83) {
*s = FE_TIMEDOUT;
{
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+ if (!demod_thread)
+ return;
+
if (c->modulation == QPSK) {
PR_DBG("mode is qpsk, return;\n");
/*return;*/
PR_ERR("%s:not support %d!\n", __func__, get_dtmb_ver());
return -1;
}
+
s = amdemod_dtmb_stat_islock();
-/* s=1;*/
+
if (s == 1) {
ilock = 1;
*status =
static int gxtv_demod_dtmb_read_signal_strength
(struct dvb_frontend *fe, u16 *strength)
{
+ int tuner_sr;
- *strength = tuner_get_ch_power3();
+ if (is_ic_ver(IC_VER_TL1) &&
+ (dtvdd_devp->pin_name != NULL) &&
+ (strncmp(fe->ops.tuner_ops.info.name, "r842", 4) == 0)) {
+ tuner_sr = tuner_get_ch_power2();
+ tuner_sr += 16;
+
+ if (tuner_sr < -100)
+ *strength = 0;
+ else
+ *strength = tuner_sr + 100;
+ } else
+ *strength = tuner_get_ch_power3();
return 0;
}
return 0;
}
+
#ifdef DVB_CORE_ORI
+unsigned int demod_dvbc_get_fast_search(void)
+{
+ return demod_dvbc_speedup_en;
+}
+
+void demod_dvbc_set_fast_search(unsigned int en)
+{
+ if (en)
+ demod_dvbc_speedup_en = 1;
+ else
+ demod_dvbc_speedup_en = 0;
+}
+
+void demod_dvbc_fsm_reset(void)
+{
+ //qam_write_reg(0x7, 0xf23);
+ qam_write_reg(0x7, qam_read_reg(0x7) & ~(1 << 4));
+ qam_write_reg(0x3a, 0x0);
+ //qam_write_reg(0x7, 0xf33);
+ qam_write_reg(0x7, qam_read_reg(0x7) | (1 << 4));
+ qam_write_reg(0x3a, 0x4);
+}
+
+//return val : 0=no signal,1=has signal,2=waiting
+unsigned int demod_dvbc_64_256_auto_fast(unsigned int *delay)
+{
+ static unsigned int times, no_sig_cnt;
+ static unsigned int qam64 = 1;
+
+ if (tuner_get_ch_power2() < -87)
+ return 0;
+
+ times++;
+ PR_DVBC("fast search : times = %d\n", times);
+ if (times < 6)
+ *delay = HZ / 8;//125ms
+ else
+ *delay = HZ / 2;//500ms
+
+ if ((qam_read_reg(0x31) & 0xf) < 3) {
+ no_sig_cnt++;
+
+ if (no_sig_cnt == 2 && times == 2) {//250ms
+ no_sig_cnt = 0;
+ times = 0;
+ *delay = HZ / 4;
+ qam64 = 1;
+ return 0;
+ }
+ } else if ((qam_read_reg(0x31) & 0xf) == 5) {
+ no_sig_cnt = 0;
+ times = 0;
+ *delay = HZ / 4;
+ qam64 = 1;
+ return 1;
+ }
+
+ if (times == 14) {
+ times = 0;
+ no_sig_cnt = 0;
+ *delay = HZ / 4;
+ qam64 = 1;
+ return 0;
+ }
+ qam64 = !qam64;
+
+ PR_DVBC("fast search : qam64 = %d\n", qam64);
+ if (qam64)
+ demod_dvbc_set_qam(2);//64qam
+ else
+ demod_dvbc_set_qam(4);//256qam
+
+ demod_dvbc_fsm_reset();
+
+ return 2;
+}
+
+//return val : 0=no signal,1=has signal,2=waiting
+unsigned int demod_dvbc_fast_search(unsigned int *delay)
+{
+ static unsigned int times, no_sig_cnt;
+
+ if (tuner_get_ch_power2() < -87)
+ return 0;
+
+ times++;
+ PR_DVBC("fast search : times = %d\n", times);
+ if (times < 3)
+ *delay = HZ / 8;//125ms
+ else
+ *delay = HZ / 2;//500ms
+
+ if ((qam_read_reg(0x31) & 0xf) < 3) {
+ no_sig_cnt++;
+
+ if (no_sig_cnt == 2 && times == 2) {//250ms
+ no_sig_cnt = 0;
+ times = 0;
+ *delay = HZ / 4;
+ return 0;
+ }
+ } else if ((qam_read_reg(0x31) & 0xf) == 5) {
+ no_sig_cnt = 0;
+ times = 0;
+ *delay = HZ / 4;
+ return 1;
+ }
+
+ if (times == 7) {
+ times = 0;
+ no_sig_cnt = 0;
+ *delay = HZ / 4;
+ return 0;
+ }
+
+ demod_dvbc_fsm_reset();
+
+ return 2;
+}
static int gxtv_demod_dvbc_tune(struct dvb_frontend *fe, bool re_tune,
unsigned int mode_flags, unsigned int *delay, enum fe_status *status)
{
/*struct dtv_frontend_properties *c = &fe->dtv_property_cache;*/
int ret = 0;
+ unsigned int sig_flg;
+ static unsigned int fast_search_finish = 1;
/*unsigned int up_delay;*/
/*unsigned int firstdetet;*/
*delay = HZ / 4;
-#if 1
+ if (!demod_thread)
+ return 0;
+
if (re_tune) {
/*first*/
dtvdd_devp->en_detect = 1;
gxtv_demod_dvbc_set_frontend(fe);
+
+ if (demod_dvbc_speedup_en == 1) {
+ fast_search_finish = 0;
+ *status = 0;
+ *delay = HZ / 8;
+ qam_write_reg(0x65, 0x400c);
+ qam_write_reg(0x60, 0x10466000);
+ qam_write_reg(0xac, (qam_read_reg(0xac) & (~0xff00))
+ | 0x800);
+ qam_write_reg(0xae, (qam_read_reg(0xae)
+ & (~0xff000000)) | 0x8000000);
+
+ if (fe->dtv_property_cache.modulation == QAM_AUTO)
+ demod_dvbc_set_qam(2);//64 QAM
+ } else
+ qam_write_reg(0x65, 0x800c);
+
+ if (demod_dvbc_speedup_en == 1)
+ return 0;
+
/*timer_set_max(D_TIMER_DETECT, 4000);*/
timer_begain(D_TIMER_DETECT);
gxtv_demod_dvbc_read_status_timer(fe, status);
+ if (is_ic_ver(IC_VER_TL1))
+ demod_dvbc_speed_up(status);
+
PR_DBG("tune finish!\n");
return ret;
}
-#endif
+
if (!dtvdd_devp->en_detect) {
PR_DBGL("tune:not enable\n");
return ret;
}
- gxtv_demod_dvbc_read_status_timer(fe, status);
+ if (demod_dvbc_speedup_en == 1) {
+ if (!fast_search_finish) {
+ if (fe->dtv_property_cache.modulation == QAM_AUTO)
+ sig_flg = demod_dvbc_64_256_auto_fast(delay);
+ else
+ sig_flg = demod_dvbc_fast_search(delay);
+
+ switch (sig_flg) {
+ case 0:
+ *status = FE_TIMEDOUT;
+ fast_search_finish = 1;
+ PR_DVBC(">>>unlock<<<\n");
+ break;
+ case 1:
+ *status =
+ FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER |
+ FE_HAS_VITERBI | FE_HAS_SYNC;
+ fast_search_finish = 1;
+ PR_DVBC(">>>lock<<<\n");
+ break;
+ case 2:
+ *status = 0;
+ break;
+ default:
+ PR_DVBC("wrong return value\n");
+ break;
+ }
+ } else {
+ gxtv_demod_dvbc_read_status_timer(fe, status);
+ }
+ } else {
+ gxtv_demod_dvbc_read_status_timer(fe, status);
+ }
+
+ if (demod_dvbc_speedup_en == 1)
+ return 0;
#if 0
if (is_ic_ver(IC_VER_TL1))
}
#endif
-static bool enter_mode(int mode)
+static bool enter_mode(enum aml_fe_n_mode_t mode)
{
/*struct aml_fe_dev *dev = fe->dtv_demod;*/
struct amldtvdemod_device_s *devn = dtvdd_devp;
int memstart_dtmb;
bool ret = true;
- PR_INFO("%s:%d\n", __func__, mode);
+ if (mode < AM_FE_NUM)
+ PR_INFO("%s:%s\n", __func__, name_fe_n_mode[mode]);
+ else
+ PR_ERR("%s:%d\n", __func__, mode);
dtvdemod_set_agc_pinmux(1);
if (mode == AM_FE_DTMB_N) {
Gxtv_Demod_Dtmb_Init(devn);
- if (devn->cma_flag == 1) {
- PR_DBG("CMA MODE, cma flag is %d,mem size is %d",
- devn->cma_flag, devn->cma_mem_size);
- if (dtmb_cma_alloc(devn)) {
- memstart_dtmb = devn->mem_start;
- } else {
- ret = false;
- return ret;
+ if (devn->cma_flag == 1) {
+ PR_DBG("CMA MODE, cma flag is %d,mem size is %d",
+ devn->cma_flag, devn->cma_mem_size);
+ if (dtmb_cma_alloc(devn)) {
+ memstart_dtmb = devn->mem_start;
+ } else {
+ ret = false;
+ return ret;
+ }
+ } else {
+ memstart_dtmb = devn->mem_start;/*??*/
}
- } else {
- memstart_dtmb = devn->mem_start;/*??*/
- }
devn->act_dtmb = true;
dtmb_set_mem_st(memstart_dtmb);
timer_set_max(D_TIMER_DETECT, 2000);
/*reset is 4s*/
timer_set_max(D_TIMER_SET, 4000);
+
if (devn->cma_flag == 1) {
PR_DBG("CMA MODE, cma flag is %d,mem size is %d",
devn->cma_flag,
} else {
ret = false;
return ret;
-
}
} else {
memstart_dtmb = devn->mem_start;/*??*/
}
+
PR_DBG("[im]memstart is %x\n", memstart_dtmb);
dvbt_write_reg((0x10 << 2), memstart_dtmb);
}
}
-static int leave_mode(int mode)
+static int leave_mode(enum aml_fe_n_mode_t mode)
{
/* struct aml_fe_dev *dev = fe->dtv_demod;*/
struct amldtvdemod_device_s *devn = dtvdd_devp;
- PR_INFO("%s:\n", __func__);
+ if (mode < AM_FE_NUM)
+ PR_INFO("%s:%s\n", __func__, name_fe_n_mode[mode]);
+ else
+ PR_ERR("%s:%d\n", __func__, mode);
+
dtvdd_devp->en_detect = 0;
dtvdd_devp->last_delsys = SYS_UNDEFINED;
+ dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
dtvpll_init_flag(0);
/*dvbc_timer_exit();*/
if (cci_thread)
dvbc_kill_cci_task();
- #if 0
+
if (mode == AM_FE_DTMB_N) {
- dtmb_poll_stop(); /*polling mode*/
- /* close arbit */
+ if (dtvdd_devp->act_dtmb) {
+ dtmb_poll_stop(); /*polling mode*/
+ /* close arbit */
+ demod_write_reg(DEMOD_TOP_REGC, 0x0);
+ dtvdd_devp->act_dtmb = false;
+ }
- demod_write_reg(DEMOD_TOP_REGC, 0x0);
- if (devn->cma_flag == 1)
+ if ((devn->cma_flag == 1) && dtvdd_devp->flg_cma_allc) {
dtmb_cma_release(devn);
+ dtvdd_devp->flg_cma_allc = false;
+ }
+ } else if (mode == AM_FE_OFDM_N || mode == AM_FE_ISDBT_N) {
+ if ((devn->cma_flag == 1) && dtvdd_devp->flg_cma_allc) {
+ dtmb_cma_release(devn);
+ dtvdd_devp->flg_cma_allc = false;
+ }
}
- #else
- if (dtvdd_devp->act_dtmb) {
- dtmb_poll_stop(); /*polling mode*/
- /* close arbit */
- demod_write_reg(DEMOD_TOP_REGC, 0x0);
- dtvdd_devp->act_dtmb = false;
- }
- if ((devn->cma_flag == 1) && dtvdd_devp->flg_cma_allc) {
- dtmb_cma_release(devn);
- dtvdd_devp->flg_cma_allc = false;
- }
- #endif
adc_set_pll_cntl(0, 0x04, NULL);
demod_mode_para = UNKNOWN;
dtvdemod_set_agc_pinmux(0);
msleep(200);
-
return 0;
-
}
/* when can't get ic_config by dts, use this*/
const struct meson_ddemod_data data_gxtvbb = {
static void aml_dtvdemod_shutdown(struct platform_device *pdev)
{
+ enum aml_fe_n_mode_t nmode = dtvdd_devp->n_mode;
+
pr_info("%s\n", __func__);
if (dtvdd_devp->state != DTVDEMOD_ST_IDLE) {
- leave_mode(0);
+ if (nmode != AM_FE_UNKNOWN_N)
+ leave_mode(nmode);
dtvdd_devp->state = DTVDEMOD_ST_IDLE;
}
}
+static int aml_dtvdemod_suspend(struct platform_device *pdev,
+ pm_message_t state)
+{
+ enum aml_fe_n_mode_t nmode = dtvdd_devp->n_mode;
+
+ PR_INFO("%s, mode = %d\n", __func__, nmode);
+
+ if (nmode != AM_FE_UNKNOWN_N)
+ leave_mode(nmode);
+
+ return 0;
+}
+
+static int aml_dtvdemod_resume(struct platform_device *pdev)
+{
+ PR_INFO("%s is called\n", __func__);
+ return 0;
+}
+
static struct platform_driver aml_dtvdemod_driver = {
.driver = {
.name = "aml_dtv_demod",
.shutdown = aml_dtvdemod_shutdown,
.probe = aml_dtvdemod_probe,
.remove = __exit_p(aml_dtvdemod_remove),
+#ifdef CONFIG_PM
+ .suspend = aml_dtvdemod_suspend,
+ .resume = aml_dtvdemod_resume,
+#endif
};
}
if (!support) {
+ #if 0
if (get_dtvpll_init_flag()) {
/**/
PR_INFO("delsys:%d is not support!\n", cdelsys);
dtvdd_devp->last_delsys = SYS_UNDEFINED;
dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
}
+ #endif
+ PR_INFO("delsys:%d is not support!\n", cdelsys);
return 0;
}
- PR_DBG("%s:l=%d,c=%d\n", __func__, ldelsys, cdelsys);
- dbg_delsys(cdelsys);
+ if (ldelsys <= END_SYS_DELIVERY && cdelsys <= END_SYS_DELIVERY) {
+ PR_DBG("%s:l=%s,c=%s\n", __func__,
+ name_fe_delivery_system[ldelsys],
+ name_fe_delivery_system[cdelsys]);
+ } else
+ PR_ERR("%s:last=%d,cur=%d\n", __func__, ldelsys, cdelsys);
switch (cdelsys) {
case SYS_DAB:
case SYS_TURBO:
case SYS_UNDEFINED:
+ return 0;
+
#ifdef CONFIG_AMLOGIC_DVB_COMPAT
case SYS_ANALOG:
-#endif
- mode = AM_FE_UNKNOWN_N;
if (get_dtvpll_init_flag()) {
- PR_INFO("delsys not support!%d=\n", cdelsys);
- leave_mode(mode);
+ PR_INFO("delsys not support : %d\n", cdelsys);
+ leave_mode(lmode);
+
if (fe->ops.tuner_ops.release)
fe->ops.tuner_ops.release(fe);
- dtvdd_devp->last_delsys = SYS_UNDEFINED;
- dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
}
+
return 0;
+#endif
}
if (mode != AM_FE_UNKNOWN_N) {
+ if (lmode != AM_FE_UNKNOWN_N) {
+ leave_mode(lmode);
+
+ if (fe->ops.tuner_ops.release)
+ fe->ops.tuner_ops.release(fe);
+ }
+
if (!enter_mode(mode)) {
PR_INFO("enter_mode failed,leave!\n");
leave_mode(mode);
+
if (fe->ops.tuner_ops.release)
- fe->ops.tuner_ops.release(fe);
- dtvdd_devp->last_delsys = SYS_UNDEFINED;
- dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
+ fe->ops.tuner_ops.release(fe);
return 0;
}
}
if (!get_dtvpll_init_flag()) {
PR_INFO("pll is not set!\n");
leave_mode(mode);
+
if (fe->ops.tuner_ops.release)
fe->ops.tuner_ops.release(fe);
- dtvdd_devp->last_delsys = SYS_UNDEFINED;
- dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
return 0;
}
dtvdd_devp->last_delsys = cdelsys;
-#if 1 /*ary add for test*/
PR_INFO("info type:%d", fe->ops.info.type);
+
if (mode == AM_FE_ATSC_N)
fe->ops.info.type = FE_ATSC;
else if (mode == AM_FE_OFDM_N)
else if (mode == AM_FE_ISDBT_N)
fe->ops.info.type = FE_ISDBT;
- fe->ops.tuner_ops.set_config(fe, NULL);
-
-#endif
+ if (fe->ops.tuner_ops.set_config)
+ fe->ops.tuner_ops.set_config(fe, NULL);
return 0;
}
if (get_dtvpll_init_flag()) {
PR_INFO("%s\n", __func__);
- leave_mode(nmode);
+ if (nmode != AM_FE_UNKNOWN_N)
+ leave_mode(nmode);
+
if (fe->ops.tuner_ops.release)
fe->ops.tuner_ops.release(fe);
- dtvdd_devp->last_delsys = SYS_UNDEFINED;
- dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
}
return 0;
}
return ret;
}
+
static int aml_dtvdm_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
enum aml_fe_n_mode_t nmode = dtvdd_devp->n_mode;
if (get_dtvpll_init_flag()) {
PR_INFO("%s\n", __func__);
- leave_mode(nmode);
+ if (nmode != AM_FE_UNKNOWN_N)
+ leave_mode(nmode);
+
if (fe->ops.tuner_ops.release)
fe->ops.tuner_ops.release(fe);
- dtvdd_devp->last_delsys = SYS_UNDEFINED;
- dtvdd_devp->n_mode = AM_FE_UNKNOWN_N;
}
}
atsc_write_reg(0x54d, 0x08);
atsc_write_reg(0x54c, 0x08);
atsc_write_reg(0x53b, 0x0e);
+ atsc_write_reg(0x912, 0x50);
}
ar_flag = 0;
}
--- /dev/null
+/*
+ * drivers/amlogic/media/dtv_demod/demod_dbg.c
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/debugfs.h>
+#include "demod_func.h"
+#include "amlfrontend.h"
+#include "demod_dbg.h"
+#include <linux/string.h>
+
+static void demod_dump_atsc_reg(struct seq_file *seq)
+{
+ unsigned int reg_start, reg_end;
+
+ if (is_ic_ver(IC_VER_TXLX)) {
+ reg_start = 0x0;
+ reg_end = 0xfff;
+
+ for (; reg_start <= reg_end; reg_start++) {
+ if (reg_start % 8 == 0)
+ seq_printf(seq, "\n[addr 0x%03x] ", reg_start);
+ seq_printf(seq, "0x%02x\t", atsc_read_reg(reg_start));
+ }
+
+ seq_puts(seq, "\n");
+ } else if (is_ic_ver(IC_VER_TL1)) {
+ }
+}
+
+static int seq_file_demod_dump_reg_show(struct seq_file *seq, void *v)
+{
+ if (demod_get_current_mode() == AML_ATSC)
+ demod_dump_atsc_reg(seq);
+ else if (demod_get_current_mode() == UNKNOWN)
+ seq_puts(seq, "current mode is unknown\n");
+
+ return 0;
+}
+
+#define DEFINE_SHOW_DEMOD(__name) \
+static int __name ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __name ## _show, inode->i_private); \
+} \
+ \
+static const struct file_operations __name ## _fops = { \
+ .owner = THIS_MODULE, \
+ .open = __name ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek, \
+ .release = single_release, \
+}
+
+DEFINE_SHOW_DEMOD(seq_file_demod_dump_reg);
+
+static struct demod_debugfs_files_t demod_debugfs_files[] = {
+ {"dump_reg", S_IFREG | 0644, &seq_file_demod_dump_reg_fops},
+};
+
+static int demod_dbg_dvbc_fast_search_open(struct inode *inode,
+ struct file *file)
+{
+ PR_INFO("Demod debug Open\n");
+ return 0;
+}
+
+static int demod_dbg_dvbc_fast_search_release(struct inode *inode,
+ struct file *file)
+{
+ PR_INFO("Demod debug Release\n");
+ return 0;
+}
+
+#define BUFFER_SIZE 100
+static ssize_t demod_dbg_dvbc_fast_search_show(struct file *file,
+ char __user *userbuf, size_t count, loff_t *ppos)
+{
+ char buf[BUFFER_SIZE];
+ unsigned int len;
+
+ len = snprintf(buf, BUFFER_SIZE, "channel fast search en : %d\n",
+ demod_dvbc_get_fast_search());
+ //len += snprintf(buf + len, BUFFER_SIZE - len, "");
+
+ return simple_read_from_buffer(userbuf, count, ppos, buf, len);
+}
+
+static ssize_t demod_dbg_dvbc_fast_search_store(struct file *file,
+ const char __user *userbuf, size_t count, loff_t *ppos)
+{
+ char buf[80];
+ char cmd[80], para[80];
+ int ret;
+
+ count = min_t(size_t, count, (sizeof(buf)-1));
+ if (copy_from_user(buf, userbuf, count))
+ return -EFAULT;
+
+ buf[count] = 0;
+
+ ret = sscanf(buf, "%s %s", cmd, para);
+
+ if (!strcmp(cmd, "fast_search")) {
+ PR_INFO("channel fast search: ");
+
+ if (!strcmp(para, "on")) {
+ PR_INFO("on\n");
+ demod_dvbc_set_fast_search(1);
+ } else if (!strcmp(para, "off")) {
+ PR_INFO("off\n");
+ demod_dvbc_set_fast_search(0);
+ }
+ }
+
+ return count;
+}
+
+static const struct file_operations demod_dbg_dvbc_fast_search_fops = {
+ .owner = THIS_MODULE,
+ .open = demod_dbg_dvbc_fast_search_open,
+ .release = demod_dbg_dvbc_fast_search_release,
+ //.unlocked_ioctl = aml_demod_ioctl,
+ .read = demod_dbg_dvbc_fast_search_show,
+ .write = demod_dbg_dvbc_fast_search_store,
+};
+
+void aml_demod_dbg_init(void)
+{
+ struct dentry *root_entry = dtvdd_devp->demod_root;
+ struct dentry *entry;
+ unsigned int i;
+
+ PR_INFO("%s\n", __func__);
+
+ root_entry = debugfs_create_dir("demod", NULL);
+ if (!root_entry) {
+ PR_INFO("Can't create debugfs dir frontend.\n");
+ return;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(demod_debugfs_files); i++) {
+ entry = debugfs_create_file(demod_debugfs_files[i].name,
+ demod_debugfs_files[i].mode,
+ root_entry, NULL,
+ demod_debugfs_files[i].fops);
+ if (!entry)
+ PR_INFO("Can't create debugfs seq file.\n");
+ }
+
+ entry = debugfs_create_file("dvbc_channel_fast", S_IFREG | 0644,
+ root_entry, NULL,
+ &demod_dbg_dvbc_fast_search_fops);
+ if (!entry)
+ PR_INFO("Can't create debugfs fast search.\n");
+
+}
+
+void aml_demod_dbg_exit(void)
+{
+ struct dentry *root_entry = dtvdd_devp->demod_root;
+
+ if (dtvdd_devp && root_entry)
+ debugfs_remove_recursive(root_entry);
+}
+
+
ret = -1;
}
/* if (ret != 0) return ret; */
- demod_sta->dvb_mode = 0;
+ //demod_sta->dvb_mode = 0;
demod_sta->ch_mode = mode;
/* 0:16, 1:32, 2:64, 3:128, 4:256 */
demod_sta->agc_mode = 1;
return 24000;
}
-void dvbc_reg_initial(struct aml_demod_sta *demod_sta)
+void demod_dvbc_set_qam(unsigned int qam)
{
- u32 clk_freq;
- u32 adc_freq;
- /*ary no use u8 tuner;*/
- u8 ch_mode;
- u8 agc_mode;
- u32 ch_freq;
- u16 ch_if;
- u16 ch_bw;
- u16 symb_rate;
- u32 phs_cfg;
- int afifo_ctr;
- int max_frq_off, tmp, adc_format;
-
- clk_freq = demod_sta->clk_freq; /* kHz */
- /*no use adc_freq = demod_sta->adc_freq;*/ /* kHz */
- if (is_ic_ver(IC_VER_TL1))
- adc_freq = demod_sta->adc_freq;
- else
- adc_freq = get_adc_freq();/*24000*/;
- adc_format = 1;
- /*ary no use tuner = demod_sta->tuner;*/
- ch_mode = demod_sta->ch_mode;
- agc_mode = demod_sta->agc_mode;
- ch_freq = demod_sta->ch_freq; /* kHz */
- ch_if = demod_sta->ch_if; /* kHz */
- ch_bw = demod_sta->ch_bw; /* kHz */
- symb_rate = demod_sta->symb_rate; /* k/sec */
- PR_DVBC("ch_if is %d, %d, %d, %d, %d %d\n",
- ch_if, ch_mode, ch_freq, ch_bw, symb_rate, adc_freq);
-/* ch_mode=4;*/
- /* disable irq */
- qam_write_reg(0x34, 0);
-
- /* reset */
- /*dvbc_reset(); */
- qam_write_reg(0x7, qam_read_reg(0x7) & ~(1 << 4));
- /* disable fsm_en */
- qam_write_reg(0x7, qam_read_reg(0x7) & ~(1 << 0));
- /* Sw disable demod */
- qam_write_reg(0x7, qam_read_reg(0x7) | (1 << 0));
- /* Sw enable demod */
- qam_write_reg(0x0, 0x0);
- /* QAM_STATUS */
- qam_write_reg(0x7, 0x00000f00);
/* QAM_GCTL0 */
- qam_write_reg(0x2, (qam_read_reg(0x2) & ~7) | (ch_mode & 7));
- /* qam mode */
+ qam_write_reg(0x2, (qam_read_reg(0x2) & ~7) | (qam & 7));
- switch (ch_mode) {
+ switch (qam) {
case 0: /*16qam*/
qam_write_reg(0x71, 0x000a2200);
qam_write_reg(0x94, 0x0c1a1a00);
break;
case 2:/*64qam*/
+ if (is_ic_ver(IC_VER_TL1)) {
+ qam_write_reg(0x9c, 0x2a132100);
+ qam_write_reg(0x57, 0x606060d);
+ }
break;
case 3:/*128qam*/
qam_write_reg(0x71, 0x0002c200);
qam_write_reg(0x93, 0x642a240c);
qam_write_reg(0x94, 0x0c262600);
break;
- case 4:
+ case 4://256 QAM
if (is_ic_ver(IC_VER_TL1)) {
qam_write_reg(0x9c, 0x2a232100);
qam_write_reg(0x57, 0x606040d);
}
break;
}
+}
+
+void dvbc_reg_initial(struct aml_demod_sta *demod_sta)
+{
+ u32 clk_freq;
+ u32 adc_freq;
+ /*ary no use u8 tuner;*/
+ u8 ch_mode;
+ u8 agc_mode;
+ u32 ch_freq;
+ u16 ch_if;
+ u16 ch_bw;
+ u16 symb_rate;
+ u32 phs_cfg;
+ int afifo_ctr;
+ int max_frq_off, tmp, adc_format;
+
+ clk_freq = demod_sta->clk_freq; /* kHz */
+ /*no use adc_freq = demod_sta->adc_freq;*/ /* kHz */
+ if (is_ic_ver(IC_VER_TL1))
+ adc_freq = demod_sta->adc_freq;
+ else
+ adc_freq = get_adc_freq();/*24000*/;
+ adc_format = 1;
+ /*ary no use tuner = demod_sta->tuner;*/
+ ch_mode = demod_sta->ch_mode;
+ agc_mode = demod_sta->agc_mode;
+ ch_freq = demod_sta->ch_freq; /* kHz */
+ ch_if = demod_sta->ch_if; /* kHz */
+ ch_bw = demod_sta->ch_bw; /* kHz */
+ symb_rate = demod_sta->symb_rate; /* k/sec */
+ PR_DVBC("ch_if is %d, %d, %d, %d, %d %d\n",
+ ch_if, ch_mode, ch_freq, ch_bw, symb_rate, adc_freq);
+/* ch_mode=4;*/
+ /* disable irq */
+ qam_write_reg(0x34, 0);
+
+ /* reset */
+ /*dvbc_reset(); */
+ qam_write_reg(0x7, qam_read_reg(0x7) & ~(1 << 4));
+ /* disable fsm_en */
+ qam_write_reg(0x7, qam_read_reg(0x7) & ~(1 << 0));
+ /* Sw disable demod */
+ qam_write_reg(0x7, qam_read_reg(0x7) | (1 << 0));
+
+ if (is_ic_ver(IC_VER_TL1))
+ if (agc_mode == 1) {
+ qam_write_reg(0x25,
+ qam_read_reg(0x25) & ~(0x1 << 10));
+ qam_write_reg(0x24,
+ qam_read_reg(0x24) | (0x1 << 17));
+ #if 0
+ qam_write_reg(0x3d,
+ qam_read_reg(0x3d) | 0xf);
+ #endif
+ }
+
+ /* Sw enable demod */
+ qam_write_reg(0x0, 0x0);
+ /* QAM_STATUS */
+ qam_write_reg(0x7, 0x00000f00);
+ demod_dvbc_set_qam(ch_mode);
/*dvbc_write_reg(QAM_BASE+0x00c, 0xfffffffe);*/
/* // adc_cnt, symb_cnt*/
qam_write_reg(0x3, 0xffff8ffe);
/* // configure min symbol_rate fb = 6.95M*/
qam_write_reg(0x12, (qam_read_reg(0x12) & ~(0xff<<8)) | 3400 * 256);
+ #if 0
if (is_ic_ver(IC_VER_TL1))
qam_write_reg(0x51, (qam_read_reg(0x51)&~(0x1<<28)));
+ #endif
/* configure min symbol_rate fb = 6.95M */
/*dvbc_write_reg(QAM_BASE+0x0c0, 0xffffff68); // threshold */
/* agc control */
/* dvbc_write_reg(QAM_BASE+0x094, 0x7f800d2c);// AGC_CTRL ALPS tuner */
/* dvbc_write_reg(QAM_BASE+0x094, 0x7f80292c); // Pilips Tuner */
- if ((agc_mode & 1) == 0)
- /* freeze if agc */
- qam_write_reg(0x25,
- qam_read_reg(0x25) | (0x1 << 10));
- if ((agc_mode & 2) == 0) {
- /* IF control */
- /*freeze rf agc */
- qam_write_reg(0x25,
- qam_read_reg(0x25) | (0x1 << 13));
+ if (!is_ic_ver(IC_VER_TL1)) {
+ if ((agc_mode & 1) == 0)
+ /* freeze if agc */
+ qam_write_reg(0x25,
+ qam_read_reg(0x25) | (0x1 << 10));
+ if ((agc_mode & 2) == 0) {
+ /* IF control */
+ /*freeze rf agc */
+ qam_write_reg(0x25,
+ qam_read_reg(0x25) | (0x1 << 13));
+ }
}
+
/*Maxlinear Tuner */
/*dvbc_write_reg(QAM_BASE+0x094, 0x7f80292d); */
/*dvbc_write_reg(QAM_BASE + 0x098, 0x9fcc8190);*/
/* enable irq */
qam_write_reg(0x34, 0x7fff << 3);
-#if 1
+
/*if (is_meson_txlx_cpu()) {*/
- if (is_ic_ver(IC_VER_TXLX)) {
+ if (is_ic_ver(IC_VER_TXLX) || (is_ic_ver(IC_VER_TL1))) {
/*my_tool setting j83b mode*/
qam_write_reg(0x7, 0x10f33);
- /*j83b filter para*/
- qam_write_reg(0x40, 0x3f010201);
- qam_write_reg(0x41, 0x0a003a3b);
- qam_write_reg(0x42, 0xe1ee030e);
- qam_write_reg(0x43, 0x002601f2);
- qam_write_reg(0x44, 0x009b006b);
- qam_write_reg(0x45, 0xb3a1905);
- qam_write_reg(0x46, 0x1c396e07);
- qam_write_reg(0x47, 0x3801cc08);
- qam_write_reg(0x48, 0x10800a2);
- qam_write_reg(0x12, 0x50e1000);
- qam_write_reg(0x30, 0x41f2f69);
- /*j83b_symbolrate(please see register doc)*/
- qam_write_reg(0x4d, 0x23d125f7);
- /*for phase noise case 256qam*/
- qam_write_reg(0x9c, 0x2a232100);
- qam_write_reg(0x57, 0x606040d);
- /*for phase noise case 64qam*/
- qam_write_reg(0x54, 0x606050d);
- qam_write_reg(0x52, 0x346dc);
+
+ if (demod_sta->dvb_mode == Gxtv_Atsc ||
+ is_ic_ver(IC_VER_TXLX)) {
+ /*j83b filter para*/
+ qam_write_reg(0x40, 0x3f010201);
+ qam_write_reg(0x41, 0x0a003a3b);
+ qam_write_reg(0x42, 0xe1ee030e);
+ qam_write_reg(0x43, 0x002601f2);
+ qam_write_reg(0x44, 0x009b006b);
+ qam_write_reg(0x45, 0xb3a1905);
+ qam_write_reg(0x46, 0x1c396e07);
+ qam_write_reg(0x47, 0x3801cc08);
+ qam_write_reg(0x48, 0x10800a2);
+ qam_write_reg(0x12, 0x50e1000);
+ qam_write_reg(0x30, 0x41f2f69);
+ /*j83b_symbolrate(please see register doc)*/
+ qam_write_reg(0x4d, 0x23d125f7);
+ /*for phase noise case 256qam*/
+ qam_write_reg(0x9c, 0x2a232100);
+ qam_write_reg(0x57, 0x606040d);
+ /*for phase noise case 64qam*/
+ qam_write_reg(0x54, 0x606050d);
+ qam_write_reg(0x52, 0x346dc);
+ }
+
qam_auto_scan(1);
}
-#endif
- if (!is_ic_ver(IC_VER_TL1)) {
- qam_write_reg(0x7, 0x10f23);
- qam_write_reg(0x3a, 0x0);
- qam_write_reg(0x7, 0x10f33);
- qam_write_reg(0x3a, 0x4);
- }
+
+ qam_write_reg(0x7, 0x10f23);
+ qam_write_reg(0x3a, 0x0);
+ qam_write_reg(0x7, 0x10f33);
+ qam_write_reg(0x3a, 0x4);
/*auto track*/
/* dvbc_set_auto_symtrack(); */
}
Gxtv_Atsc = 2,
Gxtv_Dtmb = 3,
};
+
+enum demod_md {
+ UNKNOWN = 0,
+ AML_DVBC,
+ AML_DTMB,
+ AML_DVBT,
+ AML_ATSC,
+ AML_J83B,
+ AML_ISDBT,
+ AML_DVBT2
+};
+
#define Adc_Clk_35M 35714 /* adc clk dvbc */
#define Demod_Clk_71M 71428 /* demod clk */
extern unsigned int dtmb_get_delay_clear(void);
extern unsigned int dtmb_is_have_check(void);
extern void dtmb_poll_v3(void);
+extern enum demod_md demod_get_current_mode(void);
+extern unsigned int demod_dvbc_get_fast_search(void);
+extern void demod_dvbc_set_fast_search(unsigned int en);
#endif
--- /dev/null
+/*
+ * drivers/amlogic/media/dtv_demod/include/demod_dbg.h
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+struct demod_debugfs_files_t {
+ const char *name;
+ const umode_t mode;
+ const struct file_operations *fops;
+};
+
+extern void aml_demod_dbg_init(void);
+extern void aml_demod_dbg_exit(void);
int dtmb_get_power_strength(int agc_gain);
-
-
+extern int dvbc_get_power_strength(int agc_gain, int tuner_strength);
+extern int j83b_get_power_strength(int agc_gain, int tuner_strength);
+extern int atsc_get_power_strength(int agc_gain, int tuner_strength);
/* dvbt */
int dvbt_set_ch(struct aml_demod_sta *demod_sta,
/*txlx*/
extern void dvbc_reg_initial(struct aml_demod_sta *demod_sta);
+extern void demod_dvbc_set_qam(unsigned int qam);
extern void dvbc_init_reg_ext(void);
extern u32 dvbc_get_ch_sts(void);
extern u32 dvbc_get_qam_mode(void);
/*void ary_test(void);*/
enum aml_fe_n_mode_t { /*same as aml_fe_mode_t in aml_fe.h*/
- AM_FE_UNKNOWN_N = 0,
- AM_FE_QPSK_N = 1,
- AM_FE_QAM_N = 2,
- AM_FE_OFDM_N = 4,
- AM_FE_ATSC_N = 8,
+ AM_FE_UNKNOWN_N,
+ AM_FE_QPSK_N,
+ AM_FE_QAM_N,
+ AM_FE_OFDM_N,
+ AM_FE_ATSC_N,
/*AM_FE_ANALOG = 16,*/
- AM_FE_DTMB_N = 32,
- AM_FE_ISDBT_N = 64
+ AM_FE_DTMB_N,
+ AM_FE_ISDBT_N,
+ AM_FE_NUM,
};
-
/*----------------------------------*/
struct aml_exp_func {
- int (*leave_mode)(int mode);
+ int (*leave_mode)(enum aml_fe_n_mode_t mode);
};
#endif /*__DEPEND_H__*/
return strength;
}
+/*tuner has 3 stage gain control, only last is controlled by demod agc*/
+static int dvbc_R842[20] = {
+ /*-90,-89,-88, -87, -86 , -85 , -84 , -83 , -82 , -81dbm*/
+ 1200, 1180, 1150, 1130, 1100, 1065, 1040, 1030, 1000, 970
+};
+
+int dvbc_get_power_strength(int agc_gain, int tuner_strength)
+{
+ int strength;
+ int i;
+
+ for (i = 0; i < sizeof(dvbc_R842)/sizeof(int); i++)
+ if (agc_gain >= dvbc_R842[i])
+ break;
+
+ if (agc_gain >= 970)
+ strength = -90+i*1;
+ else
+ strength = tuner_strength + 22;
+
+ return strength;
+}
+
+static int j83b_R842[10] = {
+ /*-90,-89,-88, -87, -86 , -85 , -84 , -83 , -82 , -81dbm*/
+ 1140, 1110, 1080, 1060, 1030, 1000, 980, 1000, 970, 1000,
+ /*-80,-79,-78, -77, -76 , -75 , -74 , -73 , -72 , -71dbm*/
+ /*970 , 980, 960, 970, 950, 960, 970, 980, 960, 970*/
+};
+
+int j83b_get_power_strength(int agc_gain, int tuner_strength)
+{
+ int strength;
+ int i;
+
+ for (i = 0; i < sizeof(j83b_R842)/sizeof(int); i++)
+ if (agc_gain >= j83b_R842[i])
+ break;
+
+ if (agc_gain >= 970)
+ strength = -90+i*1;
+ else
+ strength = tuner_strength + 18;
+
+ return strength;
+}
+
+static int atsc_R842[6] = {
+ /*-90,-89,-88, -87, -86 , -85 , -84 , -83 , -82 , -81dbm*/
+ 2160, 2110, 2060, 2010, 1960, 1910/*, 1870, 1910, 1860, 1900*/
+};
+
+int atsc_get_power_strength(int agc_gain, int tuner_strength)
+{
+ int strength;
+ int i;
+
+ for (i = 0; i < sizeof(atsc_R842)/sizeof(int); i++)
+ if (agc_gain >= atsc_R842[i])
+ break;
+
+ if (agc_gain >= 1910)
+ strength = -90+i*1;
+ else
+ strength = tuner_strength;
+
+ return strength;
+}
vf_local_init();
vf_light_unreg_provider(&ppmgr_vf_prov);
msleep(30);
- vf_reg_provider(&ppmgr_vf_prov);
+ vf_light_reg_provider(&ppmgr_vf_prov);
ppmgr_blocking = false;
up(&thread_sem);
PPMGRVPP_WARN("ppmgr rebuild from light-unregister\n");
static int xc5000_set_tv_freq(struct dvb_frontend *fe)
{
struct xc5000_priv *priv = fe->tuner_priv;
- u16 pll_lock_status;
+ u16 pll_lock_status = 0;
int ret;
tune_channel:
#define DECODER_ERROR_MASK (0xffff<<16)
+
+enum E_ASPECT_RATIO {
+ ASPECT_RATIO_4_3,
+ ASPECT_RATIO_16_9,
+ ASPECT_UNDEFINED = 255
+};
+
struct vdec_status {
unsigned int width;
unsigned int height;
unsigned int fps;
unsigned int error_count;
unsigned int status;
+ enum E_ASPECT_RATIO euAspectRatio;
};
struct vdec_info {
unsigned long long total_data;
unsigned int samp_cnt;
unsigned int offset;
+ unsigned int ratio_control;
char reserved[32];
};
extern int vf_notify_provider_by_name(const char *provider_name,
int event_type, void *data);
+void vf_light_reg_provider(struct vframe_provider_s *prov);
void vf_light_unreg_provider(struct vframe_provider_s *prov);
void vf_ext_light_unreg_provider(struct vframe_provider_s *prov);
struct vframe_provider_s *vf_get_provider(const char *name);
struct timespec new_ts;
struct timezone new_tz;
+#ifdef CONFIG_AMLOGIC_MODIFY
+ new_ts.tv_sec = 0;
+ new_ts.tv_nsec = 0;
+#endif
+
if (tv) {
if (compat_get_timeval(&user_tv, tv))
return -EFAULT;
{
unsigned long long now;
+#ifdef CONFIG_AMLOGIC_MODIFY
+ now = 0;
+#endif
+
WARN_ON_ONCE(clock_idx == CPUCLOCK_SCHED);
cpu_timer_sample_group(clock_idx, tsk, &now);
struct timespec new_ts;
struct timezone new_tz;
+#ifdef CONFIG_AMLOGIC_MODIFY
+ new_ts.tv_sec = 0;
+ new_ts.tv_nsec = 0;
+#endif
+
if (tv) {
if (copy_from_user(&user_tv, tv, sizeof(*tv)))
return -EFAULT;
struct hlist_head *list;
struct path path = { NULL, NULL };
+#ifdef CONFIG_AMLOGIC_MODIFY
+ hash = 0;
+#endif
+
err = -EINVAL;
if (addr_len < offsetofend(struct sockaddr_un, sun_family) ||
sunaddr->sun_family != AF_UNIX)
projects / platform / kernel / linux-amlogic.git / commitdiff