arm64: dts: exynos: Add SysMMU nodes for Exynos850
authorSam Protsenko <semen.protsenko@linaro.org>
Tue, 9 Aug 2022 11:33:23 +0000 (14:33 +0300)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 23 Aug 2022 07:21:35 +0000 (10:21 +0300)
Add all SysMMU nodes to Exynos850 SoC device tree.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-10-semen.protsenko@linaro.org
arch/arm64/boot/dts/exynos/exynos850.dtsi

index 8e78b50..c61441f 100644 (file)
                        status = "disabled";
                };
 
+               sysmmu_mfcmscl: sysmmu@12c50000 {
+                       compatible = "samsung,exynos-sysmmu";
+                       reg = <0x12c50000 0x9000>;
+                       interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "sysmmu";
+                       clocks = <&cmu_mfcmscl CLK_GOUT_MFCMSCL_SYSMMU_CLK>;
+                       #iommu-cells = <0>;
+               };
+
+               sysmmu_dpu: sysmmu@130c0000 {
+                       compatible = "samsung,exynos-sysmmu";
+                       reg = <0x130c0000 0x9000>;
+                       interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "sysmmu";
+                       clocks = <&cmu_dpu CLK_GOUT_DPU_SMMU_CLK>;
+                       #iommu-cells = <0>;
+               };
+
+               sysmmu_is0: sysmmu@14550000 {
+                       compatible = "samsung,exynos-sysmmu";
+                       reg = <0x14550000 0x9000>;
+                       interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "sysmmu";
+                       clocks = <&cmu_is CLK_GOUT_IS_SYSMMU_IS0_CLK>;
+                       #iommu-cells = <0>;
+               };
+
+               sysmmu_is1: sysmmu@14570000 {
+                       compatible = "samsung,exynos-sysmmu";
+                       reg = <0x14570000 0x9000>;
+                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "sysmmu";
+                       clocks = <&cmu_is CLK_GOUT_IS_SYSMMU_IS1_CLK>;
+                       #iommu-cells = <0>;
+               };
+
+               sysmmu_aud: sysmmu@14850000 {
+                       compatible = "samsung,exynos-sysmmu";
+                       reg = <0x14850000 0x9000>;
+                       interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-names = "sysmmu";
+                       clocks = <&cmu_aud CLK_GOUT_AUD_SYSMMU_CLK>;
+                       #iommu-cells = <0>;
+               };
+
                sysreg_peri: syscon@10020000 {
                        compatible = "samsung,exynos850-sysreg", "syscon";
                        reg = <0x10020000 0x10000>;