bnxt_en: Event handler for PPS events
authorPavan Chebbi <pavan.chebbi@broadcom.com>
Wed, 28 Jul 2021 18:11:44 +0000 (14:11 -0400)
committerDavid S. Miller <davem@davemloft.net>
Wed, 28 Jul 2021 19:23:33 +0000 (20:23 +0100)
Once the PPS pins are configured, the FW can report
PPS values using ASYNC event. This patch adds the
ASYNC event handler and subsequent reporting of the
events to kernel.

Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnxt/bnxt.c
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h

index 50b8aef..b2da2a3 100644 (file)
@@ -277,6 +277,7 @@ static const u16 bnxt_async_events_arr[] = {
        ASYNC_EVENT_CMPL_EVENT_ID_DEBUG_NOTIFICATION,
        ASYNC_EVENT_CMPL_EVENT_ID_RING_MONITOR_MSG,
        ASYNC_EVENT_CMPL_EVENT_ID_ECHO_REQUEST,
+       ASYNC_EVENT_CMPL_EVENT_ID_PPS_TIMESTAMP,
 };
 
 static struct workqueue_struct *bnxt_pf_wq;
@@ -2202,6 +2203,10 @@ static int bnxt_async_event_process(struct bnxt *bp,
                }
                goto async_event_process_exit;
        }
+       case ASYNC_EVENT_CMPL_EVENT_ID_PPS_TIMESTAMP: {
+               bnxt_ptp_pps_event(bp, data1, data2);
+               goto async_event_process_exit;
+       }
        default:
                goto async_event_process_exit;
        }
index c389a2a..e33e311 100644 (file)
@@ -155,6 +155,33 @@ static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb)
        return rc;
 }
 
+void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2)
+{
+       struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
+       struct ptp_clock_event event;
+       u64 ns, pps_ts;
+
+       pps_ts = EVENT_PPS_TS(data2, data1);
+       spin_lock_bh(&ptp->ptp_lock);
+       ns = timecounter_cyc2time(&ptp->tc, pps_ts);
+       spin_unlock_bh(&ptp->ptp_lock);
+
+       switch (EVENT_DATA2_PPS_EVENT_TYPE(data2)) {
+       case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_INTERNAL:
+               event.pps_times.ts_real = ns_to_timespec64(ns);
+               event.type = PTP_CLOCK_PPSUSR;
+               event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
+               break;
+       case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_EXTERNAL:
+               event.timestamp = ns;
+               event.type = PTP_CLOCK_EXTTS;
+               event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
+               break;
+       }
+
+       ptp_clock_event(bp->ptp_cfg->ptp_clock, &event);
+}
+
 static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
 {
        struct hwrm_func_ptp_pin_cfg_input req = {0};
index 84f2b06..8892334 100644 (file)
@@ -29,6 +29,31 @@ struct pps_pin {
 
 #define TSIO_PIN_VALID(pin) ((pin) < (BNXT_MAX_TSIO_PINS))
 
+#define EVENT_DATA2_PPS_EVENT_TYPE(data2)                              \
+       ((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE)
+
+#define EVENT_DATA2_PPS_PIN_NUM(data2)                                 \
+       (((data2) &                                                     \
+         ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK) >>\
+        ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT)
+
+#define BNXT_DATA2_UPPER_MSK                                           \
+       ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK
+
+#define BNXT_DATA2_UPPER_SFT                                           \
+       (32 -                                                           \
+        ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT)
+
+#define BNXT_DATA1_LOWER_MSK                                           \
+       ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK
+
+#define BNXT_DATA1_LOWER_SFT                                           \
+         ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT
+
+#define EVENT_PPS_TS(data2, data1)                                     \
+       (((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\
+        (((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT))
+
 #define BNXT_PPS_PIN_DISABLE   0
 #define BNXT_PPS_PIN_ENABLE    1
 #define BNXT_PPS_PIN_NONE      0
@@ -97,6 +122,7 @@ do {                                         \
 #endif
 
 int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id);
+void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
 void bnxt_ptp_reapply_pps(struct bnxt *bp);
 int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);
 int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);