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Fix left shift overflow UB in PPC backend on LLP64 platforms
author
Reid Kleckner
<rnk@google.com>
Sun, 20 Dec 2020 01:45:49 +0000
(17:45 -0800)
committer
Reid Kleckner
<rnk@google.com>
Sun, 20 Dec 2020 01:46:09 +0000
(17:46 -0800)
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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diff --git
a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 3d9a54305cc604dbdc54b92341e311779c4b69ed..18e35f5a0850f65ef0cae0a2511243b314e2e5b3 100644
(file)
--- a/
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@
-9189,7
+9189,7
@@
static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT,
EVT ReqVT = VT != MVT::Other ? VT : VTys[SplatSize-1];
// For a splat with all ones, turn it to vspltisb 0xFF to canonicalize.
- if (Val == ((1LU << (SplatSize * 8)) - 1)) {
+ if (Val == ((1L
L
U << (SplatSize * 8)) - 1)) {
SplatSize = 1;
Val = 0xFF;
}