[DMA] : Add standard system clock tree & reset API
authorcurry.zhang <curry.zhang@starfivetech.com>
Sun, 24 Apr 2022 03:27:41 +0000 (20:27 -0700)
committercurry.zhang <curry.zhang@starfivetech.com>
Sun, 24 Apr 2022 03:27:41 +0000 (20:27 -0700)
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c [changed mode: 0644->0755]
drivers/dma/dw-axi-dmac/dw-axi-dmac.h [changed mode: 0644->0755]

index 8595cc3..bfe0dd8 100644 (file)
                dma: dma-controller@16050000 {
                        compatible = "starfive,axi-dma";
                        reg = <0x0 0x16050000 0x0 0x10000>;
-                       clocks = <&stg_axiahb_clk>, <&stg_apbclk>;
+                       clocks = <&clkgen JH7110_DMA1P_CLK_AXI>,
+                               <&clkgen JH7110_DMA1P_CLK_AHB>;
                        clock-names = "core-clk", "cfgr-clk";
+                       resets = <&rstgen RSTN_U0_DW_DMA1P_AXI>,
+                               <&rstgen RSTN_U0_DW_DMA1P_AHB>;
+                       reset-names = "rst_axi",
+                               "rst_ahb";
                        interrupts = <73>;
                        #dma-cells = <2>;
                        dma-channels = <4>;
old mode 100644 (file)
new mode 100755 (executable)
index 9e9953e..4029bb5
@@ -27,6 +27,7 @@
 #include <linux/property.h>
 #include <linux/slab.h>
 #include <linux/types.h>
+#include <linux/reset.h>
 
 #include "dw-axi-dmac.h"
 #include "../dmaengine.h"
@@ -1492,6 +1493,20 @@ static int dw_probe(struct platform_device *pdev)
        if (IS_ERR(chip->cfgr_clk))
                return PTR_ERR(chip->cfgr_clk);
 
+       chip->rst_core = devm_reset_control_get_exclusive(&pdev->dev, "rst_axi");
+       if (IS_ERR(chip->rst_core)) {
+               dev_err(&pdev->dev, "%s: failed to get rst_core reset control\n", __func__);
+                return PTR_ERR(chip->rst_core);
+   }
+       chip->rst_cfgr = devm_reset_control_get_exclusive(&pdev->dev, "rst_ahb");
+       if (IS_ERR(chip->rst_cfgr)) {
+               dev_err(&pdev->dev, "%s: failed to get rst_cfgr reset control\n", __func__);
+                return PTR_ERR(chip->rst_cfgr);
+    }
+
+       reset_control_deassert(chip->rst_core);
+       reset_control_deassert(chip->rst_cfgr);
+
        ret = parse_device_properties(chip);
        if (ret)
                return ret;
old mode 100644 (file)
new mode 100755 (executable)
index 7ba95ee..2bc9ecf
@@ -100,6 +100,8 @@ struct axi_dma_chip {
        struct clk              *cfgr_clk;
        struct dw_axi_dma       *dw;
        struct dma_multi        multi;
+       struct reset_control    *rst_core;
+       struct reset_control    *rst_cfgr;
 };
 
 /* LLI == Linked List Item */