}
s.info.disassembler_options = (char *)"any";
s.info.print_insn = print_insn_ppc;
-#elif defined(TARGET_ALPHA)
- s.info.mach = bfd_mach_alpha_ev6;
- s.info.print_insn = print_insn_alpha;
#endif
if (s.info.print_insn == NULL) {
s.info.print_insn = print_insn_od_target;
s.info.mach = bfd_mach_i386_i386;
}
s.info.print_insn = print_insn_i386;
-#elif defined(TARGET_ALPHA)
- s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_PPC)
if (flags & 0xFFFF) {
/* If we have a precise definition of the instruction set, use it. */
| CPU_INTERRUPT_MCHK);
}
+static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
+{
+ info->mach = bfd_mach_alpha_ev6;
+ info->print_insn = print_insn_alpha;
+}
+
static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_alpha_cpu;
#endif
+ cc->disas_set_info = alpha_cpu_disas_set_info;
+
cc->gdb_num_core_regs = 67;
/*