KVM: PPC: Book3S HV P9: Move xive vcpu context management into kvmhv_p9_guest_entry

Move the xive management up so the low level register switching can be
pushed further down in a later patch. XIVE MMIO CI operations can run in
higher level code with machine checks, tracing, etc., available.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210528090752.3542186-12-npiggin@gmail.com

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index d82ff7f..bb326cf 100644 (file)
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -3558,15 +3558,11 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
         */
        mtspr(SPRN_HDEC, hdec);
 
-       kvmppc_xive_push_vcpu(vcpu);
-
        mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0);
        mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);
 
        trap = __kvmhv_vcpu_entry_p9(vcpu);
 
-       kvmppc_xive_pull_vcpu(vcpu);
-
        /* Advance host PURR/SPURR by the amount used by guest */
        purr = mfspr(SPRN_PURR);
        spurr = mfspr(SPRN_SPURR);
@@ -3764,7 +3760,10 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
                        trap = 0;
                }
        } else {
+               kvmppc_xive_push_vcpu(vcpu);
                trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
+               kvmppc_xive_pull_vcpu(vcpu);
+
        }
 
        vcpu->arch.slb_max = 0;