nir: add nir_intrinsic_load_ring_attr_{offset}_amd
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 11 May 2022 13:14:36 +0000 (15:14 +0200)
committerMarge Bot <emma+marge@anholt.net>
Thu, 20 Oct 2022 15:59:44 +0000 (15:59 +0000)
These intrinsics will be used to lower NGG attributes to memory on
GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19173>

src/compiler/nir/nir_divergence_analysis.c
src/compiler/nir/nir_intrinsics.py

index 2f239a7..4b95b13 100644 (file)
@@ -159,6 +159,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
    case nir_intrinsic_load_task_ring_entry_amd:
    case nir_intrinsic_load_task_ib_addr:
    case nir_intrinsic_load_task_ib_stride:
+   case nir_intrinsic_load_ring_attr_amd:
+   case nir_intrinsic_load_ring_attr_offset_amd:
    case nir_intrinsic_load_sample_positions_pan:
    case nir_intrinsic_load_workgroup_num_input_vertices_amd:
    case nir_intrinsic_load_workgroup_num_input_primitives_amd:
index 2b7b238..dd3dae2 100644 (file)
@@ -1327,6 +1327,9 @@ system_value("task_ring_entry_amd", 1)
 # Pointer into the draw and payload rings
 system_value("task_ib_addr", 2)
 system_value("task_ib_stride", 1)
+# Descriptor where NGG attributes are stored on GFX11.
+system_value("ring_attr_amd", 4)
+system_value("ring_attr_offset_amd", 1)
 
 # Number of patches processed by each TCS workgroup
 system_value("tcs_num_patches_amd", 1)