intel/fs: Dump IR for pre-RA scheduler modes in DEBUG_OPTIMIZER
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 15 Aug 2023 08:15:26 +0000 (01:15 -0700)
committerMarge Bot <emma+marge@anholt.net>
Wed, 23 Aug 2023 21:34:38 +0000 (21:34 +0000)
This lets us more easily compare and contrast the various scheduling
options that the compiler considered.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24707>

src/intel/compiler/brw_fs.cpp

index 80ac66c..862904f 100644 (file)
@@ -6800,7 +6800,7 @@ fs_visitor::allocate_registers(bool allow_spilling)
    if (needs_register_pressure)
       shader_stats.max_register_pressure = compute_max_register_pressure();
 
-   debug_optimizer(nir, "pre_register_allocate", 99, 99);
+   debug_optimizer(nir, "pre_register_allocate", 90, 90);
 
    bool spill_all = allow_spilling && INTEL_DEBUG(DEBUG_SPILL_FS);
 
@@ -6821,6 +6821,8 @@ fs_visitor::allocate_registers(bool allow_spilling)
       schedule_instructions(sched_mode);
       this->shader_stats.scheduler_mode = scheduler_mode_name[sched_mode];
 
+      debug_optimizer(nir, shader_stats.scheduler_mode, 95, i);
+
       if (0) {
          assign_regs_trivial();
          allocated = true;