clk: starfive: jh7110-sys: Set vdec_main and vdec_jpg as CLK_IGNORE_UNUSED 57/299657/1
authorSeung-Woo Kim <sw0312.kim@samsung.com>
Fri, 6 Oct 2023 07:00:09 +0000 (16:00 +0900)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Fri, 6 Oct 2023 07:00:34 +0000 (16:00 +0900)
To support video codec, set vdec_main and vdec_jpg clocks as
CLK_IGNORE_UNUSED.

Change-Id: I7df722cc20956d4cff68f856d0c7bf8c73fa36e7
Ref: https://github.com/starfive-tech/linux/blob/JH7110_VisionFive2_6.1.y_devel/drivers/clk/starfive/clk-starfive-jh7110-sys.c
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
drivers/clk/starfive/clk-starfive-jh7110-sys.c

index adeca21..f69db17 100644 (file)
@@ -139,8 +139,8 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = {
        JH71X0_GDIV(JH7110_SYSCLK_WAVE511_BPU, "wave511_bpu", 0, 7, JH7110_SYSCLK_BUS_ROOT),
        JH71X0_GDIV(JH7110_SYSCLK_WAVE511_VCE, "wave511_vce", 0, 7, JH7110_SYSCLK_PLL0_OUT),
        JH71X0_GATE(JH7110_SYSCLK_WAVE511_APB, "wave511_apb", 0, JH7110_SYSCLK_APB_BUS),
-       JH71X0_GATE(JH7110_SYSCLK_VDEC_JPG, "vdec_jpg", 0, JH7110_SYSCLK_JPEGC_AXI),
-       JH71X0_GATE(JH7110_SYSCLK_VDEC_MAIN, "vdec_main", 0, JH7110_SYSCLK_VDEC_AXI),
+       JH71X0_GATE(JH7110_SYSCLK_VDEC_JPG, "vdec_jpg", CLK_IGNORE_UNUSED, JH7110_SYSCLK_JPEGC_AXI),
+       JH71X0_GATE(JH7110_SYSCLK_VDEC_MAIN, "vdec_main", CLK_IGNORE_UNUSED, JH7110_SYSCLK_VDEC_AXI),
        JH71X0_GATE(JH7110_SYSCLK_NOC_BUS_VDEC_AXI, "noc_bus_vdec_axi", 0, JH7110_SYSCLK_VDEC_AXI),
        /* venc */
        JH71X0__DIV(JH7110_SYSCLK_VENC_AXI, "venc_axi", 15, JH7110_SYSCLK_PLL2_OUT),