RISC-V: hwprobe: There can only be one first
authorAndrew Jones <ajones@ventanamicro.com>
Wed, 26 Apr 2023 14:13:32 +0000 (16:13 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 26 Apr 2023 15:58:33 +0000 (08:58 -0700)
Only capture the first cpu_id in order for the comparison
below to be of any use.

Fixes: ea3de9ce8aa2 ("RISC-V: Add a syscall for HW probing")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20230426141333.10063-2-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/sys_riscv.c

index 849b417..c569dac 100644 (file)
@@ -103,8 +103,10 @@ static void hwprobe_arch_id(struct riscv_hwprobe *pair,
                        break;
                }
 
-               if (first)
+               if (first) {
                        id = cpu_id;
+                       first = false;
+               }
 
                /*
                 * If there's a mismatch for the given set, return -1 in the