[CSKY] Fix the testcase error due to the verifyInstructionPredicates

- Test cases for arch only has 16-bit instruction such as ck801/ck802 need
compile with -mattr=+btst16
- Fix the GPR copy instruction with MOV16 for 16-bit only arch.

diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp b/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
index d490b385ac16d210985d105f90e90a291a306243..0bf739452fd2b2b6f4ae5ed62aaa12d82dbb9c9e 100644 (file)
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
@@ -518,7 +518,7 @@ void CSKYInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
 
   unsigned Opcode = 0;
   if (CSKY::GPRRegClass.contains(DestReg, SrcReg))
-    Opcode = CSKY::MOV32;
+    Opcode = STI.hasE2() ? CSKY::MOV32 : CSKY::MOV16;
   else if (v2sf && CSKY::sFPR32RegClass.contains(DestReg, SrcReg))
     Opcode = CSKY::FMOV_S;
   else if (v3sf && CSKY::FPR32RegClass.contains(DestReg, SrcReg))

diff --git a/llvm/test/CodeGen/CSKY/base-i.ll b/llvm/test/CodeGen/CSKY/base-i.ll
index dcae93e66394682f2eee69a390df3aab3c4dd2aa..3848053bde079debdf9ed451eef9294f43c05045 100644 (file)
--- a/llvm/test/CodeGen/CSKY/base-i.ll
+++ b/llvm/test/CodeGen/CSKY/base-i.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+btst16 < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
 
 define i32 @addRR(i32 %x, i32 %y) {
 ; CHECK-LABEL: addRR:

diff --git a/llvm/test/CodeGen/CSKY/br.ll b/llvm/test/CodeGen/CSKY/br.ll
index a55299993e295785e7e1e39e5c9c0a265167fe87..688b40128a2a3a3c0e07cb0f8e5ce910ab0747b4 100644 (file)
--- a/llvm/test/CodeGen/CSKY/br.ll
+++ b/llvm/test/CodeGen/CSKY/br.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+btst16 | FileCheck %s --check-prefix=GENERIC
 
 ;EQ
 define i32 @brRR_eq(i32 %x, i32 %y) {

diff --git a/llvm/test/CodeGen/CSKY/call-16bit.ll b/llvm/test/CodeGen/CSKY/call-16bit.ll
index 23d7c97acac81eab4d63ee343f44daddab4302f1..e7f169a9df12090fb1ef2387c2c988bb658302d7 100644 (file)
--- a/llvm/test/CodeGen/CSKY/call-16bit.ll
+++ b/llvm/test/CodeGen/CSKY/call-16bit.ll
@@ -1,7 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  | FileCheck %s
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=small  | FileCheck %s --check-prefix=CHECK-PIC-SMALL
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -relocation-model=pic -code-model=large  | FileCheck %s --check-prefix=CHECK-PIC-LARGE
 
 @p_fun = global void (i32, i32)* @bar, align 8
 
@@ -29,69 +27,6 @@ define void @foo(i32 %a, i32* %ptr){
 ; CHECK-NEXT:  .LCPI0_0:
 ; CHECK-NEXT:    .long bar
 ;
-; CHECK-PIC-SMALL-LABEL: foo:
-; CHECK-PIC-SMALL:       # %bb.0: # %entry
-; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 8
-; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
-; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
-; CHECK-PIC-SMALL-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
-; CHECK-PIC-SMALL-NEXT:    .cfi_offset lr, -8
-; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 4
-; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 12
-; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI0_0]
-; CHECK-PIC-SMALL-NEXT:    mov32 a2, rgb
-; CHECK-PIC-SMALL-NEXT:    ld16.w a1, (a1, 0)
-; CHECK-PIC-SMALL-NEXT:    lrw32 a3, [.LCPI0_1]
-; CHECK-PIC-SMALL-NEXT:    addu16 a2, a2, a3
-; CHECK-PIC-SMALL-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-SMALL-NEXT:    jsr16 a2
-; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 4
-; CHECK-PIC-SMALL-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
-; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
-; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 8
-; CHECK-PIC-SMALL-NEXT:    rts16
-; CHECK-PIC-SMALL-NEXT:    .p2align 1
-; CHECK-PIC-SMALL-NEXT:  # %bb.1:
-; CHECK-PIC-SMALL-NEXT:    .p2align 2
-; CHECK-PIC-SMALL-NEXT:  .LCPI0_0:
-; CHECK-PIC-SMALL-NEXT:    .long _GLOBAL_OFFSET_TABLE_
-; CHECK-PIC-SMALL-NEXT:  .LCPI0_1:
-; CHECK-PIC-SMALL-NEXT:    .long bar@PLT
-;
-; CHECK-PIC-LARGE-LABEL: foo:
-; CHECK-PIC-LARGE:       # %bb.0: # %entry
-; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 8
-; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
-; CHECK-PIC-LARGE-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
-; CHECK-PIC-LARGE-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CHECK-PIC-LARGE-NEXT:    .cfi_offset rgb, -4
-; CHECK-PIC-LARGE-NEXT:    .cfi_offset lr, -8
-; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 4
-; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 12
-; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI0_0]
-; CHECK-PIC-LARGE-NEXT:    mov32 a2, rgb
-; CHECK-PIC-LARGE-NEXT:    ld16.w a1, (a1, 0)
-; CHECK-PIC-LARGE-NEXT:    lrw32 a3, [.LCPI0_1]
-; CHECK-PIC-LARGE-NEXT:    addu16 a2, a2, a3
-; CHECK-PIC-LARGE-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-LARGE-NEXT:    jsr16 a2
-; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 4
-; CHECK-PIC-LARGE-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
-; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
-; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 8
-; CHECK-PIC-LARGE-NEXT:    rts16
-; CHECK-PIC-LARGE-NEXT:    .p2align 1
-; CHECK-PIC-LARGE-NEXT:  # %bb.1:
-; CHECK-PIC-LARGE-NEXT:    .p2align 2
-; CHECK-PIC-LARGE-NEXT:  .LCPI0_0:
-; CHECK-PIC-LARGE-NEXT:    .long _GLOBAL_OFFSET_TABLE_
-; CHECK-PIC-LARGE-NEXT:  .LCPI0_1:
-; CHECK-PIC-LARGE-NEXT:    .long bar@PLT
-; CHECK-PIC-LABEL: foo:
-; CHECK-PIC:       # %bb.0: # %entry
-; CHECK-PIC-NEXT:    ld32.w a1, a1, 0
-; CHECK-PIC-NEXT:    br32 bar
 entry:
   %0 = load i32, i32* %ptr
   tail call void (i32, i32) @bar(i32 %a, i32 %0)
@@ -121,75 +56,6 @@ define void @foo_indirect(i32 %a, i32* %ptr) {
 ; CHECK-NEXT:  .LCPI1_0:
 ; CHECK-NEXT:    .long p_fun
 ;
-; CHECK-PIC-SMALL-LABEL: foo_indirect:
-; CHECK-PIC-SMALL:       # %bb.0: # %entry
-; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 8
-; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 8
-; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
-; CHECK-PIC-SMALL-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
-; CHECK-PIC-SMALL-NEXT:    .cfi_offset lr, -8
-; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 4
-; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 12
-; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI1_0]
-; CHECK-PIC-SMALL-NEXT:    mov32 a2, rgb
-; CHECK-PIC-SMALL-NEXT:    lrw32 a3, [.LCPI1_1]
-; CHECK-PIC-SMALL-NEXT:    addu16 a2, a2, a3
-; CHECK-PIC-SMALL-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-SMALL-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-SMALL-NEXT:    ld16.w a1, (a1, 0)
-; CHECK-PIC-SMALL-NEXT:    jsr16 a2
-; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 4
-; CHECK-PIC-SMALL-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
-; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
-; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 8
-; CHECK-PIC-SMALL-NEXT:    rts16
-; CHECK-PIC-SMALL-NEXT:    .p2align 1
-; CHECK-PIC-SMALL-NEXT:  # %bb.1:
-; CHECK-PIC-SMALL-NEXT:    .p2align 2
-; CHECK-PIC-SMALL-NEXT:  .LCPI1_0:
-; CHECK-PIC-SMALL-NEXT:    .long _GLOBAL_OFFSET_TABLE_
-; CHECK-PIC-SMALL-NEXT:  .LCPI1_1:
-; CHECK-PIC-SMALL-NEXT:    .long p_fun@GOT
-;
-; CHECK-PIC-LARGE-LABEL: foo_indirect:
-; CHECK-PIC-LARGE:       # %bb.0: # %entry
-; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 8
-; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 8
-; CHECK-PIC-LARGE-NEXT:    st32.w rgb, (sp, 4) # 4-byte Folded Spill
-; CHECK-PIC-LARGE-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CHECK-PIC-LARGE-NEXT:    .cfi_offset rgb, -4
-; CHECK-PIC-LARGE-NEXT:    .cfi_offset lr, -8
-; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 4
-; CHECK-PIC-LARGE-NEXT:    .cfi_def_cfa_offset 12
-; CHECK-PIC-LARGE-NEXT:    lrw32 rgb, [.LCPI1_0]
-; CHECK-PIC-LARGE-NEXT:    mov32 a2, rgb
-; CHECK-PIC-LARGE-NEXT:    lrw32 a3, [.LCPI1_1]
-; CHECK-PIC-LARGE-NEXT:    addu16 a2, a2, a3
-; CHECK-PIC-LARGE-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-LARGE-NEXT:    ld16.w a2, (a2, 0)
-; CHECK-PIC-LARGE-NEXT:    ld16.w a1, (a1, 0)
-; CHECK-PIC-LARGE-NEXT:    jsr16 a2
-; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 4
-; CHECK-PIC-LARGE-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
-; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 4) # 4-byte Folded Reload
-; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 8
-; CHECK-PIC-LARGE-NEXT:    rts16
-; CHECK-PIC-LARGE-NEXT:    .p2align 1
-; CHECK-PIC-LARGE-NEXT:  # %bb.1:
-; CHECK-PIC-LARGE-NEXT:    .p2align 2
-; CHECK-PIC-LARGE-NEXT:  .LCPI1_0:
-; CHECK-PIC-LARGE-NEXT:    .long _GLOBAL_OFFSET_TABLE_
-; CHECK-PIC-LARGE-NEXT:  .LCPI1_1:
-; CHECK-PIC-LARGE-NEXT:    .long p_fun@GOT
-; CHECK-PIC-LABEL: foo_indirect:
-; CHECK-PIC:       # %bb.0: # %entry
-; CHECK-PIC-NEXT:    movi32 a2, p_fun
-; CHECK-PIC-NEXT:    movih32 a3, p_fun
-; CHECK-PIC-NEXT:    or32 a2, a3, a2
-; CHECK-PIC-NEXT:    ld32.w a2, a2, 0
-; CHECK-PIC-NEXT:    ld32.w a1, a1, 0
-; CHECK-PIC-NEXT:    jmp32 a2
 entry:
   %0 = load void (i32, i32)*, void (i32, i32)** @p_fun, align 8
   %1 = load i32, i32* %ptr

diff --git a/llvm/test/CodeGen/CSKY/cmp-i.ll b/llvm/test/CodeGen/CSKY/cmp-i.ll
index e62d159f718abf3c99a8e25b58b488510eb9d598..09cbdaf214d14b9a996303fd298ba43b25db8fd0 100644 (file)
--- a/llvm/test/CodeGen/CSKY/cmp-i.ll
+++ b/llvm/test/CodeGen/CSKY/cmp-i.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+btst16 | FileCheck %s --check-prefix=GENERIC
 
 ;eq
 define i1 @icmpRR_eq(i32 %x, i32 %y) {

diff --git a/llvm/test/CodeGen/CSKY/fpu/select.ll b/llvm/test/CodeGen/CSKY/fpu/select.ll
index 81216a1fdca68e1e45092d9d48844e18dcf253ef..1e84718114d88ce82735201bd88d7669205d4fcd 100644 (file)
--- a/llvm/test/CodeGen/CSKY/fpu/select.ll
+++ b/llvm/test/CodeGen/CSKY/fpu/select.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3,+hard-float,+fpuv2_sf,+fpuv2_df -float-abi=hard | FileCheck %s
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3,+hard-float,+fpuv3_sf,+fpuv3_df -float-abi=hard | FileCheck %s --check-prefix=CHECK-DF3
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+hard-float,+fpuv2_sf,+fpuv2_df -float-abi=hard | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+btst16,+hard-float,+fpuv2_sf,+fpuv2_df -float-abi=hard | FileCheck %s --check-prefix=GENERIC
 
 define float @selectRR_eq_float(i1 %x, float %n, float %m) {
 ; CHECK-LABEL: selectRR_eq_float:

diff --git a/llvm/test/CodeGen/CSKY/inline-asm-abi-names.ll b/llvm/test/CodeGen/CSKY/inline-asm-abi-names.ll
index 58e86ed2d3fdc6e9384f5ec2a1ca96a1101d0bd7..21ca3cd611362c607fccdf83231771ce1ae24c01 100644 (file)
--- a/llvm/test/CodeGen/CSKY/inline-asm-abi-names.ll
+++ b/llvm/test/CodeGen/CSKY/inline-asm-abi-names.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=csky -verify-machineinstrs -csky-no-aliases -no-integrated-as < %s \
+; RUN: llc -mtriple=csky -verify-machineinstrs -csky-no-aliases -no-integrated-as -mattr=+e2 < %s \
 ; RUN:   | FileCheck -check-prefix=CSKY %s
 
 ; These test that we can use both the architectural names (r*) and the ABI names
@@ -14,11 +14,9 @@
 define i32 @explicit_register_r0(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r0:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r0}"(i32 %a)
   ret i32 %1
@@ -28,11 +26,9 @@ define i32 @explicit_register_r0(i32 %a) nounwind {
 define i32 @explicit_register_a0(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_a0:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{a0}"(i32 %a)
   ret i32 %1
@@ -42,12 +38,10 @@ define i32 @explicit_register_a0(i32 %a) nounwind {
 define i32 @explicit_register_r1(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r1:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r1}"(i32 %a)
   ret i32 %1
@@ -56,12 +50,10 @@ define i32 @explicit_register_r1(i32 %a) nounwind {
 define i32 @explicit_register_a1(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_a1:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{a1}"(i32 %a)
   ret i32 %1
@@ -71,12 +63,10 @@ define i32 @explicit_register_a1(i32 %a) nounwind {
 define i32 @explicit_register_r2(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r2:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r2}"(i32 %a)
   ret i32 %1
@@ -85,12 +75,10 @@ define i32 @explicit_register_r2(i32 %a) nounwind {
 define i32 @explicit_register_a2(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_a2:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{a2}"(i32 %a)
   ret i32 %1
@@ -100,12 +88,10 @@ define i32 @explicit_register_a2(i32 %a) nounwind {
 define i32 @explicit_register_r3(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r3:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r3}"(i32 %a)
   ret i32 %1
@@ -114,12 +100,10 @@ define i32 @explicit_register_r3(i32 %a) nounwind {
 define i32 @explicit_register_a3(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_a3:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 a3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, a3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{a3}"(i32 %a)
   ret i32 %1
@@ -131,12 +115,10 @@ define i32 @explicit_register_r4(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l0, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -149,12 +131,10 @@ define i32 @explicit_register_l0(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l0, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -168,12 +148,10 @@ define i32 @explicit_register_r5(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l1, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l1, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -186,12 +164,10 @@ define i32 @explicit_register_l1(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l1, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l1, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -205,12 +181,10 @@ define i32 @explicit_register_r6(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l2, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l2, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -223,12 +197,10 @@ define i32 @explicit_register_l2(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l2, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l2, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -242,12 +214,10 @@ define i32 @explicit_register_r7(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l3, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l3, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -260,12 +230,10 @@ define i32 @explicit_register_l3(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st16.w l3, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld16.w l3, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -279,12 +247,10 @@ define i32 @explicit_register_r8(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l4, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l4, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l4, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l4, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -297,12 +263,10 @@ define i32 @explicit_register_l4(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l4, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l4, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l4, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l4, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -316,12 +280,10 @@ define i32 @explicit_register_r9(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l5, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l5, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l5, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l5, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -334,12 +296,10 @@ define i32 @explicit_register_l5(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l5, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l5, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l5, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l5, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -353,12 +313,10 @@ define i32 @explicit_register_r10(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l6, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l6, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l6, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l6, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -371,12 +329,10 @@ define i32 @explicit_register_l6(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l6, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l6, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l6, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l6, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -390,12 +346,10 @@ define i32 @explicit_register_r11(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l7, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l7, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l7, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l7, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -408,12 +362,10 @@ define i32 @explicit_register_l7(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l7, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 l7, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l7, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l7, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -425,12 +377,10 @@ define i32 @explicit_register_l7(i32 %a) nounwind {
 define i32 @explicit_register_r12(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r12:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 t0, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r12}"(i32 %a)
   ret i32 %1
@@ -439,12 +389,10 @@ define i32 @explicit_register_r12(i32 %a) nounwind {
 define i32 @explicit_register_t0(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t0:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 t0, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t0, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t0}"(i32 %a)
   ret i32 %1
@@ -454,12 +402,10 @@ define i32 @explicit_register_t0(i32 %a) nounwind {
 define i32 @explicit_register_r13(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r13:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 t1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r13}"(i32 %a)
   ret i32 %1
@@ -468,12 +414,10 @@ define i32 @explicit_register_r13(i32 %a) nounwind {
 define i32 @explicit_register_t1(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t1:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 t1, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t1, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t1}"(i32 %a)
   ret i32 %1
@@ -483,12 +427,10 @@ define i32 @explicit_register_t1(i32 %a) nounwind {
 define i32 @explicit_register_r14(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r14:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 sp, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, sp, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r14}"(i32 %a)
   ret i32 %1
@@ -497,12 +439,10 @@ define i32 @explicit_register_r14(i32 %a) nounwind {
 define i32 @explicit_register_sp(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_sp:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 sp, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, sp, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{sp}"(i32 %a)
   ret i32 %1
@@ -514,12 +454,10 @@ define i32 @explicit_register_r15(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 lr, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, lr, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -532,12 +470,10 @@ define i32 @explicit_register_lr(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov16 lr, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, lr, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -551,12 +487,10 @@ define i32 @explicit_register_r16(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l8, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 l8, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l8, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l8, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -569,12 +503,10 @@ define i32 @explicit_register_l8(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l8, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 l8, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l8, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l8, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -588,12 +520,10 @@ define i32 @explicit_register_r17(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l9, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 l9, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l9, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l9, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -606,12 +536,10 @@ define i32 @explicit_register_l9(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w l9, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 l9, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, l9, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w l9, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -623,12 +551,10 @@ define i32 @explicit_register_l9(i32 %a) nounwind {
 define i32 @explicit_register_r18(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r18:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r18}"(i32 %a)
   ret i32 %1
@@ -637,12 +563,10 @@ define i32 @explicit_register_r18(i32 %a) nounwind {
 define i32 @explicit_register_t2(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t2:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t2, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t2, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t2}"(i32 %a)
   ret i32 %1
@@ -652,12 +576,10 @@ define i32 @explicit_register_t2(i32 %a) nounwind {
 define i32 @explicit_register_r19(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r19:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r19}"(i32 %a)
   ret i32 %1
@@ -666,12 +588,10 @@ define i32 @explicit_register_r19(i32 %a) nounwind {
 define i32 @explicit_register_t3(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t3:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t3, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t3, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t3}"(i32 %a)
   ret i32 %1
@@ -681,12 +601,10 @@ define i32 @explicit_register_t3(i32 %a) nounwind {
 define i32 @explicit_register_r20(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r20:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t4, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t4, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r20}"(i32 %a)
   ret i32 %1
@@ -695,12 +613,10 @@ define i32 @explicit_register_r20(i32 %a) nounwind {
 define i32 @explicit_register_t4(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t4:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t4, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t4, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t4}"(i32 %a)
   ret i32 %1
@@ -710,12 +626,10 @@ define i32 @explicit_register_t4(i32 %a) nounwind {
 define i32 @explicit_register_r21(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r21:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t5, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t5, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r21}"(i32 %a)
   ret i32 %1
@@ -724,12 +638,10 @@ define i32 @explicit_register_r21(i32 %a) nounwind {
 define i32 @explicit_register_t5(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t5:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t5, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t5, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t5}"(i32 %a)
   ret i32 %1
@@ -739,12 +651,10 @@ define i32 @explicit_register_t5(i32 %a) nounwind {
 define i32 @explicit_register_r22(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r22:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t6, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t6, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r22}"(i32 %a)
   ret i32 %1
@@ -753,12 +663,10 @@ define i32 @explicit_register_r22(i32 %a) nounwind {
 define i32 @explicit_register_t6(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t6:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t6, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t6, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t6}"(i32 %a)
   ret i32 %1
@@ -768,12 +676,10 @@ define i32 @explicit_register_t6(i32 %a) nounwind {
 define i32 @explicit_register_r23(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r23:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t7, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t7, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r23}"(i32 %a)
   ret i32 %1
@@ -782,12 +688,10 @@ define i32 @explicit_register_r23(i32 %a) nounwind {
 define i32 @explicit_register_t7(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t7:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t7, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t7, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t7}"(i32 %a)
   ret i32 %1
@@ -797,12 +701,10 @@ define i32 @explicit_register_t7(i32 %a) nounwind {
 define i32 @explicit_register_r24(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r24:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t8, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t8, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r24}"(i32 %a)
   ret i32 %1
@@ -811,12 +713,10 @@ define i32 @explicit_register_r24(i32 %a) nounwind {
 define i32 @explicit_register_t8(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t8:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t8, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t8, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t8}"(i32 %a)
   ret i32 %1
@@ -826,12 +726,10 @@ define i32 @explicit_register_t8(i32 %a) nounwind {
 define i32 @explicit_register_r25(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r25:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t9, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t9, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r25}"(i32 %a)
   ret i32 %1
@@ -840,12 +738,10 @@ define i32 @explicit_register_r25(i32 %a) nounwind {
 define i32 @explicit_register_t9(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_t9:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 t9, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, t9, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{t9}"(i32 %a)
   ret i32 %1
@@ -855,12 +751,10 @@ define i32 @explicit_register_t9(i32 %a) nounwind {
 define i32 @explicit_register_r26(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r26:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 r26, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, r26, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r26}"(i32 %a)
   ret i32 %1
@@ -871,12 +765,10 @@ define i32 @explicit_register_r26(i32 %a) nounwind {
 define i32 @explicit_register_r27(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r27:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 r27, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, r27, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r27}"(i32 %a)
   ret i32 %1
@@ -888,12 +780,10 @@ define i32 @explicit_register_r28(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w rgb, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 rgb, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, rgb, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -906,12 +796,10 @@ define i32 @explicit_register_rgb(i32 %a) nounwind {
 ; CSKY:       # %bb.0:
 ; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    st32.w rgb, (sp, 0) # 4-byte Folded Spill
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 rgb, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, rgb, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
@@ -923,12 +811,10 @@ define i32 @explicit_register_rgb(i32 %a) nounwind {
 define i32 @explicit_register_r29(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r29:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 rtb, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, rtb, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r29}"(i32 %a)
   ret i32 %1
@@ -937,12 +823,10 @@ define i32 @explicit_register_r29(i32 %a) nounwind {
 define i32 @explicit_register_rtb(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_rtb:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 rtb, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, rtb, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{rtb}"(i32 %a)
   ret i32 %1
@@ -952,12 +836,10 @@ define i32 @explicit_register_rtb(i32 %a) nounwind {
 define i32 @explicit_register_r30(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r30:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 svbr, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, svbr, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r30}"(i32 %a)
   ret i32 %1
@@ -966,12 +848,10 @@ define i32 @explicit_register_r30(i32 %a) nounwind {
 define i32 @explicit_register_svbr(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_svbr:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 svbr, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, svbr, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{svbr}"(i32 %a)
   ret i32 %1
@@ -981,12 +861,10 @@ define i32 @explicit_register_svbr(i32 %a) nounwind {
 define i32 @explicit_register_r31(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_r31:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 tls, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, tls, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{r31}"(i32 %a)
   ret i32 %1
@@ -995,12 +873,10 @@ define i32 @explicit_register_r31(i32 %a) nounwind {
 define i32 @explicit_register_tls(i32 %a) nounwind {
 ; CSKY-LABEL: explicit_register_tls:
 ; CSKY:       # %bb.0:
-; CSKY-NEXT:    subi16 sp, sp, 4
 ; CSKY-NEXT:    mov32 tls, a0
 ; CSKY-NEXT:    #APP
 ; CSKY-NEXT:    addi a0, tls, 1
 ; CSKY-NEXT:    #NO_APP
-; CSKY-NEXT:    addi16 sp, sp, 4
 ; CSKY-NEXT:    rts16
   %1 = tail call i32 asm "addi $0, $1, 1", "=r,{tls}"(i32 %a)
   ret i32 %1

diff --git a/llvm/test/CodeGen/CSKY/select.ll b/llvm/test/CodeGen/CSKY/select.ll
index 9cacdd336357aa28644e51b65e52bf6acef0e2bc..8940ba6712d431b736d2576fc1894504462ebe28 100644 (file)
--- a/llvm/test/CodeGen/CSKY/select.ll
+++ b/llvm/test/CodeGen/CSKY/select.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
-; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+btst16 | FileCheck %s --check-prefix=GENERIC
 
 define i32 @selectRR_eq_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
 ; CHECK-LABEL: selectRR_eq_i32: