arch64: dts: qcom: sm8250: add uart nodes

Currently sm8250.dtsi only defines default debug uart. Port rest uart
nodes from the downstream dtsi file.

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200909103238.149761-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 18b6e4d..c989bc1 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -526,6 +526,17 @@
                                status = "disabled";
                        };
 
+                       uart17: serial@88c000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0 0x0088c000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart17_default>;
+                               interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                       };
+
                        i2c18: i2c@890000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0 0x00890000 0 0x4000>;
@@ -552,6 +563,17 @@
                                status = "disabled";
                        };
 
+                       uart18: serial@890000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0 0x00890000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart18_default>;
+                               interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                       };
+
                        i2c19: i2c@894000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0 0x00894000 0 0x4000>;
@@ -668,6 +690,17 @@
                                status = "disabled";
                        };
 
+                       uart2: serial@988000 {
+                               compatible = "qcom,geni-debug-uart";
+                               reg = <0 0x00988000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart2_default>;
+                               interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                       };
+
                        i2c3: i2c@98c000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0 0x0098c000 0 0x4000>;
@@ -772,6 +805,17 @@
                                status = "disabled";
                        };
 
+                       uart6: serial@998000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0 0x00998000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_uart6_default>;
+                               interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                       };
+
                        i2c7: i2c@99c000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0 0x0099c000 0 0x4000>;
@@ -1888,12 +1932,42 @@
                                };
                        };
 
+                       qup_uart2_default: qup-uart2-default {
+                               mux {
+                                       pins = "gpio117", "gpio118";
+                                       function = "qup2";
+                               };
+                       };
+
+                       qup_uart6_default: qup-uart6-default {
+                               mux {
+                                       pins = "gpio16", "gpio17",
+                                               "gpio18", "gpio19";
+                                       function = "qup6";
+                               };
+                       };
+
                        qup_uart12_default: qup-uart12-default {
                                mux {
                                        pins = "gpio34", "gpio35";
                                        function = "qup12";
                                };
                        };
+
+                       qup_uart17_default: qup-uart17-default {
+                               mux {
+                                       pins = "gpio52", "gpio53",
+                                               "gpio54", "gpio55";
+                                       function = "qup17";
+                               };
+                       };
+
+                       qup_uart18_default: qup-uart18-default {
+                               mux {
+                                       pins = "gpio58", "gpio59";
+                                       function = "qup18";
+                               };
+                       };
                };
 
                adsp: remoteproc@17300000 {