powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014
authorYork Sun <york.sun@nxp.com>
Wed, 28 Dec 2016 16:43:32 +0000 (08:43 -0800)
committerTom Rini <trini@konsulko.com>
Thu, 5 Jan 2017 00:40:20 +0000 (19:40 -0500)
Remove these SoCs from Kconfig because they don't have individual
configuration. Clean up existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
arch/powerpc/cpu/mpc85xx/Makefile
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/immap_85xx.h
drivers/net/fm/Makefile

index 3f94f5cd1c056683e69fb15a83e134bf184faee7..7b000d727f219c3eda7a08f9788945cf6e3d7f2b 100644 (file)
@@ -656,8 +656,6 @@ config MAX_CPUS
                     ARCH_P1025 || \
                     ARCH_P2020 || \
                     ARCH_P5020 || \
-                    ARCH_T1020 || \
-                    ARCH_T1022 || \
                     ARCH_T1023 || \
                     ARCH_T1024
        default 1
@@ -699,10 +697,6 @@ config SYS_CCSRBAR_DEFAULT
                                ARCH_P4080      || \
                                ARCH_P5020      || \
                                ARCH_P5040      || \
-                               ARCH_T1013      || \
-                               ARCH_T1014      || \
-                               ARCH_T1020      || \
-                               ARCH_T1022      || \
                                ARCH_T1023      || \
                                ARCH_T1024      || \
                                ARCH_T1040      || \
@@ -732,11 +726,7 @@ config SYS_FSL_NUM_LAWS
                        ARCH_T2081      || \
                        ARCH_T4160      || \
                        ARCH_T4240
-       default 16 if   ARCH_T1013      || \
-                       ARCH_T1014      || \
-                       ARCH_T1020      || \
-                       ARCH_T1022      || \
-                       ARCH_T1023      || \
+       default 16 if   ARCH_T1023      || \
                        ARCH_T1024      || \
                        ARCH_T1040      || \
                        ARCH_T1042
index 46ed22cafc6dd7d49e835785574bb9970051e6fc..04585d0608cab28ca9b8002486195badca31700d 100644 (file)
@@ -50,8 +50,6 @@ obj-$(CONFIG_ARCH_B4420) += b4860_ids.o
 obj-$(CONFIG_ARCH_B4860) += b4860_ids.o
 obj-$(CONFIG_ARCH_T1040) += t1040_ids.o
 obj-$(CONFIG_ARCH_T1042)       += t1040_ids.o
-obj-$(CONFIG_PPC_T1020)        += t1040_ids.o
-obj-$(CONFIG_PPC_T1022)        += t1040_ids.o
 obj-$(CONFIG_ARCH_T1023) += t1024_ids.o
 obj-$(CONFIG_ARCH_T1024) += t1024_ids.o
 obj-$(CONFIG_ARCH_T2080) += t2080_ids.o
@@ -92,8 +90,6 @@ obj-$(CONFIG_ARCH_B4860) += b4860_serdes.o
 obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
 obj-$(CONFIG_ARCH_T1040) += t1040_serdes.o
 obj-$(CONFIG_ARCH_T1042)       += t1040_serdes.o
-obj-$(CONFIG_PPC_T1020)        += t1040_serdes.o
-obj-$(CONFIG_PPC_T1022)        += t1040_serdes.o
 obj-$(CONFIG_ARCH_T1023) += t1024_serdes.o
 obj-$(CONFIG_ARCH_T1024) += t1024_serdes.o
 obj-$(CONFIG_ARCH_T2080) += t2080_serdes.o
index 8bae57701ec12ee64c6eafd1588ba87eab69bc65..4e9fcc84fea60f1566eec6d36e1c8f65886bcff6 100644 (file)
 #define CONFIG_NUM_DDR_CONTROLLERS     1
 #endif
 
-#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
-defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
+#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
 #define CONFIG_E5500
 #define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2  /* Freescale Chassis generation 2 */
@@ -582,8 +581,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define CONFIG_SYS_FSL_ERRATUM_A009663
 #define CONFIG_SYS_FSL_ERRATUM_A009942
 
-#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) ||\
-defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
+#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
 #define CONFIG_E5500
 #define CONFIG_FSL_CORENET          /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS2  /* Freescale Chassis generation 2 */
index 786e4f6765b662bb6d22e379731f134cd2945d9c..762b174b2d64213602f3e2e3d214dce0fbc93928 100644 (file)
@@ -1775,8 +1775,7 @@ typedef struct ccsr_gur {
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL        0x00ff0000
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT  16
 #define FSL_CORENET_RCWSR6_BOOT_LOC    0x0f800000
-#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) ||\
-defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
+#elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL        0xff000000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  24
 #define FSL_CORENET2_RCWSR4_SRDS2_PRTCL        0x00fe0000
@@ -1796,8 +1795,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define PXCKEN_MASK    0x80000000
 #define PXCK_MASK      0x00FF0000
 #define PXCK_BITS_START        16
-#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) || \
-       defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
+#elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023)
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL                0xff800000
 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT  23
 #define FSL_CORENET_RCWSR6_BOOT_LOC            0x0f800000
index 08b3f27601574c0c8b1adfeecec0090e9bb9f093..fa96bad902dc2db6c64bf1bdccd29830d2e24ce5 100644 (file)
@@ -26,8 +26,6 @@ obj-$(CONFIG_ARCH_P5020) += p5020.o
 obj-$(CONFIG_ARCH_P5040) += p5040.o
 obj-$(CONFIG_ARCH_T1040) += t1040.o
 obj-$(CONFIG_ARCH_T1042)       += t1040.o
-obj-$(CONFIG_PPC_T1020)        += t1040.o
-obj-$(CONFIG_PPC_T1022)        += t1040.o
 obj-$(CONFIG_ARCH_T1023) += t1024.o
 obj-$(CONFIG_ARCH_T1024) += t1024.o
 obj-$(CONFIG_ARCH_T2080) += t2080.o