Rework the alignment check for BFD_RELOC_MIPS_18_PCREL_S3.
authorMatthew Fortune <matthew.fortune@imgtec.com>
Tue, 16 Dec 2014 12:39:22 +0000 (12:39 +0000)
committerMatthew Fortune <matthew.fortune@imgtec.com>
Fri, 19 Dec 2014 20:24:16 +0000 (20:24 +0000)
gas/

* config/tc-mips.c (md_apply_fix): Apply alignment check
to the symbol and offset rather than *valP for
BFD_RELOC_MIPS_18_PCREL_S3.  Also update the error message
for BFD_RELOC_MIPS_19_PCREL_S2.

gas/testsuite/

* gas/mips/r6-64.s: Remove .align directives from LDPC
instructions and add further tests for LDPC.
* gas/mips/r6-64-n32.d: remove the NOPs from LDPC expected
output and update for new tests.
* gas/mips/r6-64-n64.d: Likewise.
* gas/mips/ldpc-unalign.l: New file.
* gas/mips/ldpc-unalign.s: Likewise.
* gas/mips/mips.exp: Run ldpc-unalign test.

gas/ChangeLog
gas/config/tc-mips.c
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/ldpc-unalign.l [new file with mode: 0644]
gas/testsuite/gas/mips/ldpc-unalign.s [new file with mode: 0644]
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/r6-64-n32.d
gas/testsuite/gas/mips/r6-64-n64.d
gas/testsuite/gas/mips/r6-64.s

index b53fcff..590af4c 100644 (file)
@@ -1,3 +1,10 @@
+2014-12-19  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+       * config/tc-mips.c (md_apply_fix): Apply alignment check
+       to the symbol and offset rather than *valP for
+       BFD_RELOC_MIPS_18_PCREL_S3.  Also update the error message
+       for BFD_RELOC_MIPS_19_PCREL_S2.
+
 2014-12-14  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (flag_compress_debug): Default to compress
index c9266db..8ecf0c6 100644 (file)
@@ -15009,10 +15009,14 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       break;
 
     case BFD_RELOC_MIPS_18_PCREL_S3:
-      if ((*valP & 0x7) != 0)
+      if ((S_GET_VALUE (fixP->fx_addsy) & 0x7) != 0)
        as_bad_where (fixP->fx_file, fixP->fx_line,
-                     _("PC-relative access to misaligned address (%lx)"),
-                     (long) *valP);
+                     _("PC-relative access using misaligned symbol (%lx)"),
+                     (long) S_GET_VALUE (fixP->fx_addsy));
+      if ((fixP->fx_offset & 0x7) != 0)
+       as_bad_where (fixP->fx_file, fixP->fx_line,
+                     _("PC-relative access using misaligned offset (%lx)"),
+                     (long) fixP->fx_offset);
 
       gas_assert (!fixP->fx_done);
       break;
@@ -15021,7 +15025,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       if ((*valP & 0x3) != 0)
        as_bad_where (fixP->fx_file, fixP->fx_line,
                      _("PC-relative access to misaligned address (%lx)"),
-                     (long) *valP);
+                     (long) (S_GET_VALUE (fixP->fx_addsy) + fixP->fx_offset));
 
       gas_assert (!fixP->fx_done);
       break;
index 813d88b..7c76bbc 100644 (file)
@@ -1,5 +1,16 @@
 2014-12-19  Matthew Fortune  <matthew.fortune@imgtec.com>
 
+       * gas/mips/r6-64.s: Remove .align directives from LDPC
+       instructions and add further tests for LDPC.
+       * gas/mips/r6-64-n32.d: remove the NOPs from LDPC expected
+       output and update for new tests.
+       * gas/mips/r6-64-n64.d: Likewise.
+       * gas/mips/ldpc-unalign.l: New file.
+       * gas/mips/ldpc-unalign.s: Likewise.
+       * gas/mips/mips.exp: Run ldpc-unalign test.
+
+2014-12-19  Matthew Fortune  <matthew.fortune@imgtec.com>
+
        * gas/mips/octeon3.d: Switch to use numeric register names.
 
 2014-12-16  Matthew Fortune  <matthew.fortune@imgtec.com>
diff --git a/gas/testsuite/gas/mips/ldpc-unalign.l b/gas/testsuite/gas/mips/ldpc-unalign.l
new file mode 100644 (file)
index 0000000..ddc515b
--- /dev/null
@@ -0,0 +1,9 @@
+.*: Assembler messages:
+.*:2: Error: PC-relative access using misaligned offset \(4\)
+.*:3: Error: PC-relative access using misaligned offset \(4\)
+.*:4: Error: PC-relative access using misaligned symbol \(1c\)
+.*:5: Error: PC-relative access using misaligned symbol \(1c\)
+.*:6: Error: PC-relative access using misaligned symbol \(1c\)
+.*:6: Error: PC-relative access using misaligned offset \(4\)
+.*:7: Error: PC-relative access using misaligned symbol \(1c\)
+.*:7: Error: PC-relative access using misaligned offset \(4\)
diff --git a/gas/testsuite/gas/mips/ldpc-unalign.s b/gas/testsuite/gas/mips/ldpc-unalign.s
new file mode 100644 (file)
index 0000000..8b926cf
--- /dev/null
@@ -0,0 +1,18 @@
+       .text
+        ldpc     $4, 1f+4
+        ldpc     $4, 1f+4
+        ldpc     $4, 2f
+        ldpc     $4, 2f
+        ldpc     $4, 2f+4
+        ldpc     $4, 2f+4
+       .align 3
+1:
+        nop
+2:
+       nop
+       nop
+       nop
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+       .align  2
+       .space  8
index b0de13a..d2cbc50 100644 (file)
@@ -1450,6 +1450,7 @@ if { [istarget mips*-*-vxworks*] } {
        run_dump_test_arches "r6-n64"   [mips_arch_list_matching mips64r6]
        run_dump_test_arches "r6-64-n32"        [mips_arch_list_matching mips64r6]
        run_dump_test_arches "r6-64-n64"        [mips_arch_list_matching mips64r6]
+       run_list_test_arches "ldpc-unalign" "-64" [mips_arch_list_matching mips64r6]
     }
     run_list_test_arches "r6-removed"  "-32" [mips_arch_list_matching mips32r6]
     run_list_test_arches "r6-64-removed"       [mips_arch_list_matching mips64r6]
index 6d471c6..fcef172 100644 (file)
@@ -44,18 +44,21 @@ Disassembly of section .text:
 [      ]*78: R_MIPS_PC19_S2    L0.+0xffffc
 0+007c <[^>]*> ec940000        lwupc   a0,fff0007c <[^>]*>
 0+0080 <[^>]*> ec93ffff        lwupc   a0,0010007c <[^>]*>
-0+0084 <[^>]*> 00000000        nop
+0+0084 <[^>]*> ec980000        ldpc    a0,00000080 <[^>]*>
+[      ]*84: R_MIPS_PC18_S3    \.L1.1
 0+0088 <[^>]*> ec980000        ldpc    a0,00000088 <[^>]*>
 [      ]*88: R_MIPS_PC18_S3    \.L1.1
 0+008c <[^>]*> 00000000        nop
 0+0090 <[^>]*> ec980000        ldpc    a0,00000090 <[^>]*>
-[      ]*90: R_MIPS_PC18_S3    L0.-0x100000
-0+0094 <[^>]*> 00000000        nop
+[      ]*90: R_MIPS_PC18_S3    \.L3.1-0x100000
+0+0094 <[^>]*> ec980000        ldpc    a0,00000090 <[^>]*>
+[      ]*94: R_MIPS_PC18_S3    \.L3.1-0x100000
 0+0098 <[^>]*> ec980000        ldpc    a0,00000098 <[^>]*>
-[      ]*98: R_MIPS_PC18_S3    L0.+0xffff8
-0+009c <[^>]*> 00000000        nop
+[      ]*98: R_MIPS_PC18_S3    \.L3.2\+0xffff8
+0+009c <[^>]*> ec980000        ldpc    a0,00000098 <[^>]*>
+[      ]*9c: R_MIPS_PC18_S3    \.L3.2\+0xffff8
 0+00a0 <[^>]*> ec9a0000        ldpc    a0,fff000a0 <[^>]*>
-0+00a4 <[^>]*> 00000000        nop
+0+00a4 <[^>]*> ec9a0000        ldpc    a0,fff000a0 <[^>]*>
 0+00a8 <[^>]*> ec99ffff        ldpc    a0,001000a0 <[^>]*>
-0+00ac <[^>]*> 00000000        nop
+0+00ac <[^>]*> ec99ffff        ldpc    a0,001000a0 <[^>]*>
        \.\.\.
index 2202820..42d8e53 100644 (file)
@@ -50,24 +50,33 @@ Disassembly of section .text:
 [      ]*78: R_MIPS_NONE       \*ABS\*\+0xffffc
 0+007c <[^>]*> ec940000        lwupc   a0,f+ff0007c <[^>]*>
 0+0080 <[^>]*> ec93ffff        lwupc   a0,0+010007c <[^>]*>
-0+0084 <[^>]*> 00000000        nop
+0+0084 <[^>]*> ec980000        ldpc    a0,0+0000080 <[^>]*>
+[      ]*84: R_MIPS_PC18_S3    .L1.1
+[      ]*84: R_MIPS_NONE       \*ABS\*
+[      ]*84: R_MIPS_NONE       \*ABS\*
 0+0088 <[^>]*> ec980000        ldpc    a0,0+0000088 <[^>]*>
-[      ]*88: R_MIPS_PC18_S3    \.L1.1
+[      ]*88: R_MIPS_PC18_S3    .L1.1
 [      ]*88: R_MIPS_NONE       \*ABS\*
 [      ]*88: R_MIPS_NONE       \*ABS\*
 0+008c <[^>]*> 00000000        nop
 0+0090 <[^>]*> ec980000        ldpc    a0,0+0000090 <[^>]*>
-[      ]*90: R_MIPS_PC18_S3    L0.-0x100000
+[      ]*90: R_MIPS_PC18_S3    .L3.1-0x100000
 [      ]*90: R_MIPS_NONE       \*ABS\*-0x100000
 [      ]*90: R_MIPS_NONE       \*ABS\*-0x100000
-0+0094 <[^>]*> 00000000        nop
+0+0094 <[^>]*> ec980000        ldpc    a0,0+0000090 <[^>]*>
+[      ]*94: R_MIPS_PC18_S3    .L3.1-0x100000
+[      ]*94: R_MIPS_NONE       \*ABS\*-0x100000
+[      ]*94: R_MIPS_NONE       \*ABS\*-0x100000
 0+0098 <[^>]*> ec980000        ldpc    a0,0+0000098 <[^>]*>
-[      ]*98: R_MIPS_PC18_S3    L0.\+0xffff8
+[      ]*98: R_MIPS_PC18_S3    .L3.2\+0xffff8
 [      ]*98: R_MIPS_NONE       \*ABS\*\+0xffff8
 [      ]*98: R_MIPS_NONE       \*ABS\*\+0xffff8
-0+009c <[^>]*> 00000000        nop
+0+009c <[^>]*> ec980000        ldpc    a0,0+0000098 <[^>]*>
+[      ]*9c: R_MIPS_PC18_S3    .L3.2\+0xffff8
+[      ]*9c: R_MIPS_NONE       \*ABS\*\+0xffff8
+[      ]*9c: R_MIPS_NONE       \*ABS\*\+0xffff8
 0+00a0 <[^>]*> ec9a0000        ldpc    a0,f+ff000a0 <[^>]*>
-0+00a4 <[^>]*> 00000000        nop
+0+00a4 <[^>]*> ec9a0000        ldpc    a0,f+ff000a0 <[^>]*>
 0+00a8 <[^>]*> ec99ffff        ldpc    a0,0+01000a0 <[^>]*>
-0+00ac <[^>]*> 00000000        nop
+0+00ac <[^>]*> ec99ffff        ldpc    a0,0+01000a0 <[^>]*>
        \.\.\.
index 7a97ad2..2d577d8 100644 (file)
         lwu      $4, (-262144 << 2)($pc)
         lwu      $4, (262143 << 2)($pc)
 
-        .align 3
         ldpc     $4, 1f
-        .align 3
-        ldpc     $4, .+(-131072 << 3)
-        .align 3
-        ldpc     $4, .+(131071 << 3)
-        .align 3
+        ldpc     $4, 1f
+       .align 3
+3:
+       ldpc     $4, 3b+(-131072 << 3)
+       ldpc     $4, 3b+(-131072 << 3)
+       .align 3
+3:
+       ldpc     $4, 3b+(131071 << 3)
+       ldpc     $4, 3b+(131071 << 3)
         ld     $4, (-131072 << 3)($pc)
-        .align 3
+        ld     $4, (-131072 << 3)($pc)
+        ld     $4, (131071 << 3)($pc)
         ld     $4, (131071 << 3)($pc)
         .align 3
 1:
         nop
+       nop
 
 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
        .align  2