amvecm: add pulldown combing fix patch [2/2]
authorMingLiang Dong <mingliang.dong@amlogic.com>
Thu, 18 Jul 2019 09:26:25 +0000 (05:26 -0400)
committerTao Zeng <tao.zeng@amlogic.com>
Wed, 7 Aug 2019 08:14:12 +0000 (01:14 -0700)
PD#SWPL-11389

Problem:
1080i input, there is combing when detect pulldown

Solution:
1. di add pulldown detect
2. amvecm set dejaggy according to pulldown detect

Verify:
verify on TL1

Change-Id: I146666b19ab393d610e66e9cb450b74b185f76e1
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
drivers/amlogic/media/enhancement/amvecm/amcm.c
drivers/amlogic/media/enhancement/amvecm/amcm.h
drivers/amlogic/media/enhancement/amvecm/amcm_regmap.h
drivers/amlogic/media/enhancement/amvecm/amvecm.c
include/linux/amlogic/media/amvecm/amvecm.h

index 03fb262..7117851 100644 (file)
@@ -216,11 +216,15 @@ void am_set_regmap(struct am_regs_s *p)
                                WRITE_VPP_REG(VPP_CHROMA_DATA_PORT,
                                                p->am_reg[i].val);
                        break;
-/* #if (MESON_CPU_TYPE >= MESON_CPU_TYPE_MESONG9TV) */
                case REG_TYPE_VCBUS:
+                       if (p->am_reg[i].addr == SHARP0_DEJ_ALPHA) {
+                               sr0_dej_setting[DEJAGGY_LEVEL - 1].val =
+                                       p->am_reg[i].val & 0xff;
+                               if (pd_detect_en)
+                                       p->am_reg[i].mask &= ~(0xff);
+                       }
+
                        if (p->am_reg[i].mask == 0xffffffff) {
-                               /* WRITE_VCBUS_REG(p->am_reg[i].addr,*/
-                               /* p->am_reg[i].val); */
                                if (pq_reg_wr_rdma)
                                        VSYNC_WR_MPEG_REG(p->am_reg[i].addr,
                                                p->am_reg[i].val);
@@ -347,6 +351,14 @@ void amcm_enable(void)
        cm_en_flag = true;
 }
 
+void pd_combing_fix_patch(enum pd_comb_fix_lvl_e level)
+{
+       pr_amcm_dbg("\n[amcm..] pd fix lvl = %d\n", level);
+       WRITE_VPP_REG(sr0_dej_setting[level].addr,
+               (aml_read_vcbus(sr0_dej_setting[level].addr) &
+               (~(sr0_dej_setting[level].mask))) |
+               (sr0_dej_setting[level].val & sr0_dej_setting[level].mask));
+}
 
 void cm_regmap_latch(struct am_regs_s *am_regs, unsigned int reg_map)
 {
index 32fe90f..384c63c 100644 (file)
@@ -62,6 +62,7 @@ extern void cm2_frame_size_patch(unsigned int width, unsigned int height);
 extern void cm2_frame_switch_patch(void);
 extern void cm_latch_process(void);
 extern int cm_load_reg(struct am_regs_s *arg);
+extern void pd_combing_fix_patch(enum pd_comb_fix_lvl_e level);
 
 /* #if (MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8) */
 /* #define WRITE_VPP_REG(x,val) */
index 1c2c3d3..a683265 100644 (file)
@@ -1583,5 +1583,13 @@ struct am_regs_s sr1reg_hv_noscale = {
        }
 };
 
+#define DEJAGGY_LEVEL 4
+/*0: weak,  1: middle,  2: strong, 3: from db*/
+struct am_reg_s sr0_dej_setting[DEJAGGY_LEVEL] = {
+       {REG_TYPE_VCBUS, SHARP0_DEJ_ALPHA, 0x000000ff, 0x00000046},
+       {REG_TYPE_VCBUS, SHARP0_DEJ_ALPHA, 0x000000ff, 0x0000006c},
+       {REG_TYPE_VCBUS, SHARP0_DEJ_ALPHA, 0x000000ff, 0x000000ff},
+       {REG_TYPE_VCBUS, SHARP0_DEJ_ALPHA, 0x000000ff, 0x00000046}
+};
 #endif
 
index 0869ebc..5e31f11 100644 (file)
@@ -191,6 +191,9 @@ unsigned int sr_offset[2] = {0, 0};
 
 unsigned int sr_demo_flag;
 
+bool pd_detect_en;
+int pd_fix_lvl = PD_HIG_LVL;
+
 static int wb_init_bypass_coef[24] = {
        0, 0, 0, /* pre offset */
        1024,   0,      0,
@@ -1052,6 +1055,32 @@ void vpp_demo_config(struct vframe_s *vf)
        }
 }
 
+void amvecm_dejaggy_patch(struct vframe_s *vf)
+{
+       if (!vf) {
+               if (pd_detect_en)
+                       pd_detect_en = 0;
+               return;
+       }
+
+       if ((vf->height == 1080) &&
+               (vf->width == 1920) &&
+               (vf->di_pulldown & (1 << 3)) &&
+               (vf->di_pulldown & 0x7)) {
+               if (pd_detect_en == 1)
+                       return;
+               pd_detect_en = 1;
+               pd_combing_fix_patch(pd_fix_lvl);
+               pr_amvecm_dbg("pd_detect_en = %d; pd_fix_lvl = %d\n",
+                       pd_detect_en, pd_fix_lvl);
+       } else if (pd_detect_en) {
+               pd_detect_en = 0;
+               pd_combing_fix_patch(PD_DEF_LVL);
+               pr_amvecm_dbg("pd_detect_en = %d; pd_fix_lvl = %d\n",
+                       pd_detect_en, pd_fix_lvl);
+       }
+}
+
 void amvecm_video_latch(void)
 {
        pc_mode_process();
@@ -1117,6 +1146,8 @@ int amvecm_on_vs(
                        lc_process(toggle_vf, sps_h_en, sps_v_en,
                                sps_w_in, sps_h_in);
                        amvecm_size_patch(cm_in_w, cm_in_h);
+                       /*1080i pulldown combing workaround*/
+                       amvecm_dejaggy_patch(toggle_vf);
                }
        } else {
                if (vd_path == VD1_PATH)
@@ -1127,6 +1158,8 @@ int amvecm_on_vs(
                        ve_hist_gamma_reset();
                        lc_process(NULL, sps_h_en, sps_v_en,
                                sps_w_in, sps_h_in);
+                       /*1080i pulldown combing workaround*/
+                       amvecm_dejaggy_patch(NULL);
                }
        }
 
@@ -5610,6 +5643,15 @@ static ssize_t amvecm_debug_store(struct class *cla,
                        set_gamma_regs(1, 1);
                else
                        pr_info("unsupport cmd\n");
+       }  else if (!strcmp(parm[0], "pd_fix_lvl")) {
+               if (parm[1]) {
+                       if (kstrtoul(parm[1], 10, &val) < 0)
+                               goto free_buf;
+               }
+               if (val > PD_DEF_LVL)
+                       pd_fix_lvl = PD_DEF_LVL;
+               else
+                       pd_fix_lvl = val;
        } else
                pr_info("unsupport cmd\n");
 
index 28f7307..316796c 100644 (file)
@@ -282,6 +282,13 @@ enum hdr_type_e {
        HDRTYPE_DOVI = DOVI_SOURCE
 };
 
+enum pd_comb_fix_lvl_e {
+       PD_LOW_LVL = 0,
+       PD_MID_LVL,
+       PD_HIG_LVL,
+       PD_DEF_LVL
+};
+
 enum vpp_transfer_characteristic_e {
        VPP_ST_NULL = 0,
        VPP_ST709 = 0x1,
@@ -458,11 +465,11 @@ static inline uint32_t READ_VPP_REG_BITS(uint32_t reg,
 
 extern signed int vd1_brightness, vd1_contrast;
 extern bool gamma_en;
-
 extern unsigned int atv_source_flg;
 extern unsigned int sr_demo_flag;
 
 extern enum hdr_type_e hdr_source_type;
+extern bool pd_detect_en;
 
 #define CSC_FLAG_TOGGLE_FRAME  1
 #define CSC_FLAG_CHECK_OUTPUT  2