Make sure only NEON enabled devices save/restore D16+ registers

llvm-svn: 221532

diff --git a/libcxxabi/src/Unwind/UnwindRegistersRestore.S b/libcxxabi/src/Unwind/UnwindRegistersRestore.S
index fbb6c17..7dd3a11 100644 (file)
--- a/libcxxabi/src/Unwind/UnwindRegistersRestore.S
+++ b/libcxxabi/src/Unwind/UnwindRegistersRestore.S
@@ -390,7 +390,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFL
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
 #if defined(__ARM_FP)
-#if __ARM_ARCH < 7
+#ifndef __ARM_NEON
   ldcl p11, cr0, [r0], {0x20}  @ vldm r0, {d16-d31}
 #else
   vldmia r0, {d16-d31}

diff --git a/libcxxabi/src/Unwind/UnwindRegistersSave.S b/libcxxabi/src/Unwind/UnwindRegistersSave.S
index 34df22f..f6994ac 100644 (file)
--- a/libcxxabi/src/Unwind/UnwindRegistersSave.S
+++ b/libcxxabi/src/Unwind/UnwindRegistersSave.S
@@ -369,7 +369,7 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instructions using the corresponding coprocessor mnemonic.
-#if __ARM_ARCH < 7
+#ifndef __ARM_NEON
   stcl p11, cr0, [r0], {0x20}  @ vstm r0, {d16-d31}
 #else
   vstmia r0, {d16-d31}