unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
unsigned long sbi_hart_pmp_granularity(struct sbi_scratch *scratch);
unsigned int sbi_hart_pmp_addrbits(struct sbi_scratch *scratch);
+unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch);
int sbi_hart_pmp_configure(struct sbi_scratch *scratch);
bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature);
void sbi_hart_get_features_str(struct sbi_scratch *scratch,
unsigned int pmp_addr_bits;
unsigned long pmp_gran;
unsigned int mhpm_count;
+ unsigned int mhpm_bits;
};
static unsigned long hart_features_offset;
return hfeatures->pmp_addr_bits;
}
+unsigned int sbi_hart_mhpm_bits(struct sbi_scratch *scratch)
+{
+ struct hart_features *hfeatures =
+ sbi_scratch_offset_ptr(scratch, hart_features_offset);
+
+ return hfeatures->mhpm_bits;
+}
+
int sbi_hart_pmp_configure(struct sbi_scratch *scratch)
{
struct sbi_domain_memregion *reg;
return val;
}
+static int hart_pmu_get_allowed_bits(void)
+{
+ unsigned long val = ~(0UL);
+ struct sbi_trap_info trap = {0};
+ int num_bits = 0;
+
+ /**
+ * It is assumed that platforms will implement same number of bits for
+ * all the performance counters including mcycle/minstret.
+ */
+ csr_write_allowed(CSR_MHPMCOUNTER3, (ulong)&trap, val);
+ if (!trap.cause) {
+ val = csr_read_allowed(CSR_MHPMCOUNTER3, (ulong)&trap);
+ if (trap.cause)
+ return 0;
+ }
+ num_bits = __fls(val) + 1;
+#if __riscv_xlen == 32
+ csr_write_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap, val);
+ if (!trap.cause) {
+ val = csr_read_allowed(CSR_MHPMCOUNTER3H, (ulong)&trap);
+ if (trap.cause)
+ return num_bits;
+ }
+ num_bits += __fls(val) + 1;
+
+#endif
+
+ return num_bits;
+}
+
static void hart_detect_features(struct sbi_scratch *scratch)
{
struct sbi_trap_info trap = {0};
/* Detect number of MHPM counters */
__check_csr(CSR_MHPMCOUNTER3, 0, 1UL, mhpm_count, __mhpm_skip);
+ hfeatures->mhpm_bits = hart_pmu_get_allowed_bits();
+
__check_csr_4(CSR_MHPMCOUNTER4, 0, 1UL, mhpm_count, __mhpm_skip);
__check_csr_8(CSR_MHPMCOUNTER8, 0, 1UL, mhpm_count, __mhpm_skip);
__check_csr_16(CSR_MHPMCOUNTER16, 0, 1UL, mhpm_count, __mhpm_skip);
+
+ /**
+ * No need to check for MHPMCOUNTERH for RV32 as they are expected to be
+ * implemented if MHPMCOUNTER is implemented.
+ */
+
__mhpm_skip:
#undef __check_csr_64