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rs6000: Correct Power8 cost of l2 cache size [PR97329]
author
Xionghu Luo
<luoxhu@linux.ibm.com>
Thu, 25 Mar 2021 00:46:12 +0000
(19:46 -0500)
committer
Xionghu Luo
<luoxhu@linux.ibm.com>
Thu, 25 Mar 2021 00:51:43 +0000
(19:51 -0500)
l2 cache size for Power8 is 512kB, it was copied from Power7 before
public. Tested no performance change for SPEC2017.
gcc/ChangeLog:
2021-03-24 Xionghu Luo <luoxhu@linux.ibm.com>
* config/rs6000/rs6000.c (power8_costs): Change l2 cache
from 256 to 512.
gcc/config/rs6000/rs6000.c
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diff --git
a/gcc/config/rs6000/rs6000.c
b/gcc/config/rs6000/rs6000.c
index
616dae3
..
34c4eda
100644
(file)
--- a/
gcc/config/rs6000/rs6000.c
+++ b/
gcc/config/rs6000/rs6000.c
@@
-1055,7
+1055,7
@@
struct processor_costs power8_cost = {
COSTS_N_INSNS (17), /* ddiv */
128, /* cache line size */
32, /* l1 cache */
-
256
, /* l2 cache */
+
512
, /* l2 cache */
12, /* prefetch streams */
COSTS_N_INSNS (3), /* SF->DF convert */
};