rs6000: Add split pattern to replace
authorXionghu Luo <luoxhu@linux.ibm.com>
Thu, 13 Jan 2022 00:36:54 +0000 (18:36 -0600)
committerXionghu Luo <luoxhu@linux.ibm.com>
Thu, 13 Jan 2022 00:36:54 +0000 (18:36 -0600)
7: r120:V4SI=const_vector
8: r121:V4SI=unspec[r120:V4SI,r120:V4SI,0xc] 260

with r121:v4SI = r120:V4SI when r120 is a vector with same element.

gcc/ChangeLog:

* config/rs6000/altivec.md (sldoi_to_mov<mode>): New.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/sldoi_to_mov.c: New test.

gcc/config/rs6000/altivec.md
gcc/testsuite/gcc.target/powerpc/sldoi_to_mov.c [new file with mode: 0644]

index 950b178..d7e93f2 100644 (file)
     }
 })
 
+(define_insn_and_split "sldoi_to_mov<mode>"
+  [(set (match_operand:VM 0 "altivec_register_operand")
+       (unspec:VM [(match_operand:VM 1 "easy_vector_constant")
+                   (match_dup 1)
+                   (match_operand:QI 2 "u5bit_cint_operand")]
+                   UNSPEC_VSLDOI))]
+  "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode) && can_create_pseudo_p ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0) (match_dup 1))])
+
 (define_insn "get_vrsave_internal"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (unspec:SI [(reg:SI VRSAVE_REGNO)] UNSPEC_GET_VRSAVE))]
diff --git a/gcc/testsuite/gcc.target/powerpc/sldoi_to_mov.c b/gcc/testsuite/gcc.target/powerpc/sldoi_to_mov.c
new file mode 100644 (file)
index 0000000..2053243
--- /dev/null
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <altivec.h>
+vector signed int foo1 (vector signed int a) {
+    vector signed int b = {0};
+    return vec_sum2s(a, b);
+}
+
+vector signed int foo2 (vector signed int a) {
+    vector signed int b = {0};
+    return vec_sld(b, b, 4);
+}
+
+/* { dg-final { scan-assembler-times {\mvsldoi\M} 1 {target le} } } */