usb: dwc3: exynos: Add support for Exynos5422 suspend clk
authorAnand Moon <linux.amoon@gmail.com>
Tue, 10 Mar 2020 19:48:53 +0000 (19:48 +0000)
committerFelipe Balbi <balbi@kernel.org>
Sun, 15 Mar 2020 09:08:27 +0000 (11:08 +0200)
Exynos5422 DWC3 module support two clk USBD300 and SCLK_USBD300
so add missing code to enable/disable code and suspend clk, for this
add a new compatible samsung,exynos5420-dwusb3 to help configure
dwc3 code and dwc3 suspend clock. Suspend clock controls the PHY power
change from P0 to P1/P2/P3 during U0 to U1/U2/U3 transition.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
drivers/usb/dwc3/dwc3-exynos.c

index 90bb022..48b68b6 100644 (file)
@@ -162,6 +162,12 @@ static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
        .suspend_clk_idx = -1,
 };
 
+static const struct dwc3_exynos_driverdata exynos5420_drvdata = {
+       .clk_names = { "usbdrd30", "usbdrd30_susp_clk"},
+       .num_clks = 2,
+       .suspend_clk_idx = 1,
+};
+
 static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
        .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
        .num_clks = 4,
@@ -179,6 +185,9 @@ static const struct of_device_id exynos_dwc3_match[] = {
                .compatible = "samsung,exynos5250-dwusb3",
                .data = &exynos5250_drvdata,
        }, {
+               .compatible = "samsung,exynos5420-dwusb3",
+               .data = &exynos5420_drvdata,
+       }, {
                .compatible = "samsung,exynos5433-dwusb3",
                .data = &exynos5433_drvdata,
        }, {