target-*: Clean up cpu.h header guards

Most of them use guard symbols like CPU_$target_H, but we also have
__MIPS_CPU_H__ and __TRICORE_CPU_H__.  They all upset
scripts/clean-header-guards.pl.

The script dislikes CPU_$target_H because they don't match their file
name (they should, to make guard collisions less likely).  The others
are reserved identifiers.

Clean them all up: use guard symbol $target_CPU_H for
target-$target/cpu.h.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 791da3b4ad678a735f59b0af32ff7b969897308d..ac5e801fb43bc293c86b0c2ef0517be818a40f55 100644 (file)
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#if !defined (__CPU_ALPHA_H__)
-#define __CPU_ALPHA_H__
+#ifndef ALPHA_CPU_H
+#define ALPHA_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -524,4 +524,4 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
     *pflags = flags;
 }
 
-#endif /* !defined (__CPU_ALPHA_H__) */
+#endif /* ALPHA_CPU_H */

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index e2fac46909c6297a9bb8b183a9a20adc23ef0651..76d824d315f719824515a1afeed31244ad28f802 100644 (file)
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -16,9 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_ARM_H
-#define CPU_ARM_H
 
+#ifndef ARM_CPU_H
+#define ARM_CPU_H
 
 #include "kvm-consts.h"
 

diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index e6046d20ca106e956ae21c9c2a9450587368c47a..7d7fe6eb1cf4860d07e2e20da20de8122f51494d 100644 (file)
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -17,8 +17,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_CRIS_H
-#define CPU_CRIS_H
+
+#ifndef CRIS_CPU_H
+#define CRIS_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 5c7a2791f34f4e4d7b2dae6462119ed3b8de0f74..776efe630ea3a8161848e6802138a739b91ebfe8 100644 (file)
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_I386_H
-#define CPU_I386_H
+
+#ifndef I386_CPU_H
+#define I386_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -1607,4 +1608,4 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f,
 /* cpu.c */
 bool cpu_is_bsp(X86CPU *cpu);
 
-#endif /* CPU_I386_H */
+#endif /* I386_CPU_H */

diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 4efe98d828f85a8e2e23db959e15a27e7749a849..d8a3515244ea00971d3beba1c2473bbd6928dd25 100644 (file)
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef CPU_LM32_H
-#define CPU_LM32_H
+#ifndef LM32_CPU_H
+#define LM32_CPU_H
 
 #define TARGET_LONG_BITS 32
 

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 9087769997976453dfdaafec2bcf9cab4b0b31a4..b2faa6b605677be8bee41c468adf93fb2ef42a83 100644 (file)
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -17,8 +17,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_M68K_H
-#define CPU_M68K_H
+
+#ifndef M68K_CPU_H
+#define M68K_CPU_H
 
 #define TARGET_LONG_BITS 32
 

diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 16815dfc6abcb085bdc282db41493acdc29cddc3..beb75ffd26d5137f56a1f01f6c4d5021104a3cc8 100644 (file)
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_MICROBLAZE_H
-#define CPU_MICROBLAZE_H
+
+#ifndef MICROBLAZE_CPU_H
+#define MICROBLAZE_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 9c4fc816bf9b76bf285042d9b5a94c6651fa6ce7..5182dc74ffa3c22bbe03900b3478b1cf0d8f293a 100644 (file)
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -1,5 +1,5 @@
-#if !defined (__MIPS_CPU_H__)
-#define __MIPS_CPU_H__
+#ifndef MIPS_CPU_H
+#define MIPS_CPU_H
 
 //#define DEBUG_OP
 
@@ -1066,4 +1066,4 @@ static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
     do_raise_exception_err(env, exception, 0, pc);
 }
 
-#endif /* !defined (__MIPS_CPU_H__) */
+#endif /* MIPS_CPU_H */

diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h
index 63d5cafc55288303de19b502ae2698ad339d524b..3e880facf4825ba794449107025159f43cfd755e 100644 (file)
--- a/target-moxie/cpu.h
+++ b/target-moxie/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef _CPU_MOXIE_H
-#define _CPU_MOXIE_H
+
+#ifndef MOXIE_CPU_H
+#define MOXIE_CPU_H
 
 #include "qemu-common.h"
 
@@ -139,4 +140,4 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
 int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address,
                                int rw, int mmu_idx);
 
-#endif /* _CPU_MOXIE_H */
+#endif /* MOXIE_CPU_H */

diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index 9451a7cca691b5fb50e127232fad1c221592a7fb..aaf153579a9acd67e5b2cdf2aff3db6dee5a1670 100644 (file)
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -17,8 +17,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef CPU_OPENRISC_H
-#define CPU_OPENRISC_H
+#ifndef OPENRISC_CPU_H
+#define OPENRISC_CPU_H
 
 #define TARGET_LONG_BITS 32
 
@@ -408,4 +408,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch)
 
 #define CPU_INTERRUPT_TIMER   CPU_INTERRUPT_TGT_INT_0
 
-#endif /* CPU_OPENRISC_H */
+#endif /* OPENRISC_CPU_H */

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2666a3f80d002e97feb6eadbad1f5e4ff05f18d8..5fce1ffa251ad85f8d60a9803478b6148f05bca9 100644 (file)
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#if !defined (__CPU_PPC_H__)
-#define __CPU_PPC_H__
+
+#ifndef PPC_CPU_H
+#define PPC_CPU_H
 
 #include "qemu-common.h"
 
@@ -2432,4 +2433,4 @@ int ppc_get_vcpu_dt_id(PowerPCCPU *cpu);
 PowerPCCPU *ppc_get_vcpu_by_dt_id(int cpu_dt_id);
 
 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
-#endif /* !defined (__CPU_PPC_H__) */
+#endif /* PPC_CPU_H */

diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 0c8dba3602eb41b77c4c3560af9c6f95bfbbdb83..c216bdacef4fad2b45b0d958c4c146eb1fd74fa8 100644 (file)
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -19,8 +19,9 @@
  * You should have received a copy of the GNU (Lesser) General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_S390X_H
-#define CPU_S390X_H
+
+#ifndef S390X_CPU_H
+#define S390X_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 3f9dae2d1f0dffbf468c3af2515f29b946e37c13..478ab558681b0b22a958158756e875ab427ffd89 100644 (file)
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef _CPU_SH4_H
-#define _CPU_SH4_H
+
+#ifndef SH4_CPU_H
+#define SH4_CPU_H
 
 #include "qemu-common.h"
 #include "cpu-qom.h"
@@ -387,4 +388,4 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc,
             | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */
 }
 
-#endif                         /* _CPU_SH4_H */
+#endif /* SH4_CPU_H */

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 604de84624cafe64d9a9c1ca5049dc48e0701c96..15364a00f2865ba6c1b43f1a3080984faa1e83bf 100644 (file)
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -1,5 +1,5 @@
-#ifndef CPU_SPARC_H
-#define CPU_SPARC_H
+#ifndef SPARC_CPU_H
+#define SPARC_CPU_H
 
 #include "qemu-common.h"
 #include "qemu/bswap.h"

diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index d74032925b124b7243c6c8dd2533363bce8eeeb5..17354272337da8a0694404876ec1b7d11027d5c0 100644 (file)
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#ifndef CPU_TILEGX_H
-#define CPU_TILEGX_H
+
+#ifndef TILEGX_CPU_H
+#define TILEGX_CPU_H
 
 #include "qemu-common.h"
 

diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h
index a298d63eea246a47cdb0994af26fa3dc8fd54297..a3493a123c351e6d5b8314862736509273f5c829 100644 (file)
--- a/target-tricore/cpu.h
+++ b/target-tricore/cpu.h
@@ -16,8 +16,9 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
-#if !defined(__TRICORE_CPU_H__)
-#define __TRICORE_CPU_H__
+
+#ifndef TRICORE_CPU_H
+#define TRICORE_CPU_H
 
 #include "tricore-defs.h"
 #include "qemu-common.h"
@@ -420,4 +421,4 @@ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
                                  int rw, int mmu_idx);
 #define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault
 
-#endif /*__TRICORE_CPU_H__ */
+#endif /* TRICORE_CPU_H */

diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 83f758496a6c5a08714524b685137d380613e97f..7b5b405e79cdbbd6fd4f78e65b18594434abf49a 100644 (file)
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -8,8 +8,9 @@
  * published by the Free Software Foundation, or (at your option) any
  * later version. See the COPYING file in the top-level directory.
  */
-#ifndef QEMU_UNICORE32_CPU_H
-#define QEMU_UNICORE32_CPU_H
+
+#ifndef UNICORE32_CPU_H
+#define UNICORE32_CPU_H
 
 #define TARGET_LONG_BITS                32
 #define TARGET_PAGE_BITS                12
@@ -184,4 +185,4 @@ int uc32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
 void uc32_translate_init(void);
 void switch_mode(CPUUniCore32State *, int);
 
-#endif /* QEMU_UNICORE32_CPU_H */
+#endif /* UNICORE32_CPU_H */

diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index ce9fb5b0033aa0cebdfaa7d016ab3083ab67d1c0..7fe82a37af42eb9077b56d1542298472c397ec25 100644 (file)
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -25,8 +25,8 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef CPU_XTENSA_H
-#define CPU_XTENSA_H
+#ifndef XTENSA_CPU_H
+#define XTENSA_CPU_H
 
 #define ALIGNED_ONLY
 #define TARGET_LONG_BITS 32